Hi Stephen,
On 2 May 2014 16:43, Stephen Warren wrote:
> On 05/02/2014 02:51 PM, Simon Glass wrote:
>> This is an implementation of GPIOs for Tegra that uses driver model.
>> It is written for comment and need work and testing before it is ready
>> to use.
>>
>> Specific points for discussion:
>>
DRAM size should use 64-bit variable when the size could be more than 4GB.
Caught and verified on P4080DS with 4GB DDR.
Signed-off-by: York Sun
---
Change log
v5: no change since v1
common/board_f.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/board_f.c b/commo
Some platforms (tested on mpc85xx, mpc86xx) use global data before calling
function baord_inti_f(). The data should not be cleared later. Any arch
which uses global data in generic board board_init_f() should define
CONFIG_SYS_GENERIC_GLOBAL_DATA.
Signed-off-by: York Sun
CC: Scott Wood
CC: Simon
On Fri, 2014-05-02 at 17:14 -0700, York Sun wrote:
> On 05/01/2014 07:45 PM, Simon Glass wrote:
> > On 1 May 2014 16:00, York Sun wrote:
> >> Some platforms (tested on mpc85xx, mpc86xx) use global data before calling
> >> function baord_inti_f(). The data should not be cleared later. Any arch
> >>
On 05/01/2014 07:45 PM, Simon Glass wrote:
> On 1 May 2014 16:00, York Sun wrote:
>> Some platforms (tested on mpc85xx, mpc86xx) use global data before calling
>> function baord_inti_f(). The data should not be cleared later. Any arch
>> which uses global data in generic board board_init_f() shoul
On 05/02/2014 02:51 PM, Simon Glass wrote:
> This is an implementation of GPIOs for Tegra that uses driver model.
> It is written for comment and need work and testing before it is ready
> to use.
>
> Specific points for discussion:
>
> 1. I can't find much in the way of GPIO device tree bindings
Mark,
In your nonsec_init code, you suggest this change:
+ mrc p15, 0, r0, c1, c1, 2
movwr1, #0x3fff
- movtr1, #0x0006
- mcr p15, 0, r1, c1, c1, 2 @ NSACR = all copros to non-sec
+ movtr1, #0x0004
+ orr r0, r0, r1
+ mcr
On Mon, 2014-04-28 at 13:17 -0700, Tim Harvey wrote:
> +static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
> + int column, int page_addr)
> +{
> + register struct nand_chip *chip = mtd->priv;
> + int ctrl = NAND_NCE | NAND_CTRL_CLE | NAND_CTRL_
This is an implementation of GPIOs for Tegra that uses driver model.
It is written for comment and need work and testing before it is ready
to use.
Specific points for discussion:
1. I can't find much in the way of GPIO device tree bindings, so ended up
just creating the GPIO devices
3. Driver m
Mark,
I finally have all this working for me on an A9 system too!
However, there were a few things that I had to change a bit.
For example, by CPUs will always come out of reset at 0x0
and I do not have the ability to set their first-fetch address to
anything else. To accommodate this, I need to
From: Robert Nelson
Fall back to previous dtb used when omap3-beagle-xm-ab.dtb doesn't exist in
file system
Signed-off-by: Robert Nelson
CC: Tom Rini
CC: Nishanth Menon
---
include/configs/omap3_beagle.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/include/conf
From: Robert Nelson
As of v3.15-rc3, omap3-beagle-xm-ab.dtb now exists with the usb hub (ehci)
enabled.
For older kernels versions, cherry pick from mainline:
ef78f3869c37c480f1d58462a760a40dabc823f4
Signed-off-by: Robert Nelson
CC: Tom Rini
CC: Nishanth Menon
---
include/configs/omap3_bea
On Fri, May 2, 2014 at 3:15 PM, robertcnelson wrote:
> From: Robert Nelson
>
> Fall back to previous dtb used when omap3-beagle-xm-ab.dtb doesn't exist in
> file system
>
> Signed-off-by: Robert Nelson
> CC: Tom Rini
> CC: Nishanth Menon
> ---
> include/configs/omap3_beagle.h | 8 +++-
>
On Sat, Apr 26, 2014 at 7:17 AM, Marc Zyngier wrote:
> diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
> new file mode 100644
> index 000..0b0d6a7
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/virt-dt.c
> +
> +static int fdt_psci(void *fdt)
> +{
> +#ifdef CONFIG_ARMV7_P
On 05/01/2014 04:48 PM, Scott Wood wrote:
> On Mon, 2014-04-28 at 11:47 -0600, Stephen Warren wrote:
>> I guess the main issue I see here is that all the HW-configuration needs
>> to be repeated in seaboard_defconfig and spl/seaboard_defconfig.
>>
>> (As an aside, if there's nothing special about S
On Fri, May 02, 2014 at 05:16:50AM +0900, Nobuhiro Iwamatsu wrote:
> Dear Tom Rini.
>
> Please pull u-boot-sh master branch.
>
> The following changes since commit 8854070784450f7ade382c5792b2721fbe27315a:
>
> Merge branch 'master' of git://www.denx.de/git/u-boot-arc
> (2014-04-25 15:08:43 -0
On Thu, Apr 24, 2014 at 12:04 AM, Masahiro Yamada
wrote:
> diff --git a/board/freescale/p1022ds/Kconfig b/board/freescale/p1022ds/Kconfig
> new file mode 100644
> index 000..773ea52
> --- /dev/null
> +++ b/board/freescale/p1022ds/Kconfig
> @@ -0,0 +1,251 @@
> +if TARGET_P1022DS
> +
> +config
0:0,
>>>from common/board_r.c:21:
>>> include/dm/device.h:56:8: note: originally defined here
>>>struct device {
>>> ^
>>> make[1]: *** [common/board_r.o] Fehler 1
>>> make: *** [common] Fehler 2
>>> pollux:u-boo
MMC instance 1 and 2 is capable of ADMA in omap4, omap5.
Add support for ADMA and enable ADMA for read/write to
improve mmc throughput.
Signed-off-by: Balaji T K
---
arch/arm/include/asm/omap_mmc.h | 14 +++
drivers/mmc/omap_hsmmc.c| 163 +---
inclu
From: Siva Durga Prasad Paladugu
Added support to load a bitstream image in chunks by reading it in
chunks from SD/MMC.
Command format:
loadfs [dev] [address] [image size] [blocksize]
[]
Example: fpga loadfs 0 100 3dbafc 4000 mmc 0 fpga.bin
Signed-off-by: Siva Durga Prasad Paladugu
On 2014-05-02 13:31, Ian Campbell wrote:
On Fri, 2014-05-02 at 10:45 +0100, Marc Zyngier wrote:
> #define SUNXI_SRAM_D_BASE 0x01c0
> +#define SUNXI_SRAM_B_BASE 0x01c0 /* 64 kiB (secure) */
Can we please fix these last two values which are obviously wrong
(at
least
Do not do partial bitstream detection based on bitstream
size and use bitstream_type argument which is passed
from the fpga core.
Signed-off-by: Michal Simek
---
drivers/fpga/zynqpl.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/fpga/zynqpl.c b
Use new fpga commands for loading partial bitstreams.
Signed-off-by: Michal Simek
---
include/configs/zynq-common.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index acf1bfd..af420d1 100644
--- a/include/configs/zynq-common
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.
Signed-off-by: Michal Simek
---
Preparation patc
Added support to load partial bitstreams.
The partial bitstreams can be loaded using the below commands
Commands:
fpga loadp
fpga loadbp
The full bit streams can be loaded using the
old commands(fpga load and fpga loadb).
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
Fix typo in CMD_FPGA command enabling.
Signed-off-by: Michal Simek
---
include/configs/iocon.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/iocon.h b/include/configs/iocon.h
index f36c2a3..b32095c 100644
--- a/include/configs/iocon.h
+++ b/include/configs/
From: Siva Durga Prasad Paladugu
Guard the LOADMK functionality with config to provide
an option to enable or disable it.
Enable it for all platforms in mainline which enable CONFIG_CMD_FPGA.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
README
Hi,
This series is based on FPGA changes I have sent
http://lists.denx.de/pipermail/u-boot/2014-April/178204.html
Series contain fpga chagnes for cleaning up full
and partial bitstream loading. Also compressed bitstreams
are supported. Bitstream detection was done based on device
size but it does
Hi.
I now fell a bit guilty. I had this same problem a while ago, and I
haven't ever really pushed the fix. In fact, I ended up rewriting
most of drivers/spi/spi-fsl-espi.c, and that's really the problem - I
can only test about two boards from over 20, so I know that nobody
will take my complete
On Fri, 2014-05-02 at 10:45 +0100, Marc Zyngier wrote:
> > #define SUNXI_SRAM_D_BASE 0x01c0
> > +#define SUNXI_SRAM_B_BASE 0x01c0 /* 64 kiB (secure) */
>
> Can we please fix these last two values which are obviously wrong (at
> least on sun7i, they point to the SRA
Hi Rob,
On Thu, 10 Apr 2014 16:17:31 -0500, Rob Herring
wrote:
> From: Rob Herring
>
> Since highbank is actually shared between Highbank and Midway platforms,
> remove the Highbank name from the prompt and use the default.
>
> Signed-off-by: Rob Herring
> ---
> include/configs/highbank.h |
Hi Rob,
On Thu, 10 Apr 2014 16:17:30 -0500, Rob Herring
wrote:
> From: Rob Herring
>
> Adapt highbank to use config_distro_defaults.h and remove the redundant
> defines.
>
> Signed-off-by: Rob Herring
> ---
> include/configs/highbank.h | 25 ++---
> 1 file changed, 2 ins
Hi Ian,
On 2014-05-01 19:40, Ian Campbell wrote:
This patch adds generic board, start of day and basic build system
support for
the Allwinner A20 (sun7i) processor. This code will not been compiled
until the
build is hooked up in a later patch. It has been split out to keep
the patches
manageabl
Dear Sergio,
In message <1748b2cb79cd4c4c98b0b27ea13787cd1fe06...@sgsimbx007.nsn-intra.net>
you wrote:
>
> I'm getting the following error message, which leads to a continuous reset
> loop in my CPU (MPC8548).
> U-Boot version is 1.3.4 and latest OHCI patches are available.
Well, U-Boot v1.3.4 i
From: Stefan Bigler
Add readout of dip-switch to revert to factory settings.
If one or more dip-switch are set, launch bank 0 that contains the
bootloader to do the required action.
Signed-off-by: Stefan Bigler
Signed-off-by: Valentin Longchamp
---
Changes in v2:
- Insert blank line after va
From: Stefan Bigler
The unit LEDs are managed by the QRIO CPLD. This patch adds support for
accessing these LEDs in the QRIO.
The LEDs then are set to a correct boot state:
- UNIT-LED is red
- BOOT-LED is on.
Signed-off-by: Stefan Bigler
Signed-off-by: Valentin Longchamp
---
Changes in v2:
I'm getting the following error message, which leads to a continuous reset loop
in my CPU (MPC8548).
U-Boot version is 1.3.4 and latest OHCI patches are available.
USB: OHCI pci controller (1033, 0035) found @(0:19:0)
OHCI regs address 0x8002
scanning bus for devices... ERROR: CTL:TIMEOUT
ERR
luded from include/dm.h:10:0,
from common/board_r.c:21:
include/dm/device.h:56:8: note: originally defined here
struct device {
^
make[1]: *** [common/board_r.o] Fehler 1
make: *** [common] Fehler 2
pollux:u-boot hs [20140502] $
for a not yet mainlined imx6 board using
On Thursday, May 01, 2014 at 08:40:46 PM, Ian Campbell wrote:
> This patch adds DRAM initialisation support for the Allwinner A20 (sun7i)
> processor. This code will not been compiled until the build is hooked up in
> a later patch. It has been split out to keep the patches manageable.
>
> Signed-
On Thursday, May 01, 2014 at 08:40:47 PM, Ian Campbell wrote:
> This patch adds generic board, start of day and basic build system support
> for the Allwinner A20 (sun7i) processor. This code will not been compiled
> until the build is hooked up in a later patch. It has been split out to
> keep the
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