This allows u-boot to load different OS or Bare Metal application on the
different cores of the i.MX6DQ.
For example: we can run Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau
---
Changes for v2:
- Add a commit log message to explain the purpose of this
cc: Stephen Warren
Signed-off-by: Jeroen Hofstee
---
board/raspberrypi/rpi_b/rpi_b.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
index f33fae9..601c6f7 100644
--- a/board/raspberrypi/rpi_b/rpi_b.c
+++ b/b
Add missing prototypes for global functions and
make local functions static.
cc: pa...@antoniou-consulting.com
Signed-off-by: Jeroen Hofstee
---
drivers/mmc/mmc.c| 6 +++---
drivers/mmc/omap_hsmmc.c | 2 +-
include/mmc.h| 4 +++-
3 files changed, 7 insertions(+), 5 deletions(
Hello Tom,
On 08-07-14 03:40, Tom Rini wrote:
As noted by clang, we have been shifting certain values out of 32bit
range when setting some DDR registers. Upon further inspection these
had been touching reserved fields (and having no impact). These came in
from historical bring-up code and can
On 12.07.2014 15:30, Gupta, Pekon wrote:
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Thu, Jul 10, 2014 at 07:28:00AM +0200, Stefan Roese wrote:
Hi Pekon,
On 09.07.2014 20:22, Gupta, Pekon wrote:
Commit a0a37183 (ARM: omap: merge GPMC initialization code for all
platfo
As a result of 0defddc851edfc34bcf3c3379fe74b11dc01a493 , which did
a consolidation of the prompt string, this ifdef became empty. Remove
it.
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc: Stefano Babic
---
include/configs/mxs.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs
>From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
>>On Thu, Jul 10, 2014 at 07:28:00AM +0200, Stefan Roese wrote:
>> Hi Pekon,
>>
>>> On 09.07.2014 20:22, Gupta, Pekon wrote:
>> >>Commit a0a37183 (ARM: omap: merge GPMC initialization code for all
>> >>platform) broke NAND on OMAP3
From: Marc Zyngier
Generate the PSCI node in the device tree.
Also add a reserve section for the "secure" code that lives in
in normal RAM, so that the kernel knows it'd better not trip on
it.
Signed-off-by: Marc Zyngier
Acked-by: Ian Campbell
---
arch/arm/cpu/armv7/Makefile | 1 +
arch/a
From: Marc Zyngier
Having a form of whitelist to check if we know of a CPU core
and and obtain CBAR is a bit silly.
It doesn't scale (how about A12, A17, as well as other I don't know
about?), and is actually a property of the SoC, not the core.
So either it works and everybody is happy, or it
From: Marc Zyngier
Allow the switch to a second stage secure monitor just before
switching to non-secure.
This allows a resident piece of firmware to be active once the
kernel has been entered (the u-boot monitor is dead anyway,
its pages being reused).
Signed-off-by: Marc Zyngier
Acked-by: Ia
From: Ma Haijun
Some architecture needs extra device tree setup. Instead of adding
yet another hook, convert arch_fixup_memory_node to be a generic
FDT fixup function.
[maz: collapsed 3 patches into one, rewrote commit message]
Signed-off-by: Ma Haijun
Signed-off-by: Marc Zyngier
Acked-by: Ia
From: Marc Zyngier
Implement core support for PSCI. As this is generic code, it doesn't
implement anything really useful (all the functions are returning
Not Implemented).
Signed-off-by: Marc Zyngier
Acked-by: Ian Campbell
---
arch/arm/cpu/armv7/Makefile | 4 ++
arch/arm/cpu/armv7/psci.S
From: Marc Zyngier
In order to be able to use the various mode constants (far more
readable than random hex values), add the missing HYP and A
values.
Also update arm/lib/interrupts.c to display HYP instead of an
unknown value.
Signed-off-by: Marc Zyngier
Acked-by: Ian Campbell
---
arch/arm/
From: Marc Zyngier
Having the switch to non-secure in the "prep" phase is causing
all kind of troubles, as that stage can be called multiple times.
Instead, move the switch to non-secure to the last possible phase,
when there is no turning back anymore.
Signed-off-by: Marc Zyngier
Acked-by: Ia
From: Marc Zyngier
A CP15 instruction execution can be reordered, requiring an
isb to be sure it is executed in program order.
Signed-off-by: Marc Zyngier
Acked-by: Ian Campbell
---
arch/arm/cpu/armv7/nonsec_virt.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/nonsec_
From: Marc Zyngier
In anticipation of refactoring the HYP/non-secure code to run
from secure RAM, add a new linker section that will contain that
code.
Nothing is using it just yet.
Signed-off-by: Marc Zyngier
Acked-by: Ian Campbell
---
v5: [ijc] s/OBJCFLAGS/OBJCOPYFLAGS/
---
arch/arm/config
From: Marc Zyngier
Before switching to non-secure, make sure that CNTVOFF is set
to zero on all CPUs. Otherwise, kernel running in non-secure
without HYP enabled (hence using virtual timers) may observe
timers that are not synchronized, effectively seeing time
going backward...
Signed-off-by: Ma
From: Marc Zyngier
The current non-sec switching code suffers from one major issue:
it cannot run in secure RAM, as a large part of u-boot still needs
to be run while we're switched to non-secure.
This patch reworks the whole HYP/non-secure strategy by:
- making sure the secure code is the *last
Hi,
Marc is rather busy so I've taken it upon myself to rebase this series
onto the latest master. v4 would have been applied except for a warning
which it caused on aarch64 which I have (trivially) resolved this time
around. The only other change is s/OBJCFLAGS/OBJCOPYFLAGS/ due to
changes in the
Signed-off-by: Jeroen Hofstee
---
yup another clang warning:
common/env_common.c:30:14: warning: unused function '__env_get_char_spec'
[-Wunused-function]
static uchar __env_get_char_spec(int index)
^
changes since v1:
add missing S-O-B line
---
common/env_common.c | 4 +---
1 f
Remove self assignments which is just dead code to prevent
compiler warnings about non used arguments. For u-boot this
does not prevent any warning though, on the contrary it actual
introduces warnings when compiling with clang. Remove them.
Signed-off-by: Jeroen Hofstee
---
fs/yaffs2/yaffs_guts
Current code uses the preprocessor to change an else case
to a statement without any if condition at all. Although
this works, change the optional code to return early, so
all optional code is contained within a single #ifdef.
Signed-off-by: Jeroen Hofstee
---
fs/yaffs2/yaffs_guts.c | 21 +++
ignores checkpatch warning:
CHECK: if this code is redundant consider removing it
#120: FILE: fs/yaffs2/yaffsfs.c:3186:
+#if 0
since this was already in u-boot.
changes since v1:
fix some typos in the commit message
Jeroen Hofstee (2):
yaffs2: cosmetic: remove self assignments
yaffs2: pre
On Sat, Jul 12, 2014 at 2:23 AM, Tom Rini wrote:
> From: Vinothkumar Rajendran
>
> By default QSPI data through-put in memory mapped mode is ~2.4MB/sec @
> 48MHz. Added edma memory copy functionality in spi flash driver to
> improve the data through put to 5.1MB/Sec.
>
> Signed-off-by: Vinothkuma
Since no board defines CONFIG_TUNE_PIO this is just dead
code, so remove it.
cc: Pavel Herrmann
Signed-off-by: Jeroen Hofstee
---
common/cmd_ide.c | 84
1 file changed, 84 deletions(-)
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
ind
Jeroen Hofstee (2):
common: cmd_ide: remove PIO mode
common: cmd_ide: use __weak and add prototypes
common/cmd_ide.c | 135 ++-
include/ide.h| 4 ++
2 files changed, 17 insertions(+), 122 deletions(-)
--
1.8.3.2
clang chokes about the concept of having an alias to an
always_inlined function. gcc likely just ignores the always
inlined since binary sizes are equal before and after this
patch. Convert the aliases to weak functions and provide
missing prototypes.
cc: Pavel Herrmann
Signed-off-by: Jeroen Hofs
On Sat, Jul 12, 2014 at 9:40 AM, Heiko Schocher wrote:
> if status register do never set MXC_CSPICTRL_TC, spi_xchg_single
> endless loops. Add a timeout here to prevent endless hang.
>
> Signed-off-by: Heiko Schocher
> Cc: Dirk Behme
> Cc: Jagannadha Sutradharudu Teki
>
> ---
> - changes for v2
On Tue, 2014-07-08 at 22:21 +0200, Roman Byshko wrote:
> This patch series adds USB Host EHCI support to the sun7i SoC.
When you repost this please could you CC the USB custodian (Marek Vasut,
marex {AT} denx {DOT} de) for his input on the glue code.
> It was
> tested on Cubietruck. Now you coul
Dear Pavel,
In message <20140711203007.ga1...@amd.pavel.ucw.cz> you wrote:
>
> > > Ok, would it be acceptable to change 'count not set' message to 'could
> > > not set or invalid address' and print the address as well?
> >
> > Print the address - if it is not set? I think we should provide usefu
30 matches
Mail list logo
