On 2015-02-09 12:26, Mark Rutland wrote:
> [...]
>
The solution that was discussed internally would involve having the
secure monitor (U-Boot's PSCI implementation in this case) program the
flow controller appropriately, point the CPU reset vectors to a location
containing a WF
Hi Marco,
On Fri, Feb 13, 2015 at 5:08 PM, Fabio Estevam wrote:
> You could try this patch to have debug output from SPL:
> http://git.denx.de/?p=u-boot.git;a=commitdiff;h=950eaf6230496585e72ebb965c458d35c6c7eac1;hp=e8cdeefc222ff32a80282dd571be0426156cd9d9
>
> Make sure you have DEBUG and CONFIG
From: Jan Kiszka
Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely
cache disabling and flushing, clrex and the disabling of SMP for the
dying CPU. These steps are apparently generic for ARMv7 and will be
reused for Tegra124 support.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/
I've picked up Ian's and Thierry's work on PSCI support for Tegra124,
specifically the Jetson TK1 board. This series contains Ian's patches
and a rewritten version of the PSCI core as suggested by Thierry. It's
working fine on the TK1, allowing Linux to online/offline CPUs 1-3 as
it likes (provided
From: Ian Campbell
In this case the secure code lives in RAM, and hence needs to be reserved, but
it has been relocated, so the reservation of __secure_start does not apply.
Add support for setting CONFIG_ARMV7_SECURE_RESERVE_SIZE to reserve such a
region.
This will be used in a subsequent patc
From: Ian Campbell
The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
not protected in h/w. See next patch.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/tegra12
From: Jan Kiszka
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/armv7/psci.S | 19 +++
arch/arm/cpu/armv7/sunxi/psci.S | 21 ++---
2 files changed, 21 in
From: Jan Kiszka
This function will be used to initialize CPU power management for Tegra
SOCs. For now it does nothing.
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra/ap.h | 5 +
board/nvidia/common/board.c | 4
2 files changed, 9 insertions(+)
diff --git a/ar
From: Ian Campbell
I will need mc_security_cfg0/1 in a future patch and I added the rest while
debugging, so thought I might as well commit them.
Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
---
arch/arm/include/asm/arch-tegra124/mc.h | 35 +++--
1 file ch
From: Jan Kiszka
Will be used for unpowergating CPUs.
Signed-off-by: Jan Kiszka
---
arch/arm/cpu/tegra-common/powergate.c | 2 +-
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/tegra-common/powergate.c
b/arch
From: Ian Campbell
These registers can be used to prevent non-secure world from accessing a
megabyte aligned region of RAM, use them to protect the u-boot secure monitor
code.
At first I tried to do this from s_init(), however this inexplicably causes
u-boot's networking (e.g. DHCP) to fail, whi
From: Jan Kiszka
This is based on Thierry Reding's work and uses Ian Campell's
preparatory patches. It comes with full support for CPU_ON/OFF PSCI
services. The algorithm used in this version for turning CPUs on and
off was proposed by Thierry Reding in
http://thread.gmane.org/gmane.comp.boot-loa
Hi,
On Sun, Feb 15, 2015 at 5:28 AM, Jan Kiszka wrote:
> From: Jan Kiszka
>
> _sunxi_cpu_entry can be converted completely into a reusable
> psci_cpu_entry. Tegra124 will use it as well.
>
> Signed-off-by: Jan Kiszka
> ---
> arch/arm/cpu/armv7/psci.S | 19 +++
> arch/arm/
On 2015-02-15 03:01, Chen-Yu Tsai wrote:
> Hi,
>
> On Sun, Feb 15, 2015 at 5:28 AM, Jan Kiszka wrote:
>> From: Jan Kiszka
>>
>> _sunxi_cpu_entry can be converted completely into a reusable
>> psci_cpu_entry. Tegra124 will use it as well.
>>
>> Signed-off-by: Jan Kiszka
>> ---
>> arch/arm/cpu/a
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