Make cover letter shows like 0/x, 00/xx and 000/xxx etc.
Signed-off-by: Josh Wu
---
Changes in v2:
- use math.log10() function instead
tools/patman/patchstream.py | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.p
Dear Tom,
The following changes since commit
8a5c9ca4d0b8aa13a1bb321494d24f656a9a7d72:
Prepare v2015.04-rc5 (2015-03-31 20:53:59 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-arc.git
for you to fetch changes up to d5717e894497124fd44289a37f818ee301640c70:
boar
Hi,
I am using u-boot-2015.01 loader on MPC8641D based Board. I have following
queries Related to PCIe bus
1. Does it provide support to pcie switch(PES64H16AG2) support?
2. Do I need any specific driver for this switch to make it up?
After booting its not showing any link the logs are:
U-Boot 2
Hi Stephen,
Thanks for your analisys!
2015-04-02 7:33 GMT+09:00 Stephen Warren :
> On 03/31/2015 06:02 AM, Masahiro Yamada wrote:
>>
>> Since the Kconfig conversion, some developers have reported that
>> Kbuild sometimes fails completely at random. According to the error
>> reports, it seems to
Since the Kconfig conversion, config.mk has been included only when
include/config/auto.conf is newer than the .config file.
It causes build error if both files have the same time-stamps.
It is actually possible because EXT* file systems have a 1s time-stamp
resolution.
The config.mk should be in
On Sunday, March 29, 2015 at 12:28:19 PM, Paul Kocialkowski wrote:
> This may happen when using an USB1 device on a controller that only
> supports USB2 (e.g. EHCI). Reading the first descriptor will fail (read 0
> byte), so we can abort the process at this point instead of failing later
> and wast
On Sunday, March 29, 2015 at 12:28:18 PM, Paul Kocialkowski wrote:
> Signed-off-by: Paul Kocialkowski
I don't really want to spell it out, but I guess I have to, sorry ...
Commit message please.
Best regards,
Marek Vasut
___
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U-Boot
On Monday, March 30, 2015 at 03:35:03 PM, Paul Kocialkowski wrote:
> Le lundi 30 mars 2015 à 01:47 +0200, Marek Vasut a écrit :
[...]
> > > > Hi,
> > > >
> > > > since this is an error, this should probably be a printf(). Also,
> > > > to make the error message useful, it should state the invali
On Tuesday, March 31, 2015 at 11:13:54 PM, Pavel Machek wrote:
> On Tue 2015-03-31 15:59:11, Dinh Nguyen wrote:
> > On 3/31/15 3:48 PM, Pavel Machek wrote:
> > > On Mon 2015-03-30 17:01:18, dingu...@opensource.altera.com wrote:
> > >> From: Dinh Nguyen
> > >>
> > >> commit "07d30b6c3129 arm: socf
On Tuesday, March 31, 2015 at 12:01:13 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> We need to adjust the SYS_INIT_RAM_SIZE to have room for the
> SPL_MALLOC_SIZE.
>
> Signed-off-by: Dinh Nguyen
Applied to u-boot-socfpga/next , thanks!
Best regards,
Marek Vasut
__
On Tuesday, March 31, 2015 at 12:01:04 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> These functions will be needed for use by the SPL for enabling the
> console and sdram initialization.
>
> Signed-off-by: Dinh Nguyen
> Acked-by: Marek Vasut
> Acked-by: Pavel Machek
Appl
On Tuesday, March 31, 2015 at 12:01:11 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Add a stub s_init function in the board file.
Why do you add this stub function ? The commit message should
clarify why the patch is needed.
> Signed-off-by: Dinh Nguyen
[...]
Best regard
On Tuesday, March 31, 2015 at 12:01:16 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> This sets the CPU clocks to 925MHz and DDR to 400MHz, and the correct
> CONFIG_HPS_MAINPLLGRP_VCO_NUMER should be 79.
Didn't various CV SX run at 800MHz only ? I think only some of them ran
a
On Tuesday, March 31, 2015 at 11:11:18 PM, Pavel Machek wrote:
> On Mon 2015-03-30 17:01:15, dingu...@opensource.altera.com wrote:
> > From: Dinh Nguyen
> >
> > Signed-off-by: Dinh Nguyen
> > ---
> > v3: Only report the failure
> > v2: Be a bit more verbose about the fail message
> > ---
> >
>
On Tuesday, March 31, 2015 at 12:01:09 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Signed-off-by: Dinh Nguyen
> Reviewed-by: Marek Vasut
Applied to u-boot-socfpga/next , thanks!
Best regards,
Marek Vasut
___
U-Boot mailing list
On Tuesday, March 31, 2015 at 11:00:17 PM, Pavel Machek wrote:
> On Mon 2015-03-30 17:01:08, dingu...@opensource.altera.com wrote:
> > From: Dinh Nguyen
> >
> > Add a call to checkboard along with sdram intilialization and
> > calibration.
> >
> > Signed-off-by: Dinh Nguyen
> > ---
> > v3: Use
On Tuesday, March 31, 2015 at 12:01:18 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration"
> incorrectly set the muxing for UART0 on the Cyclone V DK.
>
> This fixes it up so UART0 is working again.
>
> Sig
On Tuesday, March 31, 2015 at 12:01:12 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Signed-off-by: Dinh Nguyen
You know, you should really put more effort into writing those
commit messages ;-)
Applied to u-boot-socfpga/next , thanks!
Best regards,
Marek Vasut
___
On Tuesday, March 31, 2015 at 08:41:46 AM, Wolfgang Denk wrote:
> Dear dingu...@opensource.altera.com,
>
> In message
> <1427752878-18426-2-git-send-email-dingu...@opensource.altera.com> you
> wrote:
>
> ...
>
> > +/* Register: sdr.ctrlgrp.ctrlcfg
> > */
On Tuesday, March 31, 2015 at 12:01:05 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Add the calls in the spl_board_init to enable SDRAM, timer, and UART.
>
> Signed-off-by: Dinh Nguyen
> Acked-by: Marek Vasut
Applied to u-boot-socfpga/next , thanks!
Best regards,
Marek V
On Tuesday, March 31, 2015 at 12:01:06 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Signed-off-by: Dinh Nguyen
Applied to u-boot-socfpga/next , thanks!
Best regards,
Marek Vasut
___
U-Boot mailing list
U-Boot@lists.denx.de
http:/
On Tuesday, March 31, 2015 at 11:07:57 PM, Pavel Machek wrote:
> Hi!
>
> On Mon 2015-03-30 17:01:14, dingu...@opensource.altera.com wrote:
> > From: Dinh Nguyen
> >
> > Remap SDRAM to 0x0, and clear OCRAM's ECC in board_init_f().
> >
> > Signed-off-by: Dinh Nguyen
> > Reviewed-by: Marek Vasut
On Tuesday, March 31, 2015 at 12:01:07 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Signed-off-by: Dinh Nguyen
> Acked-by: Marek Vasut
Applied to u-boot-socfpga/next , thanks!
Best regards,
Marek Vasut
___
U-Boot mailing list
U-
On Tuesday, March 31, 2015 at 12:01:03 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> The Cyclone5 SoCFPGA has 64KB of OCRAM for SPL use.
>
> Signed-off-by: Dinh Nguyen
Applied to u-boot-socfpga/next . Thanks!
Best regards,
Marek Vasut
__
On Tuesday, March 31, 2015 at 12:01:10 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> For SoCFGPA, use the common ARMv7 lowlevel_init. Thus, we can delete the
> SoCFPGA lowlevel_init.S file.
>
> Signed-off-by: Dinh Nguyen
This patch I like :)
Applied to u-boot-socfpga/next
On Tuesday, March 31, 2015 at 12:01:17 AM, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Since we are already mapping sdram 0x0 in board_init_f, we can remove it
> here.
>
> Signed-off-by: Dinh Nguyen
> Reviewed-by: Marek Vasut
I'm kinda hesitant to apply this now, while we st
On Tue, 2015-03-31 at 11:02 -0400, Bill Pringlemeir wrote:
> On 2015-03-31 00:15, Scott Wood wrote:
>
> > Especially since you'd be doing one write rather than four full-page
> > "partial" writes. Surely the bottleneck here is the NAND chip itself,
> > not copying data to the buffer?
>
> The AHB
On 2 Apr 2015, ste...@agner.ch wrote:
> To improve performance we remember the current page in the buffer
> and avoid reading it twice. This implicit page cache increases
> complexity while does not increase performance in real world cases.
> This patch removes that feature.
> ---
> As discussed
On Thu, Apr 02, 2015 at 10:19:11AM -0600, Ulises Cardenas wrote:
> Hi,
> The aforementioned commit e04916a721a2069fc770412c57974d02e153ad18, causes
> MX6 boards to break
>
> Configuring CONFIG_SECURE_BOOT makes the u-boot build fail for any MX6 board.
> This was reproduced in mx6dl, mx6q and mx6
Back in fc46bae a "clean up" was introduced that intended to reconcile
some of the AM335x codepaths based on how AM43xx operates.
Unfortunately this introduced a regression on the DDR2 platforms. This
was un-noticed on DDR3 (everything except for Beaglebone White) as we
had already populated sdram
On Saturday, March 28, 2015 at 04:55:38 AM, Stephen Warren wrote:
> This doesn't make my LS keyboard work any better, but it does at least
> report the correct speed in "usb tree".
>
> Signed-off-by: Stephen Warren
Applied to topic/dwc2 , thanks! This will go into next release.
Best regards,
Ma
On Wednesday, April 01, 2015 at 04:18:43 PM, Sergey Temerkhanov wrote:
> This patch series contains USB fixes and enhancements for more complete
> support of 64-bit architectures
Applied all three to u-boot-usb/next , thanks!
Best regards,
Marek Vasut
_
On Monday, March 30, 2015 at 03:36:29 PM, Paul Kocialkowski wrote:
> Le lundi 30 mars 2015 à 10:06 +0200, Lukasz Majewski a écrit :
> > Hi Paul,
> >
> > > Signed-off-by: Paul Kocialkowski
> > > ---
> > >
> > > common/usb.c | 8
> > > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
On Monday, March 30, 2015 at 10:06:13 AM, Lukasz Majewski wrote:
> Hi Paul,
>
> > Signed-off-by: Paul Kocialkowski
> > ---
> >
> > common/cmd_fastboot.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c
> > index 346ab80..7956a5b 100
On Thursday, April 02, 2015 at 12:55:57 PM, maitysancha...@gmail.com wrote:
> Hello,
Hi!
[...]
> > > +#define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent
> > > Detection */ +
> > > +/* USBCMD */
> > > +#define UCMD_RUN_STOP(1 << 0) /* controller run/stop */
> > > +#def
On Friday, March 27, 2015 at 04:47:54 AM, Nikhil Badola wrote:
> This adjusts (micro)frame length to appropriate value thus
> avoiding USB devices to time out over a longer run
>
> Signed-off-by: Nikhil Badola
Hi,
it seems the XHCI driver from Freescale was never applied, since no
maintainer wa
Hi,
The aforementioned commit e04916a721a2069fc770412c57974d02e153ad18, causes MX6
boards to break
Configuring CONFIG_SECURE_BOOT makes the u-boot build fail for any MX6 board.
This was reproduced in mx6dl, mx6q and mx6sx. The log for the mx6q build is:
==
In file included from
/h
Hi,
On 2 April 2015 at 01:50, Albert ARIBAUD wrote:
>
> Hello Simon,
>
> On Mon, 30 Mar 2015 12:03:41 -0600, Simon Glass
> wrote:
>
> > Also you can argue that buffer management is a reasonable thing to
> > provide a method for. Using a buffer to receive a packet, sending that
> > packet for pro
Hi!
> >> Signed-off-by: Masahiro Yamada
> >> ---
> >>
> >> arch/arm/Kconfig | 6 ++
> >> configs/socfpga_arria5_defconfig | 3 ---
> >> configs/socfpga_cyclone5_defconfig | 3 ---
> >> configs/socfpga_socrates_defconfig | 3 ---
> >> 4 files changed, 6 insertions(+), 9 de
Hello Tom,
On 15-04-01 07:27:07, Tom Rini wrote:
> On Wed, Apr 01, 2015 at 03:24:17PM +0530, Sanchayan Maity wrote:
>
> > Hello,
> >
> > This patchset adds support for the Toradex Colibri Vybrid VF50 and VF61
> > modules. Boot up has been tested using the serial loader over UART.
> >
> > First
Hello,
On 15-04-01 21:15:21, Marek Vasut wrote:
> On Wednesday, April 01, 2015 at 11:54:22 AM, Sanchayan Maity wrote:
>
> The commit message is missing, please fix in v2.
Ok. Will add the commit message in v2.
>
> > Signed-off-by: Sanchayan Maity
>
> [...]
>
> > +#define USB_NC_REG_OFFSET
Implement read of OOB area only. When using column and sector size
properties, only parts of the page can be read. However, this works
only when hardware ECC is disabled, otherwise the ECC engine would
ruin the data in the buffer. To allow OOB only reads, three points
had to be addressed:
- Set ECC
To improve performance we remember the current page in the buffer
and avoid reading it twice. This implicit page cache increases
complexity while does not increase performance in real world cases.
This patch removes that feature.
---
As discussed in the other patchset...
http://thread.gmane.org/gma
With the most recent board firmware correct SDIO clock is 50MHz as
opposed to 25 MHz before.
Also set max frequency of MMC data exchange equal to SDIO clock -
because there's no way to transfer data faster than interface clock.
Signed-off-by: Alexey Brodkin
---
board/synopsys/axs101/axs101.c |
On Tue, 2015-03-31 at 13:20 +0300, Alexey Brodkin wrote:
> With recent changes in mother-board firmware DMA works properly with
> data cache enabled. So we enable data cache for the board in defconfig
> to gain significant improvement in performance.
Even though NAND controller seem to work fine n
Hello Simon,
On Mon, 30 Mar 2015 12:03:41 -0600, Simon Glass
wrote:
> Also you can argue that buffer management is a reasonable thing to
> provide a method for. Using a buffer to receive a packet, sending that
> packet for processing, and retiring the buffer are all conceptually
> separate thing
On 04/01/2015 03:40 PM, Stephen Warren wrote:
From: Stephen Warren
As best I can tell, CONFIG_SYS_LOAD_ADDR and CONFIG_LOADADDR/$loadaddr
serve essentially the same purpose. Roughly, if a command takes a load
address, then CONFIG_SYS_LOAD_ADDR or $loadaddr (or both) are the default
if the comma
Hello Sergey,
On Wed, 1 Apr 2015 18:15:03 +0300, Sergey Temerkhanov
wrote:
> This patchset is meant is created in preparation to submission of
> patch series which will add support of the Cavium ThunderX SoC.
> This series adds support of setting up 2-level page tables as
> well as functions whi
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