Hi,
-Original Message-
From: Hans de Goede [mailto:hdego...@redhat.com]
Sent: Thursday, June 04, 2015 6:15 PM
To: Wang Dongsheng-B40534; Sun York-R58495
Cc: i...@hellion.org.uk; albert.u.b...@aribaud.net; jan.kis...@siemens.com;
Jin
Zhengxiong-R64188; Wang Huan-B18965; Zhao
Hi Hans,
Thanks.
Regards,
-Dongsheng
-Original Message-
From: Hans de Goede [mailto:hdego...@redhat.com]
Sent: Friday, June 05, 2015 5:35 PM
To: Wang Dongsheng-B40534; Sun York-R58495
Cc: i...@hellion.org.uk; albert.u.b...@aribaud.net; jan.kis...@siemens.com;
Jin
Hi,
These are some NAND boot cleanups and NAND boot support for am43xx_evm.
cheers,
-roger
Roger Quadros (2):
am335x_evm: am44xx_evm: dra7xx_evm: nand: Fix file-system partition
name
am335x_evm: nand: Fix boot from NAND
Tom Rini (1):
am43xx_evm: Enable NAND boot
We almost always use UBIFS for user accessible NAND file systems and
the UBIFS file system might contain more than one volume within the
single NAND partition. The last NAND partition is therefore more
appropriately named as NAND.file-system instead of NAND.rootfs
The Linux kernel (as of v3.16)
AM43xx EVMs have NAND so enable it.
Signed-off-by: Roger Quadros rog...@ti.com
---
configs/am43xx_evm_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 4ad2667..29a3892 100644
---
Hello Hector,
I am not familiar with iMX6 based board.
I only know the DAT0 checking was introduced in commit
7a5b80297bc6cef0c10e5f57ac0450678dc7bc5e
And different cards may have different secure erase timeout value.
This should be found in chip datasheet.
But I've never meet your issue...
Use the correct partition names from with the Device Tree blob
and the kernel is picked up. Also use partition name instead of
number for the root filesystem in the kernel boot arguments.
Signed-off-by: Roger Quadros rog...@ti.com
---
include/configs/am335x_evm.h | 6 +++---
1 file changed, 3
Since some driver like ohci, lcd used dcache functions. But m68k don't
implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function
for all m68k cpu.
Also each cpu can implement its own implementation. If not
Since some driver like ohci, lcd used dcache functions. But some ARM
cpu don't implement the invalidate_dcache_range()/flush_dcache_range()
functions.
To avoid compiling errors this patch adds an weak empty stub function
for all ARM cpu.
And each cpu can implement its own implementation. If not
Remove the CONFIG_DM_USB limitation to enable cache support functions.
Tested on SAMA5D3x-EK board.
Signed-off-by: Josh Wu josh...@atmel.com
Acked-by: Hans de Goede hdego...@redhat.com
---
Changes in v2:
- CONFIG_DM_USB in periodic_unlink() should be remove as well. This
version remove it.
-
Hi,
On 05-06-15 10:41, Wang Dongsheng wrote:
Hi,
-Original Message-
From: Hans de Goede [mailto:hdego...@redhat.com]
Sent: Thursday, June 04, 2015 6:15 PM
To: Wang Dongsheng-B40534; Sun York-R58495
Cc: i...@hellion.org.uk; albert.u.b...@aribaud.net; jan.kis...@siemens.com; Jin
From: Tom Rini tr...@ti.com
Enable booting from NAND on the am437xx-evm.
Signed-off-by: Tom Rini tr...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
include/configs/am43xx_evm.h | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git
From: yassin yassinjaf...@gmail.com
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
include/linux/mtd/nand.h | 49
1 file changed, 49 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index bc927ec..b026110
Following up on earlier SPL patches, here a series based on Yassin Jaffer's
work to bring NAND support to U-boot. RFC because I know that the sunxi nand
configuration options are dependent on a work-in-progress by Daniel - trying
to deliver a single SPL for both MMC and NAND boot.
Given I have
From: yassin yassinjaf...@gmail.com
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
drivers/mtd/nand/Makefile | 2 +-
drivers/mtd/nand/nand_timings.c | 252
include/linux/mtd/nand.h| 3 +
3 files changed, 256 insertions(+), 1
From: yassin yassinjaf...@gmail.com
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
drivers/mtd/nand/nand_base.c | 1 +
include/linux/mtd/nand.h | 7 +++
2 files changed, 8 insertions(+)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c0e381a..dbeb092
Based on the default layout of the android image used at least on Olimex Lime
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
include/configs/sunxi-common.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index
Heavily based on BBrezillon's (downstream) driver. Most noticable
differences
- No per-partition ECC settings. Partitions in U-boot are quite
different from Linux
- U-boot register definitions, shared with sunxi_nand_spl
- FDT parsing in-line, there's no framework method yet
Signed-off-by: Roy
From: yassin yassinjaf...@gmail.com
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
drivers/mtd/nand/nand_base.c | 154 +++
include/linux/mtd/nand.h | 21 ++
2 files changed, 175 insertions(+)
diff --git a/drivers/mtd/nand/nand_base.c
From: yassin yassinjaf...@gmail.com
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
drivers/mtd/nand/nand_base.c | 101 ++-
1 file changed, 61 insertions(+), 40 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
Based on BBrezillons work, minus per-partition support. Changes to support
that would be quite invasive while it hasn't been solved yet for Linux.
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
drivers/mtd/nand/nand_base.c | 255 ++-
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
board/sunxi/Kconfig| 8 +++-
drivers/mtd/Makefile | 1 +
include/configs/sunxi-common.h | 33 +
3 files changed, 29 insertions(+), 13 deletions(-)
diff --git a/board/sunxi/Kconfig
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 41 ++
arch/arm/dts/sun7i-a20.dtsi | 90 +++
2 files changed, 131 insertions(+)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts
From: Tom Rini tr...@ti.com
The recent changes for hw leveling on am33xx were not intended for
DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config
value to check against. This lets us pass in the value we would use to
configure, when we have not yet configured the board yet. In
On AM57xx evm I2C5 is used to detect the LCD board by reading the
EEPROM present on the bus.
Enable i2c5 clocks to help that.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c | 7 +++
arch/arm/cpu/armv7/omap5/prcm-regs.c | 4
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
T1040D4RDB is re-designed T1040RDB board with following changes :
- Support of DDR4 memory
- Support of 0x66 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1
Assumes a UBI partition called boot
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
include/config_distro_bootcmd.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 3a360ca4..361b914
On Fri, Jun 05, 2015 at 12:42:20PM +0300, Roger Quadros wrote:
We almost always use UBIFS for user accessible NAND file systems and
the UBIFS file system might contain more than one volume within the
single NAND partition. The last NAND partition is therefore more
appropriately named as
On Fri, Jun 05, 2015 at 12:43:46PM +0300, Roger Quadros wrote:
From: Tom Rini tr...@ti.com
Enable booting from NAND on the am437xx-evm.
Signed-off-by: Tom Rini tr...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Tom Rini tr...@konsulko.com
--
Tom
signature.asc
On Fri, Jun 05, 2015 at 12:42:21PM +0300, Roger Quadros wrote:
Use the correct partition names from with the Device Tree blob
and the kernel is picked up. Also use partition name instead of
number for the root filesystem in the kernel boot arguments.
Signed-off-by: Roger Quadros
On Fri, Jun 05, 2015 at 03:19:21PM +0530, Lokesh Vutla wrote:
On AM57xx evm I2C5 is used to detect the LCD board by reading the
EEPROM present on the bus.
Enable i2c5 clocks to help that.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Sigh, and we need to figure out which LCD we have to
On Fri, Jun 05, 2015 at 03:51:11PM +0530, Lokesh Vutla wrote:
From: Tom Rini tr...@ti.com
The recent changes for hw leveling on am33xx were not intended for
DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config
value to check against. This lets us pass in the value we would
On Fri, Jun 05, 2015 at 11:09:02AM +0300, Roger Quadros wrote:
AM43xx EVMs have NAND so enable it.
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Tom Rini tr...@konsulko.com
But please start thinking about converting some of these choices to real
Kconfig options instead, thanks!
On Friday, June 05, 2015 at 09:47:30 AM, Josh Wu wrote:
Since some driver like ohci, lcd used dcache functions. But some ARM
cpu don't implement the invalidate_dcache_range()/flush_dcache_range()
functions.
To avoid compiling errors this patch adds an weak empty stub function
for all ARM
On Friday, June 05, 2015 at 06:19:16 AM, Badola Nikhil wrote:
-Original Message-
From: Nikhil Badola [mailto:nikhil.bad...@freescale.com]
Sent: Tuesday, May 12, 2015 2:58 PM
To: u-boot@lists.denx.de
Cc: Badola Nikhil-B46172
Subject: [PATCH] drivers:usb:fsl: Return if
Hi Everyone,
I'm trying to make an i.mx28 board work with a Goldcap attached to the Battery
pin for RTC backup. This does not work out of the box, but I found a number of
useful tips to work with. Most of these tips either refer to the imx bootlets
or to code of spl_power_init.c where the mxs
Hi Andre,
On 4 June 2015 at 17:58, Andre Przywara o...@andrep.de wrote:
From: Rob Herring r...@kernel.org
Currently, u-boot will always fixup the DT memory node on ARM. If the dtb
has correct memory information, then we don't want or need u-boot to touch
the memory node. Allow platforms to
Hi Tom,
This includes QEMU support, PIRQ routing using device tree and pinctrl
using device tree.
The following changes since commit d8abb46b37fadff0349adb376df6d3ecd09ee7d1:
board/BuR/common: fix netconsole (2015-06-02 12:58:51 -0400)
are available in the git repository at:
+Tom
On 5 June 2015 at 08:18, Simon Glass s...@chromium.org wrote:
Hi Tom,
This includes QEMU support, PIRQ routing using device tree and pinctrl
using device tree.
The following changes since commit d8abb46b37fadff0349adb376df6d3ecd09ee7d1:
board/BuR/common: fix netconsole
Hi Tom,
This includes some fixes and tidy-ups, mostly for sandbox.
The following changes since commit d8abb46b37fadff0349adb376df6d3ecd09ee7d1:
board/BuR/common: fix netconsole (2015-06-02 12:58:51 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-dm.git
for you to
Hi Simon,
On Fri, Jun 5, 2015 at 11:34 PM, Simon Glass s...@chromium.org wrote:
On 4 June 2015 at 04:28, Bin Meng bmeng...@gmail.com wrote:
The call to FspInitEntry is done in arch/x86/lib/fsp/fsp_car.S so far.
It worked pretty well but looks not that good. Apart from doing too
much work than
Hi Tom,
A few things I found in patchwork.
The following changes since commit d8abb46b37fadff0349adb376df6d3ecd09ee7d1:
board/BuR/common: fix netconsole (2015-06-02 12:58:51 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-fdt.git
for you to fetch changes up to
Hi Bin,
On 4 June 2015 at 20:03, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Jun 5, 2015 at 2:31 AM, Simon Glass s...@chromium.org wrote:
Hi,
On 4 June 2015 at 10:27, Andrew Bradford and...@bradfordembedded.com wrote:
Hi Bin,
On 06/04 22:21, Bin Meng wrote:
Hi Simon,
On
Hi Tom,
On 4 June 2015 at 10:22, Tom Warren twar...@nvidia.com wrote:
Simon,
Tried applying your patchset. Two or three had minor 'git am' conflicts that
were easy to resolve with 'patch', but #11 (tegra: Allow board-specific init)
conflicts with Mashiro's move of board.c to board2.c in
Hi.
0001-fix-timer-summary-display-value-overflow.patch
Description: Binary data
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Based on Venice2, may change as P2571 board is fully
brought up. Incorporates Stephen Warren's P2571 pinmux table.
Signed-off-by: Tom Warren twar...@nvidia.com
---
arch/arm/mach-tegra/tegra210/Kconfig | 7 +
board/nvidia/{beaver = p2571}/Kconfig | 6 +-
Great progress
If you are looking for ASL support there is some BSD-licensed code at
https://svn.code.sf.net/p/edk2/code/trunk/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT
for example.
ASL should be reasonable portable across various boot loader infrastructure
codebase technologies - edkII,
Please help, I am Looking for Open outstanding bugs list for u-boot.
I could not find any central place, where bugs list been tracked.
Thanks,
Atul
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi,
On 05-06-15 17:11, York Sun wrote:
On 06/05/2015 02:39 AM, Wang Dongsheng-B40534 wrote:
Hi Hans,
Thanks.
Regards,
-Dongsheng
-Original Message-
From: Hans de Goede [mailto:hdego...@redhat.com]
Sent: Friday, June 05, 2015 5:35 PM
To: Wang Dongsheng-B40534; Sun York-R58495
Cc:
All based off of Tegra124. As a Tegra210 board is brought
up, these may change a bit to match the HW more closely,
but probably 90% of this is identical to T124.
Signed-off-by: Tom Warren twar...@nvidia.com
---
arch/arm/include/asm/arch-tegra210/ahb.h | 91 ++
Derived from Tegra124, modify as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too.
Note that the 'empty' Kconfig for Tegra210 will cause
an innocuous build warning, but it'll go away when a
real T210 board is instantiated.
Signed-off-by: Tom Warren
Based on T124 Venice2. SDMMC1 is SD-card slot.
Using tegra124 compat names for now to get everything
working. May need minor work to match the real board.
Signed-off-by: Tom Warren twar...@nvidia.com
---
arch/arm/dts/Makefile | 3 +-
.../{tegra124-venice2.dts =
Adds support for Tegra210 SoC and P2571 NVIDIA board.
Largely based on T124/Venice2. This is a baseline
patchset - more will follow to make things more T210-
specific as P2571 peripherals/devices are brought up.
Tom Warren (4):
ARM: Tegra210: Add SoC code/include files for T210
ARM: Tegra210:
Hi Bin,
On 4 June 2015 at 06:09, Bin Meng bmeng...@gmail.com wrote:
New microcode for BayTrail-I D0 stepping.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
[snip]
Does this code supersede the existing one or do we need both?
Regards,
Simon
___
Hi Bin,
On 5 June 2015 at 09:57, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Jun 5, 2015 at 11:34 PM, Simon Glass s...@chromium.org wrote:
On 4 June 2015 at 04:28, Bin Meng bmeng...@gmail.com wrote:
The call to FspInitEntry is done in arch/x86/lib/fsp/fsp_car.S so far.
It worked
Hi Bin,
On 4 June 2015 at 04:28, Bin Meng bmeng...@gmail.com wrote:
Currently the FSP execution environment GDT is setup by U-Boot in
arch/x86/cpu/start16.S, which works pretty well. But if we try to
move the FspInitEntry call a little bit later to better fit into
U-Boot's initialization
Hi Simon,
On Fri, Jun 5, 2015 at 11:34 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 June 2015 at 04:28, Bin Meng bmeng...@gmail.com wrote:
Currently the FSP execution environment GDT is setup by U-Boot in
arch/x86/cpu/start16.S, which works pretty well. But if we try to
move the
On 4 June 2015 at 13:16, Andrew Bradford and...@bradfordembedded.com wrote:
On 06/04 18:28, Bin Meng wrote:
Add RESET_SEG_START, RESET_SEG_SIZE and RESET_VEC_LOC Kconfig options
and make arch/x86/cpu/config.mk use these options.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
On 4 June 2015 at 04:28, Bin Meng bmeng...@gmail.com wrote:
The call to FspInitEntry is done in arch/x86/lib/fsp/fsp_car.S so far.
It worked pretty well but looks not that good. Apart from doing too
much work than just enabling CAR, it cannot read the configuration
data from device tree at
On Fri, Jun 05, 2015 at 01:02:16PM +0900, Masahiro Yamada wrote:
Hi Joe,
2015-06-05 2:54 GMT+09:00 Joe Hershberger joe.hershber...@gmail.com:
Hi Masahiro-san,
On Thu, Jun 4, 2015 at 12:29 PM, Masahiro Yamada
yamada.masah...@socionext.com wrote:
Hi.
2015-06-04 7:55 GMT+09:00
On 06/05/2015 02:39 AM, Wang Dongsheng-B40534 wrote:
Hi Hans,
Thanks.
Regards,
-Dongsheng
-Original Message-
From: Hans de Goede [mailto:hdego...@redhat.com]
Sent: Friday, June 05, 2015 5:35 PM
To: Wang Dongsheng-B40534; Sun York-R58495
Cc: i...@hellion.org.uk;
This series expands Nyan-big support:
- Enable Chrome OS EC, so that the keyboard works
- Add some extra clock and pre-kernel init required for reliable operation
- Add Chrome OS environment variables, including 'run nvboot' to allow
booting Chrome OS more easily
Still missing are audio and USB.
With the rename the MAINTAINER file was not updated. Fix it and the
'Chrombook' typo in Kconfig.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
arch/arm/mach-tegra/tegra124/Kconfig | 2 +-
board/nvidia/nyan-big/MAINTAINERS| 2 +-
2 files changed, 2
Add a simple function to enable external clocks.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/arch-tegra/clock.h | 8
arch/arm/mach-tegra/clock.c | 17 +
2 files changed, 25 insertions(+)
This series expands Nyan-big support:
- Enable Chrome OS EC, so that the keyboard works
- Add some extra clock and pre-kernel init required for reliable operation
- Add Chrome OS environment variables, including 'run nvboot' to allow
booting Chrome OS more easily
Still missing are audio and USB.
This series expands Nyan-big support:
- Enable Chrome OS EC, so that the keyboard works
- Add some extra clock and pre-kernel init required for reliable operation
- Add Chrome OS environment variables, including 'run nvboot' to allow
booting Chrome OS more easily
Still missing are audio and USB.
At present the driver does not properly honour the requested SPI CS
deactivation delay since the SPI bus is changed in the claim_bus() method.
Everything the claim_bus() method does can be done when the device is probed
(setting the speed and mode) and at the start of a new transfer (where the
This is required in order to avoid instability when running from caches
after the kernel starts.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/arch-tegra124/flow.h | 12
arch/arm/mach-tegra/powergate.c | 20
There are some missing entries in the tables. Add them.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/arch-tegra124/clock-tables.h | 12 ++--
arch/arm/mach-tegra/tegra124/clock.c | 2 +-
2 files changed, 7
Enable the EC and keyboard, using the SPI bus.
The EC driver requires a particular format and a deactivation delay. Also
U-Boot does not support interrupts.
For now, adjust the device tree to comply. At some point we should tidy
this up to support interrupts and make tegra and exynos use the
A harmless but confusing warning is displayed when looking up the
DisplayPort PLL. Correct this.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
arch/arm/mach-tegra/clock.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
Add a hook to allows boards to add their own init to board_init().
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/arch-tegra/sys_proto.h | 7 +++
arch/arm/mach-tegra/board2.c| 8 ++--
2 files changed, 13
When setting up large environment variables we can exceed 16 arguemnts.
Increase this to avoid problems.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
include/configs/tegra-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
We need to turn on all audio-related clocks for the Chrome OS kernel to
boot. Otherwise it will hang when trying to enable audio.
Also for Linux set up graphics driver video protection.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Remove unnecessary
Use the correct function for clock init.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
drivers/video/tegra124/tegra124-lcd.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/video/tegra124/tegra124-lcd.c
We need to match the device tree in the FIT with the U-Boot model so we
can automatically select the right device tree. Also adjust the load address
so that the device tree is not in the way when a zImage kernel tries to
extract itself.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in
This requires a change to stdin to include the 'cros-ec-keyb' input device.
Put this in the common file, enabled by the relevant CONFIG.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
include/configs/tegra-common-post.h | 8 +++-
1 file changed, 7
Bring these in if they are provided by the board.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
include/configs/tegra-common-post.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/configs/tegra-common-post.h
On Fri, 2015-06-05 at 13:52 +0200, Roy Spliet wrote:
From: yassin yassinjaf...@gmail.com
Signed-off-by: Roy Spliet r.spl...@ultimaker.com
---
drivers/mtd/nand/Makefile | 2 +-
drivers/mtd/nand/nand_timings.c | 252
Hi Tom,
On 5 June 2015 at 14:39, Simon Glass s...@chromium.org wrote:
This series expands Nyan-big support:
- Enable Chrome OS EC, so that the keyboard works
- Add some extra clock and pre-kernel init required for reliable operation
- Add Chrome OS environment variables, including 'run
Use the oscillator as the source clock when we cannot achieve a low-enough
speed with the peripheral clock. This happens when we request 3MHz on a SPI
clock, for example.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2: None
drivers/spi/tegra114_spi.c | 18
On 05/06/2015 09:47, Josh Wu wrote:
Since some driver like ohci, lcd used dcache functions. But m68k don't
implement the invalidate_dcache_range()/flush_dcache_range() functions.
To avoid compiling errors this patch adds an weak empty stub function
for all m68k cpu.
Also each cpu can implement
Hi,
Am 28.05.2015 um 23:49 schrieb Naitik Amin:
I am using Altera SOC, under my includes, I have a file called
/include/configs/socfpga_common.h
In this file, I have #define as below.
#define PHYS_SDRAM_1_SIZE 0x2000
If this #define is set to 0x2000, and uboot is
Hi Simon,
On Sat, Jun 6, 2015 at 12:13 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 June 2015 at 06:09, Bin Meng bmeng...@gmail.com wrote:
New microcode for BayTrail-I D0 stepping.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
[snip]
Does this code supersede the existing one
Simon,
Applied to u-boot-tegra/master, then I rebased against u-boot/master and
uploaded it back to denx.de/u-boot-tegra/master. ./MAKEALL -s tegra works OK.
I didn't test on any real HW - my nyan-big system is offline temporarily.
PTAL and let me know if it's working OK and I'll get a PR out
On Fri, 5 Jun 2015 08:12:25 -0600
Simon Glass s...@chromium.org wrote:
Hi Simon,
thanks for taking a look.
On 4 June 2015 at 17:58, Andre Przywara o...@andrep.de wrote:
From: Rob Herring r...@kernel.org
Currently, u-boot will always fixup the DT memory node on ARM. If
the dtb has
Hi Simon,
On Sat, Jun 6, 2015 at 12:17 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 June 2015 at 20:03, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Jun 5, 2015 at 2:31 AM, Simon Glass s...@chromium.org wrote:
Hi,
On 4 June 2015 at 10:27, Andrew Bradford
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