On Monday, July 20, 2015 at 11:51:36 AM, Lukasz Majewski wrote:
> The following changes since commit
> 8c4735c56b93019916e391cc3542cea14763d9fb:
> [2/1839]
>
> drivers: usb: fsl: Remove LS102XA immap inclusion (2015-06-26
> 16:33:56 +0200)
>
> are available in the git repository at:
>
> gi
Trivial fix.
Signed-off-by: Michal Simek
---
board/xilinx/zynq/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
index 20522fba5097..fd5d6fe950c7 100644
--- a/board/xilinx/zynq/Makefile
+++ b/board/xilinx/zynq/Ma
Trivial fix.
Signed-off-by: Michal Simek
---
drivers/spi/zynq_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index c5c3e1044fda..45ed7d94a93f 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -79,7 +79,
Hi Simon,
On Wed, Jul 22, 2015 at 6:00 AM, Simon Glass wrote:
> Hi Bin,
>
> On 21 July 2015 at 10:12, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Jul 7, 2015 at 6:47 AM, Simon Glass wrote:
>>> At present all PCI devices must be present in the device tree in order to
>>> be used. Many or most PCI
Hi Simon,
On Wed, Jul 22, 2015 at 7:37 AM, Simon Glass wrote:
> Hi Bin,
>
> On 21 July 2015 at 09:37, Bin Meng wrote:
>> On Tue, Jul 21, 2015 at 8:15 PM, Bin Meng wrote:
>>> Currently cpu-x86 driver is probed only for SMP. We add the same
>>> support for UP when there is only one cpu node in th
On Mon, 20 Jul 2015 14:17:45 -0500
Joe Hershberger wrote:
> Hi Lukasz,
>
> On Mon, Jul 20, 2015 at 1:59 PM, Lukasz Majewski
> wrote:
> > Hi Joe,
> >
> >> Hi Lukasz,
> >>
> >> On Thu, Jul 16, 2015 at 2:59 PM, Lukasz Majewski
> >> wrote:
> >> > Hi Joe,
> >> >
> >> > Thank you for your review.
>
On 20/07/15 23:19, Simon Glass wrote:
> Hi Minkyu,
>
> On 2 July 2015 at 18:15, Simon Glass wrote:
>> This series adds a number of fixes and improvements to driver model as
>> well as two new uclasses (video bridges and I2c muxes).
>>
>> The series is aimed at adding support for spring (HP 11 Chr
Hi Hans,
On 21 July 2015 at 13:52, Hans de Goede wrote:
> Hi,
>
> On 07/20/2015 05:49 PM, Simon Glass wrote:
>>
>> Hi Hans,
>>
>>
>> On 20 July 2015 at 09:31, Hans de Goede wrote:
>>>
>>> Hi,
>>>
>>> On 20-07-15 04:23, Simon Glass wrote:
Hi Hans,
I've been thinking about
Hi Masahiro,
On 21 July 2015 at 12:19, Masahiro Yamada wrote:
> Hi Simon,
>
>
> 2015-07-18 23:36 GMT+09:00 Simon Glass :
>> Hi Masahiro,
>>
>> On 13 July 2015 at 02:29, Masahiro Yamada
>> wrote:
>>> This GPIO controller device is used on UniPhier SoCs.
>>>
>>> Signed-off-by: Masahiro Yamada
>>
On Wednesday, July 22, 2015 at 12:46:15 AM, Dinh Nguyen wrote:
> On 07/20/2015 02:40 PM, Marek Vasut wrote:
> > On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote:
> > [...]
> >
> > Hi,
> >
> > yeah, I have some insane amount of cleanup patches and fixes already.
> > I wil
Hi Chris,
On 18 July 2015 at 03:49, Chris Packham wrote:
> To make it easier to use patman on other projects add a distutils style
> installer. Now patman can be installed with
>
> cd u-boot/tools/patman && python setup.py install
>
> There are also the usual distutils options for creating sour
Hi Bin,
On 21 July 2015 at 15:06, Albert ARIBAUD wrote:
> Hello Bin,
>
> On Tue, 21 Jul 2015 20:21:28 +0800, Bin Meng wrote:
>> Hi Albert,
>>
>> On Tue, Jul 21, 2015 at 8:19 PM, Albert ARIBAUD
>> wrote:
>> > Hello Bin,
>> >
>> > On Tue, 21 Jul 2015 00:55:13 -0700, Bin Meng wrote:
>> >> For som
From: Fabio Estevam
Warp has a MAX77696 PMIC connected via I2C1 bus.
Add support for it.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- None
board/warp/warp.c | 50 ++
From: Fabio Estevam
Add support for MAX77696 PMIC.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Fix the range of PMIC registers
drivers/power/pmic/Makefile| 1 +
drivers/power/pmic/pmic_max77696.c | 32
include/power/max77696_pmic.h | 61
From: Stephen Warren
The sysboot and pxe commands currently support either U-Boot formats or
raw zImages. Add support for the AArch64 Linux port's native image format
too.
As with zImage support, there is no auto-detection of the native image
format. Rather, if the image is auto-detected as a U-
From: Fabio Estevam
The variable 'ret' is used to store the value returned by pfuze_mode_init(),
so it should be of type 'int' instead of 'unsigned int' in order to
correctly handle negative numbers.
Fix the variable type.
Signed-off-by: Fabio Estevam
---
board/freescale/mx6sxsabresd/mx6sxsab
Hi Bin,
On 21 July 2015 at 09:37, Bin Meng wrote:
> On Tue, Jul 21, 2015 at 8:15 PM, Bin Meng wrote:
>> Currently cpu-x86 driver is probed only for SMP. We add the same
>> support for UP when there is only one cpu node in the deive tree.
>>
>> Signed-off-by: Bin Meng
>>
>> ---
>>
>> Changes in
From: Fabio Estevam
The variable 'ret' is used to store the value returned by pfuze_mode_init(),
so it should of type 'int' instead of 'unsigned int' in order to correctly
handle negative numbers.
Fix the variable type.
Signed-off-by: Fabio Estevam
---
board/freescale/mx6sabresd/mx6sabresd.c
On 07/20/2015 02:40 PM, Marek Vasut wrote:
> On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote:
> [...]
> Hi,
>
> yeah, I have some insane amount of cleanup patches and fixes already. I
> will post them once I'm done. What I am sorely missing is the UniPHY
> register in
From: Fabio Estevam
Add support for MAX77696 PMIC.
Signed-off-by: Fabio Estevam
---
drivers/power/pmic/Makefile| 1 +
drivers/power/pmic/pmic_max77696.c | 32
include/power/max77696_pmic.h | 60 ++
3 files changed, 93 inser
From: Fabio Estevam
Warp has a MAX77696 PMIC connected via I2C1 bus.
Add support for it.
Signed-off-by: Fabio Estevam
---
board/warp/warp.c | 50 ++
include/configs/warp.h | 1
Hi Bin,
On 21 July 2015 at 10:12, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Jul 7, 2015 at 6:47 AM, Simon Glass wrote:
>> At present all PCI devices must be present in the device tree in order to
>> be used. Many or most PCI devices don't require any configuration other than
>> that which is done
On Wed, Jul 08, 2015 at 11:51:39AM -0400, Vitaly Andrianov wrote:
> Keystone2 SOC physical DDR3 address range is outside the first 4GB and
> cannot be entirely accessible without MMU enabled. Only first 2GB of
> the physical memory have 32-bits aliased addresses. This patch adds u-boot
> shell com
Hi Joe,
On 20 July 2015 at 12:10, Joe Hershberger wrote:
> Hi Simon,
>
> On Mon, Jul 20, 2015 at 8:56 AM, Simon Glass wrote:
>> Hi Joe,
>>
>> On 8 July 2015 at 15:07, Simon Glass wrote:
>>> Hi Joe,
>>>
>>> On 8 July 2015 at 14:43, Joe Hershberger wrote:
Hi Simon,
On Wed, Jul 8,
Hi Bin,
On 19 July 2015 at 20:38, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Jul 20, 2015 at 9:59 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 18 July 2015 at 10:20, Bin Meng wrote:
>>> In driver model, each pci bridge device has its own hose structure.
>>> hose->first_busno points to the bridge dev
On Monday 20 July 2015, 23:00:04 wrote Alexander Stein:
> Now that mailbox driver supports cache flush and invalidation, we can
> enable dcache.
>
> Signed-off-by: Alexander Stein
Well, I just noticed that the dwc2 driver does not support dache yet.
I'm on the way to add that there too and will
On 21 July 2015 at 06:15, Bin Meng wrote:
> Currently during writing MP table I/O interrupt assignment entry, we
> assume the PIRQ is directly mapped to I/O APIC INTPIN#16-23, which
> however is not always the case on some platforms.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - Drop
On 21 July 2015 at 06:15, Bin Meng wrote:
> We should mark PCIe ECAM address range in the E820 table as reserved
> otherwise kernel will not attempt to use ECAM.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - New patch to reserve PCIe ECAM address range in the E820 table
>
> arch/x86
On 21 July 2015 at 06:15, Bin Meng wrote:
> Enable writing MP table for QEMU boads (i440fx and q35).
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - Drop QEMU mp_init patch
> - Change /cpus node to include just one cpu
>
> arch/x86/cpu/qemu/pci.c | 34
Hello Bin,
On Tue, 21 Jul 2015 20:21:28 +0800, Bin Meng wrote:
> Hi Albert,
>
> On Tue, Jul 21, 2015 at 8:19 PM, Albert ARIBAUD
> wrote:
> > Hello Bin,
> >
> > On Tue, 21 Jul 2015 00:55:13 -0700, Bin Meng wrote:
> >> For some unknown reason, buildman does not report build error
> >> when build
On Fri, Jul 17, 2015 at 07:47:44AM +, Egli, Samuel wrote:
> Hi Tom,
> I stumbled over your commit b352dde1ea715e8481946ec7d8086b3c3eb126ae
> where you removed timer_init() from .../am33xx/board.c.
>
> In the commit message it's written that timer_init will be called
> earlier. However, sinc
2015-07-21 22:28 GMT+02:00 Simon Glass :
>
> Hi
>
> Also it's pretty easy to just copy over the kernel files. They should just
> work!
>
> Regards,
> Simon
Ok, will give it a go then.
--
Med Vänliga Hälsningar / Best Regards
***
Hi,
On 21 July 2015 at 09:56, Stephen Warren wrote:
> On 07/21/2015 03:36 AM, Mirza Krak wrote:
>>
>> From: Mirza Krak
>>
>> Add the device tree node for the SPI controllers found on Tegra20 SOCs.
>
>
>> diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
>
>
>> + spi@7000d4
Hi Andrew,
On 10 July 2015 at 12:24, Andrew Bradford wrote:
> Hi Simon,
>
> On 07/10 06:53, Simon Glass wrote:
>> Hi,
>>
>> On 8 July 2015 at 05:30, Andrew Bradford wrote:
>> > Hi Bin,
>> >
>> > On 07/08 11:18, Bin Meng wrote:
>> >> Hi Andrew,
>> >>
>> >> On Wed, Jul 8, 2015 at 3:16 AM, wrote:
Hi,
On 07/20/2015 05:49 PM, Simon Glass wrote:
Hi Hans,
On 20 July 2015 at 09:31, Hans de Goede wrote:
Hi,
On 20-07-15 04:23, Simon Glass wrote:
Hi Hans,
I've been thinking about the USB unbinding code. I know that I agreed
to go with it, but in retrospect I think that was a mistake.
I b
Hi Simon,
2015-07-18 23:36 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 13 July 2015 at 02:29, Masahiro Yamada
> wrote:
>> This GPIO controller device is used on UniPhier SoCs.
>>
>> Signed-off-by: Masahiro Yamada
>> ---
>>
>> drivers/gpio/Kconfig | 6 ++
>> drivers/gpio/Makefile
CONFIG_MUSB_HDC should be CONFIG_MUSB_HCD to have any effect.
Signed-off-by: Paul Kocialkowski
---
include/configs/nokia_rx51.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index efc583f..6e3ce4d 100644
--- a/incl
Hi,
On 07/19/2015 06:01 AM, Hans de Goede wrote:
Hi,
On 13-07-15 16:16, Bin Liu wrote:
Hi,
On 07/11/2015 08:04 AM, Hans de Goede wrote:
Hi,
On 10-07-15 17:31, Bin Liu wrote:
Hi,
On 07/10/2015 10:12 AM, Heiko Schocher wrote:
Hello Samuel,
Am 10.07.2015 um 16:50 schrieb Egli, Samuel:
Hi
Hi Fabio,
> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Monday, July 20, 2015 7:50 PM
> To: Alonso Lazcano Adrian-B38018
> Cc: U-Boot-Denx; Stefano Babic; Estevam Fabio-R49496; Otavio Salvador
> Subject: Re: [U-Boot] [PATCH 15/15][v2] imx: mx7dsabresd: Add
Le lundi 20 juillet 2015 à 17:13 +0200, Heiko Schocher a écrit :
> Hello Paul,
>
> Am 20.07.2015 um 15:30 schrieb Paul Kocialkowski:
> >> I am just on the jump into my holidays, so I have not yet the time
> >> to test it ... I want to try it for all builds with the scripts
> >> I posted with my v2
Le lundi 20 juillet 2015 à 07:45 -0700, Vagrant Cascadian a écrit :
> On 2015-07-20, Paul Kocialkowski wrote:
> > In order to achieve reproducible builds in U-Boot, timestamps that are
> > defined
> > at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH
> > environment
> > variable
Hi Simon,
On Tue, Jul 7, 2015 at 6:47 AM, Simon Glass wrote:
> At present all PCI devices must be present in the device tree in order to
> be used. Many or most PCI devices don't require any configuration other than
> that which is done automatically by U-Boot. It is inefficent to add a node
> wi
On 07/21/2015 03:36 AM, Mirza Krak wrote:
From: Mirza Krak
Add the device tree node for the SPI controllers found on Tegra20 SOCs.
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
+ spi@7000d400 {
+ compatible = "nvidia,tegra20-slink";
+
On Tue, Jul 21, 2015 at 8:15 PM, Bin Meng wrote:
> Currently cpu-x86 driver is probed only for SMP. We add the same
> support for UP when there is only one cpu node in the deive tree.
>
> Signed-off-by: Bin Meng
>
> ---
>
> Changes in v2:
> - New patch to allow cpu-x86 driver to be probed for UP
On Mon, Jul 20, 2015 at 08:04:26AM -0600, Simon Glass wrote:
> Hi Tom,
>
> A few things in my queue. I would like to do a sync with upstream
> libfdt too but have not got to that yet.
>
>
> The following changes since commit 605e15db2b54302364a2528d3c6604fbc57be846:
>
> Merge git://git.denx.
On Mon, Jul 20, 2015 at 02:07:27PM -0700, York Sun wrote:
> Tom,
>
> The following changes since commit 605e15db2b54302364a2528d3c6604fbc57be846:
>
> Merge git://git.denx.de/u-boot-x86 (2015-07-15 10:41:20 -0400)
>
> are available in the git repository at:
>
>
> git://git.denx.de/u-boot-f
On 7/15/2015 12:32 AM, Tom Rini wrote:
> On Thu, Jul 09, 2015 at 12:10:03PM +0530, Vignesh R wrote:
>>
>>
>> On 07/03/2015 05:12 PM, Tom Rini wrote:
>>> On Fri, Jul 03, 2015 at 04:46:10PM +0530, Vignesh R wrote:
>>>
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
>>>
Hi Albert,
On Tue, Jul 21, 2015 at 8:19 PM, Albert ARIBAUD
wrote:
> Hello Bin,
>
> On Tue, 21 Jul 2015 00:55:13 -0700, Bin Meng wrote:
>> For some unknown reason, buildman does not report build error
>> when building commit 06c4b7e. This commit is to correct the
>> build error and needs to be sq
Hello Bin,
On Tue, 21 Jul 2015 00:55:13 -0700, Bin Meng wrote:
> For some unknown reason, buildman does not report build error
> when building commit 06c4b7e. This commit is to correct the
> build error and needs to be squashed into commit 06c4b7e.
Which repository and branch contains this commi
Enable writing MP table for QEMU boads (i440fx and q35).
Signed-off-by: Bin Meng
---
Changes in v2:
- Drop QEMU mp_init patch
- Change /cpus node to include just one cpu
arch/x86/cpu/qemu/pci.c | 34 +++---
arch/x86/dts/qemu-x86_i440fx.dts | 12 +++
Turn on PCIe ECAM address range decoding on Q35.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/qemu/pci.c | 4
arch/x86/include/asm/arch-qemu/qemu.h | 4
2 files changed, 8 insertions(+)
diff --git a/arch/x86/cpu/qemu/pci.c b/arch
Currently cpu-x86 driver is probed only for SMP. We add the same
support for UP when there is only one cpu node in the deive tree.
Signed-off-by: Bin Meng
---
Changes in v2:
- New patch to allow cpu-x86 driver to be probed for UP
arch/x86/cpu/cpu.c | 7 +++
1 file changed, 7 insertions(+)
The PIIX3 chipset does not integrate an I/O APIC, instead it supports
connecting to an external I/O APIC which needs to be enabled manually.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v2: None
arch/x86/cpu/qemu/pci.c | 7 ++-
arch/x86/include/asm/arch-qemu/
Currently during writing MP table I/O interrupt assignment entry, we
assume the PIRQ is directly mapped to I/O APIC INTPIN#16-23, which
however is not always the case on some platforms.
Signed-off-by: Bin Meng
---
Changes in v2:
- Drop patches that are already applied
- Add a TODO comment above
We should mark PCIe ECAM address range in the E820 table as reserved
otherwise kernel will not attempt to use ECAM.
Signed-off-by: Bin Meng
---
Changes in v2:
- New patch to reserve PCIe ECAM address range in the E820 table
arch/x86/Kconfig| 10 ++
arch/x86/lib/fsp/fsp_dra
On some platforms the I/O APIC interrupt pin#0-15 may be connected
to platform pci devices' interrupt pin. In such cases the legacy ISA
IRQ is not available so we should not write ISA interrupt entry if
it is already occupied.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v2: Non
This patch series mainly add MP support to QEMU as well as some
other necessary fixes for x86.
Verified by booting Linux kernel on QEMU i440FX and Q35, and make
sure I/O APIC interrupt is being used by the kernel with the help
of MP table provided by U-Boot.
This series is the prerequisite for th
2015-07-21 11:02 GMT+02:00 Thierry Reding :
>
> On Mon, Jul 20, 2015 at 01:41:00PM +0200, Mirza Krak wrote:
> > From: Mirza Krak
> >
> > Add the device tree node for the SPI controllers found on Tegra20 SOCs.
> >
> > Signed-off-by: Mirza Krak
> >
> > ---
> > arch/arm/dts/tegra20.dtsi | 44 ++
From: Mirza Krak
Add the device tree node for the SPI controllers found on Tegra20 SOCs.
Signed-off-by: Mirza Krak
---
Changes in v2:
* Dropped tegra30-slink compatible string, based on comment from Thierry Reding
on v1 patch
arch/arm/dts/tegra20.dtsi | 44 ++
On Mon, Jul 20, 2015 at 01:41:00PM +0200, Mirza Krak wrote:
> From: Mirza Krak
>
> Add the device tree node for the SPI controllers found on Tegra20 SOCs.
>
> Signed-off-by: Mirza Krak
>
> ---
> arch/arm/dts/tegra20.dtsi | 44
> 1 file changed, 44
On Tuesday, July 21, 2015 at 10:15:21 AM, Peng Fan wrote:
> Follow linux dma flow:
> Before DMA read, be sure to invalidate the cache over the address
> range of DMA buffer to prevent cache coherency problems.
> After DMA read, invalidate dcache again.
>
> Signed-off-by: Peng Fan
> Acked-by: Mare
Follow linux dma flow:
Before DMA read, be sure to invalidate the cache over the address
range of DMA buffer to prevent cache coherency problems.
After DMA read, invalidate dcache again.
Signed-off-by: Peng Fan
Acked-by: Marek Vasut
---
Changes v2:
Add Marek's Acked by
drivers/mtd/nand/mxs_n
If ecc chunk data size is 512 and oobsize is bigger than 512, there is
a chance that block_mark_bit_offset conflicts with bch ecc area.
The following graph is modified from kernel gpmi-nand.c driver with
each data block 512 bytes. We can see that Block Mark conflicts with
ecc area from bch view. W
Check maximum ecc strength for each platfrom to avoid the calculated ecc
exceed the limitation.
Signed-off-by: Peng Fan
Signed-off-by: Han Xu
Reviewed-by: Marek Vasut
---
Changes v2:
Add Marek's reviewed by.
drivers/mtd/nand/mxs_nand.c | 9 -
1 file changed, 8 insertions(+), 1 delet
Hi Albert,
On 21.07.2015 09:37, Albert ARIBAUD wrote:
On Mon, 20 Jul 2015 11:20:38 +0200, Stefan Roese wrote:
To use this offset for other boot device (like SDIO/MMC), lets rename
it to a more generic name. This will be used be the SDIO/MMC SPL boot
support for the A38x.
Hmm, what if SPL get
Hi Albert,
On 21.07.2015 09:24, Albert ARIBAUD wrote:
On Mon, 20 Jul 2015 11:20:36 +0200, Stefan Roese wrote:
This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since
I don't know of a way to test the boot-device upon runtime, this patch
hardcodes the spl_boot_device instead.
Not
For some unknown reason, buildman does not report build error
when building commit 06c4b7e. This commit is to correct the
build error and needs to be squashed into commit 06c4b7e.
Signed-off-by: Bin Meng
---
arch/x86/cpu/ivybridge/lpc.c | 1 -
arch/x86/cpu/ivybridge/sdram.c | 32
Hello Stefan,
On Mon, 20 Jul 2015 11:20:38 +0200, Stefan Roese wrote:
> To use this offset for other boot device (like SDIO/MMC), lets rename
> it to a more generic name. This will be used be the SDIO/MMC SPL boot
> support for the A38x.
Hmm, what if SPL gets support for booting from several sou
Hello Stefan,
On Mon, 20 Jul 2015 11:20:36 +0200, Stefan Roese wrote:
> This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since
> I don't know of a way to test the boot-device upon runtime, this patch
> hardcodes the spl_boot_device instead.
Not sure about 6820, but for 6710 this in
Hi Heiko,
> [root@pollux dfu-util]# ./src/dfu-util -l
> dfu-util 0.8
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2014 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to dfu-u...@lists.
Hello David J,
On Mon, 20 Jul 2015 22:17:49 +, Chou, David J
wrote:
> Hello Albert,
>
> You are right. it seems the "file' program in my Ubuntu- 12.04.5 LTS system
> doesn't have the aarch64 database of signatures as you said. But If I moved
> the 64 bit u-boot I built in my Ubuntu- 12.04
Hi Heiko,
> ported from linux:
>
> b2ba27a5c56ff: usb: gadget: at91_udc: move prepare clk into process
> context
>
IMHO, presented above description is not enough. I'd prefer to see one
patch which adds the code from linux - including the exact commit
message.
Then, u-boot specific adjustments
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