On 18.09.2015 08:34, Pavel Machek wrote:
Hi!
With this patch:
=> tftp 10 big-40mb
Speed: 1000, full duplex
Using dwmac.ff702000 device
TFTP from server 192.168.1.54; our IP address is 192.168.1.252
Filename 'big-40mb'.
Load address: 0x10
Loading:
Hi!
> >>With this patch:
> >>=> tftp 10 big-40mb
> >>Speed: 1000, full duplex
> >>Using dwmac.ff702000 device
> >>TFTP from server 192.168.1.54; our IP address is 192.168.1.252
> >>Filename 'big-40mb'.
> >>Load address: 0x10
> >>Loading:
Convert altera_jtag_uart to driver model.
Signed-off-by: Thomas Chou
---
v2
add ioremap.
make the change to dts compatible with linux.
v3
use fdt address translation patch from Stefan Roese.
fix watchdog and loop as Marek suggested.
v4
add clear AC flag to probe().
remove polling l
Hi Pavel,
On 18.09.2015 08:16, Pavel Machek wrote:
On Thu 2015-09-17 17:30:29, Stefan Roese wrote:
By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache
policy is selected. This leads to much better performance on the SoCFPGA.
A quick network test shows this:
Without this patch:
On Thu 2015-09-17 17:30:29, Stefan Roese wrote:
> By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache
> policy is selected. This leads to much better performance on the SoCFPGA.
> A quick network test shows this:
>
> Without this patch:
> => tftp 10 big-40mb
> Speed: 1000, ful
Hi,
i am currently starting development software for a new B&R board based
on the ZYNQ7000.
To make live easier i want to try start with the Xilinx Evalboard ZC702,
get there some experience to start afterwards with my own board.
I have allready built "zynq_zc702_defconfig" - but have no pl
Convert altera_uart to driver model.
Signed-off-by: Thomas Chou
Reviewed-by: Simon Glass
---
v2
fix coding style as Marek suggested.
arch/nios2/dts/3c120_devboard.dts | 1 +
drivers/serial/Kconfig| 6 ++
drivers/serial/altera_uart.c | 169 +---
On Thu, 2015-09-17 at 22:36 -0500, Gong Qianyu-B52263 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, September 18, 2015 4:16 AM
> > To: Gong Qianyu-B52263
> > Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> > Zhiqiang-B48286; Song Wenbin-B537
On Thu, 2015-09-17 at 22:49 -0500, Xie Shaohui-B21989 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, September 18, 2015 2:05 AM
> > To: Gong Qianyu-B52263
> > Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> > Zhiqiang-B48286; Song Wenbin-B537
On 10 September 2015 at 14:55, Peter Griffin wrote:
> DRAM region 0x3f00 - 0x3fff is reserved for OP-TEE. Touching
> 0x3f00 memory location from unsecure world causes the board
> to hang.
>
> Signed-off-by: Peter Griffin
> ---
> include/configs/hikey.h | 3 ++-
> 1 file changed, 2 in
Hi Peter,
On 10 September 2015 at 14:55, Peter Griffin wrote:
> Use DM for the pl01x serial driver on hikey. Also allow UART0 or
> UART3 to be chosen via Kconfig.
>
> By default we now output to UART3 as the latest version of ATF outputs
> to this UART. Also UART3 comes out on the LS connector, a
Hi,
On 17 September 2015 at 21:29, Marek Vasut wrote:
>
> On Friday, September 18, 2015 at 05:24:18 AM, Thomas Chou wrote:
> > Convert altera_uart to driver model.
> >
> > Signed-off-by: Thomas Chou
> > ---
>
> Hi!
>
> minor nitpicks below :)
Looks good to me also.
Reviewed-by: Simon Glass
Y
On 10 September 2015 at 14:55, Peter Griffin wrote:
> This causes exceptions and other strange behaviour
> when enabling CONFIG_SYS_MALLOC_F_LEN which is required to
> migrate the serial driver over to DM_SERIAL.
>
> As GD_FLG_FULL_MALLOC_INIT flag gets reset, after relocation
> we don't end up us
Hi Peter,
On 9 September 2015 at 15:13, Peter Griffin wrote:
> Rather than relying on an external URL in the README
> include the Makefile in the hikey directory.
>
> Signed-off-by: Peter Griffin
> ---
> board/hisilicon/hikey/build-tf.mak | 42
> ++
> 1 file
On 10 September 2015 at 14:55, Peter Griffin wrote:
> Signed-off-by: Peter Griffin
> ---
> arch/arm/include/asm/arch-hi6220/hi6220.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm/include/asm/arch-hi6220/hi6220.h
> b/arch/arm/include/asm/arch-hi6220/hi6220.h
> index 4b987c
On 10 September 2015 at 14:55, Peter Griffin wrote:
> Most platforms enable these options from Kconfig rather
> than the configs header file.
>
> Signed-off-by: Peter Griffin
> ---
> arch/arm/Kconfig| 2 ++
> include/configs/hikey.h | 2 --
> 2 files changed, 2 insertions(+), 2 deletions
On 10 September 2015 at 14:55, Peter Griffin wrote:
> Use the #defines in linux/sizes for malloc size as it is
> more readable.
Debatable, but it's your board :-)
Reviewed-by: Simon Glass
>
> Signed-off-by: Peter Griffin
> ---
> include/configs/hikey.h | 4 +++-
> 1 file changed, 3 insertion
Hi Peter,
On 9 September 2015 at 15:13, Peter Griffin wrote:
> The README had a few mistakes, and one of the URL's
> had changed. Also update the boot log with the latest
> boot trace from ATF, which now includes the mcuimage.bin.
>
> Signed-off-by: Peter Griffin
> ---
> board/hisilicon/hikey/R
> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, September 18, 2015 4:16 AM
> To: Gong Qianyu-B52263
> Cc: u-boot@lists.denx.de; Hu Mingkai-B21284; Sun York-R58495; Hou
> Zhiqiang-B48286; Song Wenbin-B53747; Xie Shaohui-B21989; Wood Scott-
> B07421
> Subject: Re: [Patch v2 11
Convert altera_uart to driver model.
Signed-off-by: Thomas Chou
---
arch/nios2/dts/3c120_devboard.dts | 1 +
drivers/serial/Kconfig| 6 ++
drivers/serial/altera_uart.c | 153 ++
include/configs/nios2-generic.h | 9 +--
4 files changed,
On Friday, September 18, 2015 at 05:24:18 AM, Thomas Chou wrote:
> Convert altera_uart to driver model.
>
> Signed-off-by: Thomas Chou
> ---
Hi!
minor nitpicks below :)
> -typedef volatile struct {
> +struct altera_uart_regs {
> unsignedrxdata; /* Rx data reg */
> u
On Thu, Sep 17, 2015 at 04:43:33PM +0200, Lukasz Majewski wrote:
> Hi Tom,
>
> > On Monday, September 14, 2015 at 01:22:20 PM, Lukasz Majewski wrote:
> > > Hi Alexey,
> > >
> > > > Hi Marek, Lukasz,
> > > >
> > > > On Sun, 2015-09-13 at 16:00 +0200, Marek Vasut wrote:
> > > > > On Sunday, Septe
This is not necessary / useful when not building with CONFIG_SANDBOX and
with the addition of ubifs support to the generic fs commands it actually
gets in the way, since both operate on a fake / NULL blkdev.
Signed-off-by: Hans de Goede
---
Changes in v2:
-New patch in v2 of the patch-set
---
di
From: Roy Spliet
Under the assumptions of having a UBI volume called boot, containing
a ubifs filesystem.
Signed-off-by: Roy Spliet
Signed-off-by: Hans de Goede
Acked-by: Stephen Warren
---
Changes in v2:
-Added Stephen's ack
---
include/config_distro_bootcmd.h | 19 +++
1 fi
Modify the ubifs u-boot wrapper function prototypes for generic fs use,
and give them their own header file.
This is a preparation patch for adding ubifs support to the generic fs
code from fs/fs.c.
Signed-off-by: Hans de Goede
Reviewed-by: Heiko Schocher
---
Changes in v2:
-No changes in v2
--
Add generic fs support, so that commands like ls, load and test -e can be
used on ubifs.
Signed-off-by: Hans de Goede
Reviewed-by: Heiko Schocher
---
Changes in v2:
-Do not allow building in both hostfs and ubifs support as both use NULL
as magic blkdev
---
disk/part.c | 27 ++
Implement the necessary functions for implementing generic fs support
for ubifs.
Signed-off-by: Hans de Goede
Reviewed-by: Heiko Schocher
---
Changes in v2:
-Use debug rather then printf in ubifs_set_blk_dev() to avoid false
positive error messages when using generic fs commands
---
fs/ubifs/u
Hi,
On 09/17/2015 12:52 PM, Bernhard Nortmann wrote:
This patch series builds upon
http://lists.denx.de/pipermail/u-boot/2015-September/226515.html
http://lists.denx.de/pipermail/u-boot/2015-September/226688.html
v2 combines the previous submissions, and adds some suggested
fixes/changes.
v3 i
Hi,
On 09/17/2015 12:52 PM, Bernhard Nortmann wrote:
This patch extends the misc_init_r() function on sunxi boards
to test for the presence of a suitable "sunxi" SPL header. If
found, and the loader ("fel" utility) provided a non-zero value
for the boot.scr address, then the corresponding enviro
On Thu, Sep 17, 2015 at 12:56:04PM -0600, Simon Glass wrote:
> Hi Tom,
>
> Here are the rest of the quark networkng support, plus fixes for Linux
> booting, etc.
>
>
> The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:
>
> Merge git://git.denx.de/u-boot-fdt (2015-09
On Thu, Sep 17, 2015 at 12:53:35PM -0600, Simon Glass wrote:
> Hi Tom,
>
> The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:
>
> Merge git://git.denx.de/u-boot-fdt (2015-09-16 09:53:37 -0400)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boo
Tested on Pandaboard
Signed-off-by: Tom Rini
---
include/configs/ti_omap4_common.h |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/configs/ti_omap4_common.h
b/include/configs/ti_omap4_common.h
index 1cd7dae..741f71f 100644
--- a/include/configs/ti_omap4_common
Tested on J6Eco EVM.
Signed-off-by: Tom Rini
---
configs/dra72_evm_defconfig |2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/dra72_evm_defconfig b/configs/dra72_evm_defconfig
index 3205e72..dbf65d0 100644
--- a/configs/dra72_evm_defconfig
+++ b/configs/dra72_evm_defconfig
@@ -1,6
Tested on J6Eco EVM
Signed-off-by: Tom Rini
---
include/configs/ti_omap5_common.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/ti_omap5_common.h
b/include/configs/ti_omap5_common.h
index 189ea7e..9fc33aa 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/c
Use the sandbox environment for the basic tests.
Reviewed-by: Simon Glass
Tested-by: Simon Glass
Signed-off-by: Nishanth Menon
---
Changes since V1:
- Comment cleanup (dropped '..')
- Picked up Simon's Tested and Reviewed tags from V2
V2: https://patchwork.ozlabs.org/patch/511
Many System on Chip(SoC) solutions are complex with multiple
processors on the same die dedicated to either general purpose of
specialized functions. Many examples do exist in today's SoCs from
various vendors. Typical examples are micro controllers such as an ARM
M3/M0 doing a offload of specific
Introduce a dummy driver for sandbox that allows us to verify basic
functionality. This is not meant to do anything functional - but is
more or less meant as a framework plumbing debug helper.
The sandbox remoteproc driver maintains absolutey no states and is a
simple driver which just is filled w
Many System on Chip(SoC) solutions are complex with multiple processors
on the same die dedicated to either general purpose of specialized
functions. Many examples do exist in today's SoCs from various vendors.
Typical examples are micro controllers such as an ARM M3/M0 doing a
offload of specific
Introduce dummy devices for sandbox remoteproc device and enable it by
default
Reviewed-by: Simon Glass
Signed-off-by: Nishanth Menon
---
Changes since V2:
- Picked up Simon's reviewed-by from V2.
V2: https://patchwork.ozlabs.org/patch/511750/
V1: https://patchwork.ozlabs.org/patch/510
On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
>
>
> +/* NAND SPL */
> +#ifdef CONFIG_NAND_BOOT
> +#define CONFIG_SPL_PBL_PAD
> +#define CONFIG_SPL_FRAMEWORK
> +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
> +#define CONFIG_SPL_TARGET"u-boot-with-s
On Wed, 2015-09-16 at 04:25 -0500, Gong Qianyu-B52263 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, September 16, 2015 6:33 AM
> > To: Gong Qianyu-B52263
> > Cc: u-boot@lists.denx.de; Xie Shaohui-B21989; Hou Zhiqiang-B48286; Hu
> > Mingkai-B21284; Song Wenbi
Hi Tom,
Here are the rest of the quark networkng support, plus fixes for Linux
booting, etc.
The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:
Merge git://git.denx.de/u-boot-fdt (2015-09-16 09:53:37 -0400)
are available in the git repository at:
git://git.denx.d
On 10 September 2015 at 00:20, Bin Meng wrote:
> Now we have enabled PCIe root port on Quark SoC, add its PIRQ
> routing information in the device tree as well.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Glass
> ---
>
> Changes in v2: None
>
> arch/x86/dts/galileo.dts | 12
> 1
On 10 September 2015 at 00:20, Bin Meng wrote:
> Thermal sensor on Quark SoC needs to be properly initialized per
> Quark firmware writer guide, otherwise when booting Linux kernel,
> it triggers system shutdown because of wrong temperature in the
> thermal sensor is detected by the kernel driver
On 10 September 2015 at 00:20, Bin Meng wrote:
> Not like other Intel Ethernet controllers (e.g.: E1000), Intel Quark
> SoC integrated designware Ethernet controller does not have a chipset
> defined way to store/restore mac address. Enable random mac address
> so that we can use Ethernet even wit
On 10 September 2015 at 00:20, Bin Meng wrote:
> Desktop Management Interface (DMI) is not supported by U-Boot now.
> Add it to the TODO list.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Glass
> ---
>
> Changes in v2: None
>
> doc/README.x86 | 2 ++
> 1 file changed, 2 insertions(+)
Applied
On 14 September 2015 at 19:54, Simon Glass wrote:
> On 14 September 2015 at 01:07, Bin Meng wrote:
>> Quark SoC does not support MSR MTRRs. Fixed and variable range MTRRs
>> are accessed indirectly via the message port and not the traditional
>> MSR mechanism. Only UC, WT and WB cache types are s
On 10 September 2015 at 00:20, Bin Meng wrote:
> Document porting considerations for Intel Quark based board,
> including MRC parameters and PCIe initialization.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Glass
>
> ---
>
> Changes in v2:
> - Update per review comments from Simon
>
> doc/READ
Hi Tom,
The following changes since commit fa43ce842c3026c2abf19d4234d02cd4c62eeec0:
Merge git://git.denx.de/u-boot-fdt (2015-09-16 09:53:37 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-dm.git
for you to fetch changes up to 6aa8179f818f04a16e15bc589004de68a6d99a2
On 10 September 2015 at 00:20, Bin Meng wrote:
> When Linux kernel boots, it hangs at:
>
> [0.829408] Intel Quark side-band driver registered
>
> This happens when Quark kernel Isolated Memory Region (IMR) driver
> tries to lock an IMR register to protect kernel's text and rodata
> sections. H
On 10 September 2015 at 00:20, Bin Meng wrote:
> On Intel Quark, lots of registers on the message port need be
> programmed. Add handy clrbits, setbits, clrsetbits macros for
> message port access.
>
> Signed-off-by: Bin Meng
> Reviewed-by: Simon Glass
>
> ---
>
> Changes in v2:
> - Change all m
On 10 September 2015 at 00:20, Bin Meng wrote:
> Change existing codes to use clrbits, setbits, clrsetbits macros.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Glass
> ---
>
> Changes in v2: None
>
> arch/x86/cpu/quark/quark.c | 72
> ++
> 1 file ch
On 11 September 2015 at 04:24, Bin Meng wrote:
> This adds static register programming for PCIe and USB after memory
> init as required by Quark firmware writer guide. Although not doing
> this did not cause any malfunction, just do it for safety.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Gla
On 11 September 2015 at 04:24, Bin Meng wrote:
> Convert to use DM version of Designware ethernet driver on Intel
> quark/galileo.
>
> Signed-off-by: Bin Meng
> Acked-by: Simon Glass
>
> ---
>
> Changes in v5: None
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/cpu/quark/quark.c | 19
On 15 September 2015 at 07:51, Simon Glass wrote:
> On 11 September 2015 at 04:24, Bin Meng wrote:
>> Introduce device_is_on_pci_bus() which can be utilized by driver
>> to test if a device is on a PCI bus.
>>
>> Signed-off-by: Bin Meng
>>
>> ---
>>
>> Changes in v5:
>> - Move the inline API fro
On 15 September 2015 at 08:20, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Sep 15, 2015 at 9:51 PM, Simon Glass wrote:
>> On 11 September 2015 at 04:24, Bin Meng wrote:
>>> The Designware ethernet controller is also seen on PCI bus, e.g.
>>> on Intel Quark SoC. Add this support in the DM version dri
=> ums 0 mmc 0 (Mounts the micro SD)
=> ums 0 mmc 1 (Mounts the eMMC)
=> ums 0 mmc 2 (Mounts the big SD)
Signed-off-by: Otavio Salvador
---
include/configs/cgtqmx6eval.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6e
Add me as the board maintainer and move the status to 'Maintained'.
Signed-off-by: Otavio Salvador
---
board/congatec/cgtqmx6eval/MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/congatec/cgtqmx6eval/MAINTAINERS
b/board/congatec/cgtqmx6eval/MAINTAINERS
i
The printf can be put in a single line of code, so make it
simpler
Signed-off-by: Otavio Salvador
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
b/board/congatec/cgtqmx6eval/cgtqmx6eval.
On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> This patch fixes such compile warnings:
>
> drivers/net/fm/eth.c: In function 'fm_eth_recv':
> drivers/net/fm/eth.c:549:11: warning: cast to pointer from integer of
> different size [-Wint-to-pointer-cast]
> data = (u8 *)in_be32(&rxbd->
On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> From: Shaohui Xie
>
> The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
> and PPC, move it out of ppc to include/, and change the path in
> drivers accordingly.
>
> Signed-off-by: Shaohui Xie
> Signed-off-by: Gong Qianyu
On Thu, 2015-09-17 at 15:06 +0800, Gong Qianyu wrote:
> From: Shaohui Xie
>
> MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
> plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
> FMANs, so we should only define MDIO controller base on FMAN2 when there
This patch makes use of the previous changes to add a new "fel" boot
target for sunxi boards.
When booting via FEL, it's often desirable to work around the absence
of other (usable) boot devices - or to be able to override them,
deviating from the standard boot sequence. To achieve this, the "fel"
This patch extends the misc_init_r() function on sunxi boards
to test for the presence of a suitable "sunxi" SPL header. If
found, and the loader ("fel" utility) provided a non-zero value
for the boot.scr address, then the corresponding environment
variable fel_scriptaddr gets set.
misc_init_r() a
This patch series builds upon
http://lists.denx.de/pipermail/u-boot/2015-September/226515.html
http://lists.denx.de/pipermail/u-boot/2015-September/226688.html
v2 combines the previous submissions, and adds some suggested
fixes/changes.
v3 introduces another patch at the start of the series to al
The sunxi platform currently doesn't seem to make any use of the
asm/arch-sunxi/spl.h file. This patch moves some declarations from
tools/mksunxiboot.c into it.
This enables us to reuse those definitions when extending the
sunxi board code (boards/sunxi/boards.c).
Signed-off-by: Bernhard Nortmann
This patch follows up on a discussion of ways to improve support
for the sunxi FEL ("USB boot") mechanism, especially with regard
to boot scripts, see:
https://groups.google.com/d/msg/linux-sunxi/wBEGUoLNRro/rHGq6nSYCQAJ
The idea is to convert the (currently unused) "pad" bytes in the
SPL header i
On Tue, Sep 15, 2015 at 10:04 PM, Tom Rini wrote:
> On Mon, Sep 07, 2015 at 06:18:15PM +0300, Sergey Temerkhanov wrote:
>
>> This patch adds code which sets up 2-level page tables on ARM64 thus
>> extending available VA space. CPUs implementing 64k translation
>> granule are able to use direct PA-
Hi Tom,
> On Monday, September 14, 2015 at 01:22:20 PM, Lukasz Majewski wrote:
> > Hi Alexey,
> >
> > > Hi Marek, Lukasz,
> > >
> > > On Sun, 2015-09-13 at 16:00 +0200, Marek Vasut wrote:
> > > > On Sunday, September 13, 2015 at 12:03:18 PM, Lukasz Majewski
> > > > wrote:
> > > > > Hi Marek,
> >
Fabio Estevam-2 wrote
> I meant "different parents for the uart clock"
Fabio, that would make sense why it doesn't work when setting 2014 u-boot
CSCDR1 to the value in 2009 u-boot. I can check all the combinations of
clock division I want and it's never going to work since the parent is
different.
The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
endianness before the job is submitted.
2. The read/write of physical addresses t
On Thu, Sep 03, 2015 at 12:47:07PM +0200, Stefan Roese wrote:
> As reported by Simon Guinot, commit ade741b3
> "arm: mvebu: Call timer_init early before PHY and DDR init" breaks
> Kirkwood platforms. As the static variable "init_done" is not
> available at that early boot time. This patch moves it
Hi!
Am 16.09.2015 um 03:00 schrieb Siarhei Siamashka:
On Mon, 14 Sep 2015 15:15:29 +0200
Bernhard Nortmann wrote:
This patch extends the misc_init_r() function on sunxi boards
to test for the presence of a suitable "sunxi" SPL header. If
found, and the loader ("fel" utility) provided a non-ze
For the Chain of Trust, the esbc_validate command supports
32 bit fields for location of the image. In the header structure
definition, these were declared as pointers which made them
64 bit on a 64 bit core.
Signed-off-by: Aneesh Bansal
---
Changes in v3:
Patch Rebased and removed compile time w
Data types and I/O functions have been defined for
64 bit physical addresses in arm.
Signed-off-by: Aneesh Bansal
---
Changes in v3:
Corrected the definition of virt_to_phys() and definition of phys_addr_t.
arch/arm/include/asm/io.h| 4 ++--
arch/arm/include/asm/types.h | 10 +++---
2
On Thursday, September 17, 2015 at 05:30:29 PM, Stefan Roese wrote:
> By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache
> policy is selected. This leads to much better performance on the SoCFPGA.
> A quick network test shows this:
>
> Without this patch:
> => tftp 10 big-40m
Hi Tom,,
> Hi,
>
> > It is very common that FAT code is using following pattern:
> > if (disk_{read|write}() < 0)
> > return -1;
> >
> > Up till now the above code was dead, since disk_{read|write) could
> > only return value >= 0.
> > As a result some errors from medium layer (i.e. eMMC
By not defining CONFIG_SYS_ARM_CACHE_WRITEALLOC, the WRITEBACK cache
policy is selected. This leads to much better performance on the SoCFPGA.
A quick network test shows this:
Without this patch:
=> tftp 10 big-40mb
Speed: 1000, full duplex
Using dwmac.ff702000 device
TFTP from server 192.168.
Add me as Maintainer for the aristainetos2b board.
Signed-off-by: Heiko Schocher
---
board/aristainetos/MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/aristainetos/MAINTAINERS b/board/aristainetos/MAINTAINERS
index 78c9b69..b463f7b 100644
--- a/board/aristainetos/MAINTAIN
From: Shaohui Xie
Remove the redundant byte swap of the ucode before uploading to IRAM.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
drivers/net/fm/eth.c | 69 +++-
drivers/net
Signed-off-by: Gong Qianyu
Signed-off-by: Hou Zhiqiang
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
---
V2:
-Removed unecessary NAND_PAGE_SIZE in ls1043a_common.h.
-Fixed "select SUPPORT_SPL" in arch/arm/Kconfig.
-Used CONFIG_FSL_IFC instead of SPL_NAND_SUPPORT for init_early_memctl
From: Mingkai Hu
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.
Signed-off-by: Li Yang
Signed-off-by: Hou Zhiqiang
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
V2:
remove FSL_LS102xA_DEVDISR3_PCIE from immap_lsch2.h
From: Mingkai Hu
LS1043ARDB Specification:
-
Memory subsystem:
* 2GByte DDR4 SDRAM (32bit but)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 16 Mbyte high-speed SPI memory
* SD connector to interface with the SD memory card
Ethernet:
* XFI 10G po
From: Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
and PPC, move it out of ppc to include/, and change the path in
drivers accordingly.
Signed-off-by: Shaohui Xie
Signed-off-by: Gong Qianyu
---
arch/powerpc/include/asm/fsl_dtsec.h| 231 --
From: Shaohui Xie
phy_shutdown should be wrapped by CONFIG_PHYLIB.
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
drivers/net/fm/eth.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index cd05dbc..67c96a2
From: Shaohui Xie
QSGMII PCS needed to be programmed same as SGMII PCS, and there are
four ports in QSGMII PCS, port 0, 1, 2, 3, all the four ports shared
port 0's MDIO controller, so when programming port 0, we continue to
program other three ports.
Signed-off-by: Shaohui Xie
Signed-off-by: Mi
Signed-off-by: Gong Qianyu
---
board/freescale/ls1043ardb/ls1043ardb.c | 8 +++
board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg | 7 ++
configs/ls1043ardb_sdcard_defconfig | 4
include/configs/ls1043a_common.h | 30
i
Signed-off-by: Gong Qianyu
---
board/freescale/ls1043ardb/cpld.c | 17 +
board/freescale/ls1043ardb/cpld.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/board/freescale/ls1043ardb/cpld.c
b/board/freescale/ls1043ardb/cpld.c
index 5acb97d..faa0de8 100644
--- a/board/frees
From: Yangbo Lu
This patch adds esdhc support for ls1043ardb.
Signed-off-by: Yangbo Lu
Signed-off-by: Gong Qianyu
---
arch/arm/cpu/armv8/fsl-lsch2/cpu.c | 10 ++
arch/arm/cpu/armv8/fsl-lsch2/fdt.c | 6 ++
arch/arm/cpu/armv8/fsl-lsch2/speed.c | 18 +-
drivers/m
Signed-off-by: Gong Qianyu
---
board/freescale/ls1043ardb/cpld.c | 18 ++
board/freescale/ls1043ardb/cpld.h | 1 +
2 files changed, 19 insertions(+)
diff --git a/board/freescale/ls1043ardb/cpld.c
b/board/freescale/ls1043ardb/cpld.c
index 3f1101e..5acb97d 100644
--- a/board/free
From: Shaohui Xie
Signed-off-by: Hou Zhiqiang
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
arch/arm/cpu/armv8/fsl-lsch2/cpu.c | 19 +
arch/arm/cpu/armv8/fsl-lsch2/fdt.c | 7 ++
arch/arm/cpu/armv8/fsl-lsch2/speed.c| 23 ++
board
This patch fixes such compile warnings:
drivers/net/fm/eth.c: In function 'fm_eth_recv':
drivers/net/fm/eth.c:549:11: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
data = (u8 *)in_be32(&rxbd->buf_ptr_lo);
drivers/net/fm/fm.c: In function 'fm_muram_alloc':
From: Shaohui Xie
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
FMANs, so we should only define MDIO controller base on FMAN2 when there
is FMAN2.
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
get_clocks() should not be limited by ESDHC.
Signed-off-by: Gong Qianyu
---
common/board_f.c | 2 +-
include/configs/BSC9132QDS.h | 1 +
include/configs/MPC8308RDB.h | 1 +
include/configs/MPC837XEMDS.h | 1 +
include/configs/MPC837XERDB.h | 1 +
include/config
From: Mingkai Hu
Config Security Level Register is different between different SoCs,
so put the CSL register definition into the arch speicific directory.
Signed-off-by: Mingkai Hu
Signed-off-by: Gong Qianyu
---
V2:
Create include/fsl_csu.h instead of board/freescale/common/ns_access.h
arch/a
Hello Kevin,
Am 16.09.2015 um 22:58 schrieb Kevin Smith:
Some of the debug functions for UBI are preprocessed out for U-boot
(ifndef __UBOOT__), but their calls are optimized out at higher
optimization levels, so this does not cause a problem. When building
with -O0, the linker gives an error:
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