Hi Peng,
On 23/09/2015 05:13, Peng Fan wrote:
> Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch
> only take i.MX6/7 into consideration.
>
> "c3c8a5748897b24f18618047804317167a531dd3 imx-common: fix iomux settings"
>
> Use is_soc_type(MXC_CPU_MX7) to avoid breaking o
I2C1 can work on ls102xa rev2.0 SD boot, so add
ID EEPROM for SD boot.
Signed-off-by: Yuan Yao
---
include/configs/ls1021atwr.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 7dcb719..59e704e 100644
--- a/include/configs/ls1
Hi Fabio,
> From: Fabio Estevam
>
> The dfu_alt_info_spl variable allows passing a starting point
> for the binary to be flashed in the SPI NOR.
>
> For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means
> that we want to flash the binary starting at address 0x400.
>
> In order t
On 23 September 2015 at 01:27, Otavio Salvador
wrote:
> On Tue, Sep 22, 2015 at 4:11 PM, Jagan Teki wrote:
>> On 12 September 2015 at 19:27, Otavio Salvador
>> wrote:
>>> +static void spinor_protect(void)
>>> +{
>>> + struct spi_flash *spi;
>>> +
>>> + spi = spi_flash_probe(CONFIG_E
Hi Stephen,
> On 09/03/2015 08:18 AM, Lukasz Majewski wrote:
> > Hi Lukasz,
> >
> >> Hi Tom,
> >>
> >>> On Thu, Sep 03, 2015 at 02:21:39PM +0200, Lukasz Majewski wrote:
> >>>
> It is very common that FAT code is using following pattern:
> if (disk_{read|write}() < 0)
> retu
Hi Tobias,
> The sdhci_host struct is allocated in s5p_sdhci_init() but the
> fields are not initialized.
>
> Signed-off-by: Tobias Jakobi
> ---
> drivers/mmc/s5p_sdhci.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
> index 4db51d6.
Hi Tobias,
> exynos_mmc_init() always returns zero, so for the caller
> it looks like it never fails.
>
> Correct this by returning the error code of process_nodes().
> For process_nodes() do something similar and return early
> when do_sdhci_init() fails.
>
> Signed-off-by: Tobias Jakobi
> ---
Hi Tobias,
> + ret = sdhci_get_config(blob, node, host);
> + if (ret) {
> + printf("%s: failed to decode dev %d (%d)\n",
> __func__, i, ret); return -1;
My only commit here is regarding leaving return -1 as it is now. I
think, that it would be better to
Hi Tobias,
> The CD check is currently inverted. dm_gpio_get_value() returns
> one when a card is detected. All other values (zero when there
> is no card, or negative values for the internal errors) indicate
> failure.
>
> Signed-off-by: Tobias Jakobi
> ---
> drivers/mmc/s5p_sdhci.c | 20 +
Hi Lukasz,
> Hi Tobias,
>
> > The CD check is currently inverted. dm_gpio_get_value() returns
> > one when a card is detected. All other values (zero when there
> > is no card, or negative values for the internal errors) indicate
> > failure.
> >
> > Signed-off-by: Tobias Jakobi
> > ---
> > dr
Hi,
On 14-08-15 01:16, Marek Vasut wrote:
On Monday, April 27, 2015 at 10:40:18 AM, Hans de Goede wrote:
Hi,
Hi again!
On 27-04-15 03:09, Marek Vasut wrote:
On Friday, March 27, 2015 at 09:47:25 AM, Hans de Goede wrote:
Hi,
Hi!
[...]
scanning usb for storage devices... 1 St
Hi.
On 09/23/2015 06:39 PM, Lukasz Majewski wrote:
> Hi Tobias,
>
>> exynos_mmc_init() always returns zero, so for the caller
>> it looks like it never fails.
>>
>> Correct this by returning the error code of process_nodes().
>> For process_nodes() do something similar and return early
>> when do
On Wednesday, September 23, 2015 at 11:50:07 AM, Hans de Goede wrote:
> Hi,
Hi!
> On 14-08-15 01:16, Marek Vasut wrote:
> > On Monday, April 27, 2015 at 10:40:18 AM, Hans de Goede wrote:
> >> Hi,
> >
> > Hi again!
> >
> >> On 27-04-15 03:09, Marek Vasut wrote:
> >>> On Friday, March 27, 2015 at
Hi,
On 09/23/2015 06:48 PM, Lukasz Majewski wrote:
> Hi Lukasz,
>
>> Hi Tobias,
>>
>>> The CD check is currently inverted. dm_gpio_get_value() returns
>>> one when a card is detected. All other values (zero when there
>>> is no card, or negative values for the internal errors) indicate
>>> failur
On 11 September 2015 at 23:58, Vikas Manocha wrote:
> No need to configure indirect trigger address for every read/write.
>
> Signed-off-by: Vikas Manocha
> ---
>
> Changes in v6: None
> Changes in v5: fixed type cast compilation warnings.
> Changes in v4: removed extra type casts.
> Changes in v
Hi Jaehoon,
> Hi,
>
> On 09/23/2015 06:48 PM, Lukasz Majewski wrote:
> > Hi Lukasz,
> >
> >> Hi Tobias,
> >>
> >>> The CD check is currently inverted. dm_gpio_get_value() returns
> >>> one when a card is detected. All other values (zero when there
> >>> is no card, or negative values for the int
On 23/09/15 18:59, Jaehoon Chung wrote:
> Hi,
>
> On 09/23/2015 06:48 PM, Lukasz Majewski wrote:
>> Hi Lukasz,
>>
>>> Hi Tobias,
>>>
The CD check is currently inverted. dm_gpio_get_value() returns
one when a card is detected. All other values (zero when there
is no card, or negative
On 11 September 2015 at 23:58, Vikas Manocha wrote:
> Indirect read/write start addresses are flash start addresses for indirect
> read
> or write transfers. These should be absolute flash addresses instead of
> offsets.
>
> Signed-off-by: Vikas Manocha
Reviewed-by: Jagan Teki
> ---
>
> Chang
On Wednesday, September 23, 2015 at 12:11:20 PM, Jagan Teki wrote:
> On 11 September 2015 at 23:58, Vikas Manocha wrote:
> > Indirect read/write start addresses are flash start addresses for
> > indirect read or write transfers. These should be absolute flash
> > addresses instead of offsets.
> >
On 23/09/15 18:54, Jaehoon Chung wrote:
> Hi.
>
> On 09/23/2015 06:39 PM, Lukasz Majewski wrote:
>> Hi Tobias,
>>
>>> exynos_mmc_init() always returns zero, so for the caller
>>> it looks like it never fails.
>>>
>>> Correct this by returning the error code of process_nodes().
>>> For process_node
On 11 September 2015 at 23:58, Vikas Manocha wrote:
> This patch is to separate the base trigger from the read/write transfer start
> addresses.
>
> Base trigger register address (0x1c register) corresponds to the address which
> should be put on AHB bus to handle indirect transfer triggered befor
On 11 September 2015 at 23:58, Vikas Manocha wrote:
> plat->ahbbase renamed to plat->flashbase for better clarity.
Can you give short description about this rename.
>
> Signed-off-by: Vikas Manocha
> ---
>
> Changes in v6: none
> Changes in v5: none
> Changes in v4: new
>
> drivers/spi/cadence
On 23 September 2015 at 15:43, Marek Vasut wrote:
> On Wednesday, September 23, 2015 at 12:11:20 PM, Jagan Teki wrote:
>> On 11 September 2015 at 23:58, Vikas Manocha wrote:
>> > Indirect read/write start addresses are flash start addresses for
>> > indirect read or write transfers. These should
On Wednesday, September 23, 2015 at 12:30:34 PM, Jagan Teki wrote:
> On 23 September 2015 at 15:43, Marek Vasut wrote:
> > On Wednesday, September 23, 2015 at 12:11:20 PM, Jagan Teki wrote:
> >> On 11 September 2015 at 23:58, Vikas Manocha wrote:
> >> > Indirect read/write start addresses are fla
Hi Vikas,
On 11 September 2015 at 23:58, Vikas Manocha wrote:
> Fifo width could be different on different socs, e.g. stv0991 & altera soc
> have different fifo width.
>
> Signed-off-by: Vikas Manocha
Reviewed-by: Jagan Teki
> ---
>
> Changes in v6: none
> Changes in v5: none
> Changes in v4:
On Wed, Sep 23, 2015 at 5:15 AM, Jagan Teki wrote:
> Sorry, I didn't understand why protection range or bits are specific
> to board, is it different in Congetc because the flash area being
> protected by means of sector range which is obviously the flash
> offset.
The protection range is board
2015-09-11 20:17 GMT+09:00 Masahiro Yamada :
>
>
>
> Masahiro Yamada (18):
> pinctrl: uniphier: add UniPhier pinctrl core support
> pinctrl: uniphier: add UniPhier PH1-LD4 pinctrl driver
> pinctrl: uniphier: add UniPhier PH1-Pro4 pinctrl driver
> pinctrl: uniphier: add UniPhier PH1-sLD8 pin
2015-09-22 0:27 GMT+09:00 Masahiro Yamada :
>
>
>
> Masahiro Yamada (14):
> ARM: uniphier: remove unused header file
> ARM: uniphier: remove useless wrapper functions
> ARM: uniphier: refactor LED function
> ARM: uniphier: move CONFIG_SUPPORT_CARD_* macros to local file
> ARM: uniphier: a
Hi Tom,
Here is a pretty big series for UniPhier SoC changes.
pinctrl drivers, various fixes, refactoring, new SoC/board support, etc.
The following changes since commit 8a5f6129d1450f5ff92a55cfcfd7b96ee019e303:
pinctrl: move dm_scan_fdt_node() out of pinctrl uclass (2015-09-19
15:42:15 -06
On Tue, Sep 22, 2015 at 8:57 PM, Marek Vasut wrote:
> On Wednesday, September 23, 2015 at 12:01:34 AM,
> dingu...@opensource.altera.com
> wrote:
>> From: Dinh Nguyen
>>
>> Enable the able to save the environment variables when SD/MMC is used.
>>
>> Signed-off-by: Dinh Nguyen
>> ---
>> v2: Move
On 09/22/2015 09:50 PM, Fabio Estevam wrote:
From: Fabio Estevam
The dfu_alt_info_spl variable allows passing a starting point
for the binary to be flashed in the SPI NOR.
For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means
that we want to flash the binary starting at address
On Wed, Sep 23, 2015 at 12:22 PM, Stephen Warren wrote:
> This feels wrong. The entries in the DFU list must already be
> sector-aligned, so there's no need for the code to round them. If the
> entries are not already aligned, then the aligned erase operations will
> erase other data, which will
Hi,
On 22 September 2015 at 21:10, Chin Liang See wrote:
>
> Hi,
>
> > From: ma...@denx.de
> > Sent: Friday, September 11, 2015 8:45 AM
> > To: Simon Glass
> > Cc: Chin Liang See; ZY - u-boot; Dinh Nguyen; Dinh Nguyen; ZY - sr; Vikas
> > Manocha; Jagannadh Teki; ZY - pavel
> > Subject: Re: [PATC
On Wed, Sep 23, 2015 at 12:36 PM, Fabio Estevam wrote:
> On Wed, Sep 23, 2015 at 12:22 PM, Stephen Warren
> wrote:
>
>> This feels wrong. The entries in the DFU list must already be
>> sector-aligned, so there's no need for the code to round them. If the
>> entries are not already aligned, then
On 23 September 2015 at 19:06, Otavio Salvador
wrote:
> On Wed, Sep 23, 2015 at 5:15 AM, Jagan Teki wrote:
>
>> Sorry, I didn't understand why protection range or bits are specific
>> to board, is it different in Congetc because the flash area being
>> protected by means of sector range which is
On 09/23/2015 09:44 AM, Fabio Estevam wrote:
On Wed, Sep 23, 2015 at 12:36 PM, Fabio Estevam wrote:
On Wed, Sep 23, 2015 at 12:22 PM, Stephen Warren wrote:
This feels wrong. The entries in the DFU list must already be
sector-aligned, so there's no need for the code to round them. If the
entr
Hello Jagan,
On Wed, Sep 23, 2015 at 12:56 PM, Jagan Teki wrote:
> All looks fine as per your patches, but probing flash from board files
> isn't a good approach if one more board add similar approach.
>
> I have an idea similar to "cfi_flash" approach.
>
> "sf protect on off len" then based on
Hi Bin,
On Fri, Sep 4, 2015 at 6:56 AM, Bin Meng wrote:
> In get_phy_device_by_mask(), when no phy is found, currently we only
> print a message to show the first phy address that is not found. But
> this is not always the case as multiple phys can be specified by
> phy_mask. Change to print all
Hi Bin,
On Fri, Sep 4, 2015 at 6:56 AM, Bin Meng wrote:
> In phy_connect_dev(), if the phy device has an accociated mac device
> before, a warning message will be printed. But we should test the
> old device against the new one, if they are actually the same one,
> don't print the warning message
On 23 September 2015 at 22:21, Otavio Salvador
wrote:
> Hello Jagan,
>
> On Wed, Sep 23, 2015 at 12:56 PM, Jagan Teki wrote:
>> All looks fine as per your patches, but probing flash from board files
>> isn't a good approach if one more board add similar approach.
>>
>> I have an idea similar to
On Wed, Sep 23, 2015 at 2:15 PM, Jagan Teki wrote:
> On 23 September 2015 at 22:21, Otavio Salvador
> wrote:
>> Hello Jagan,
>>
>> On Wed, Sep 23, 2015 at 12:56 PM, Jagan Teki wrote:
>>> All looks fine as per your patches, but probing flash from board files
>>> isn't a good approach if one more
This patch series updates the default configuration of the vexpress64 FVP
and Juno platforms to allow it to work on a variety of setups without
modification by the user.
[PATCH 01/11] vexpress64: fix checkpatch warnings
[PATCH 02/11] vexpress64: Kconfig: tidy up
[PATCH 03/11] Kconfig: add CONFIG_S
This patch fixes a couple of checkpatch warnings on the vexpress64 config.
Signed-off-by: Ryan Harkin
CC: David Feng
CC: Bhupesh Sharma
CC: Linus Walleij
---
include/configs/vexpress_aemv8a.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/configs/vexpress_ae
Create an additional FVP configuration to boot images pre-loaded into
DRAM.
Sometimes it's preferential to boot the model by loading the files
directly into DRAM via model parameters, rather than using
SemiHosting.
An example of model parmaters that are used to pre-load the files
into DRAM:
-
The FVP and Juno settings were identical, but duplicated, so I removed
the duplication with this patch.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
CC: David Feng
CC: Bhupesh Sharma
CC: Linus Walleij
---
board/armltd/vexpress64/Kconfig | 17 -
1 file changed, 17 del
On 09/22/2015 04:36 PM, Stephen Warren wrote:
From: Stephen Warren
The size allocation for SPL is increased in all cases to match the
already-expanded value used on Tegra124. This is both for general
consistency, and because the seaboard build trips over the limit already
when using one of the
As config migrates from board config files to Kconfig, when adding
CONFIG_SYS_BOOTM_LEN to a platform, I decided to add
Kconfig support for CONFIG_SYS_BOOTM_LEN.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
CC: Masahiro Yamada
CC: Simon Glass
CC: Linus Walleij
---
Kconfig | 7 ++
The default Juno firmware has renamed the kernel and device tree
filenames to norkern and board.dtb.
Rather than change the default configuration to use the new names,
breaking those with the old firmware, attempt to load the existing
filename first. If that fails, attempt to load the alternate f
vexpress64 kernels are usually over 8 MBytes in length, so setting the
max uImage length to 0x400 (64 Mbytes) should give us plenty of
scope for expansion.
I mostly chose this length to match other board configs that use
"(64 << 20)", however, Kconfig doesn't allow arithmetic operations.
Sign
Add a command to the ARM flash support to check if an image exists or
not.
If the image is found, it will return CMD_RET_SUCCESS, else
CMD_RET_FAILURE. This allows hush scripts to conditionally load images.
A simple example:
if afs exists ${kernel_name}; then echo found; else echo \
not found;
Linaro's Juno Android builds requires the androidboot.hardware parameter
be set to a know board name.
Non-Android kernels ignore this extra parameter because they don't
contain code to parse it.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
CC: David Feng
CC: Bhupesh Sharma
CC: Linus
Some OS images require an initrd on Juno.
If the file ramdisk.img exists in NOR flash, then we load it and pass
the address to the kernel. Otherwise, we pass the "-" parameter as
before.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
CC: David Feng
CC: Bhupesh Sharma
CC: Linus Walleij
Change the load_image so that it returns success or failure of the
command (using CMD_RET_SUCCESS or CMD_RET_FAILURE).
This way, hush scripts can optionally load different files depending
upon the system configuration.
A simple example:
if afs load ${kernel_name} ${kernel_addr}; then echo loaded
This patch changes the default "root=" parameter to "/dev/sda2".
Many linux based distros use /dev/sda1 for their boot partition; this is
often not a rootfs that can be used by the "root=" parameter.
Linaro images use /dev/sda1 as a boot partition, although this of a
different nature to a distro
[+CC Linus]
On 23 September 2015 at 18:25, Ryan Harkin wrote:
> This patch series updates the default configuration of the vexpress64 FVP
> and Juno platforms to allow it to work on a variety of setups without
> modification by the user.
>
> [PATCH 01/11] vexpress64: fix checkpatch warnings
> [P
Hi Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Wednesday, September 23, 2015 3:15 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; Stefan Roese; Graham Moore; Marek Vašut
> Subject: Re: [U-Boot] [PATCH v6 4/5] spi: cadence_qspi: rename ahbbase to
>
Hi Vikas,
On 23 September 2015 at 16:12, Marek Vasut wrote:
> On Wednesday, September 23, 2015 at 12:30:34 PM, Jagan Teki wrote:
>> On 23 September 2015 at 15:43, Marek Vasut wrote:
>> > On Wednesday, September 23, 2015 at 12:11:20 PM, Jagan Teki wrote:
>> >> On 11 September 2015 at 23:58, Vikas
Thanks Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Wednesday, September 23, 2015 4:00 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; Stefan Roese; Graham Moore; Marek Vašut
> Subject: Re: [U-Boot] [PATCH v6 5/5] spi: cadence_qspi: get fifo width f
From: Stephen Warren
Tegra's GPIO driver currently enables pins as GPIO as soon as they're
requested. This is not safe, since the desired direction and output value
are not yet known. This could cause a glitch on the output pins between
gpio_request() and gpio_direction_*(), depending on what val
From: Stephen Warren
Tegra's gpio_config_table() currently uses common GPIO APIs. These used
to work without requesting the GPIO, but since commit 2fccd2d96bad "tegra:
Convert tegra GPIO driver to use driver model" no longer do so. This
prevents any of the GPIO initialization table from being app
From: Stephen Warren
The size allocation for SPL is increased in all cases to match the
already-expanded value used on Tegra124. This is both for general
consistency, and because the seaboard build trips over the limit already
when using one of the ARM compilers packaged with 14.04. For the recor
From: Dinh Nguyen
Enable the able to save the environment variables when SD/MMC is used.
Signed-off-by: Dinh Nguyen
---
v3: Only define ENV_IS_NOWHERE if env is not in MMC, NAND, FAT, and SPI_FLASH
v2: Move this option to be on a per-board basis
Add config for socfpga_cyclone5 and socfpga_a
Simon,
I have 3 different ARM toolchains installed into /usr/bin via distro
packages. How do I tell buildman which of those to use?
I had originally thought that ~/.buildman's [toolchain] section
contained CROSS_COMPILE-like values, so I tried:
[toolchain]
root: /
arm0-not-installed: arm-n
On Wednesday, September 23, 2015 at 05:07:28 PM, Dinh Nguyen wrote:
> On Tue, Sep 22, 2015 at 8:57 PM, Marek Vasut wrote:
> > On Wednesday, September 23, 2015 at 12:01:34 AM,
> > dingu...@opensource.altera.com
> >
> > wrote:
> >> From: Dinh Nguyen
> >>
> >> Enable the able to save the environme
On Wednesday, September 23, 2015 at 09:21:48 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Enable the able to save the environment variables when SD/MMC is used.
>
> Signed-off-by: Dinh Nguyen
> ---
> v3: Only define ENV_IS_NOWHERE if env is not in MMC, NAND, FAT, and
> SPI
In recent allwinner kernel sources the mmc clk-delay settings have been
slightly tweaked, and for sun9i they are completely different then what
we are using.
This commit brings us in sync with what allwinner does, fixing problems
accessing sdcards on some A33 devices (and likely others).
For pre
From: Dinh Nguyen
Enable the able to save the environment variables when SD/MMC is used.
Signed-off-by: Dinh Nguyen
---
v4: Move ENV_IS_NOWHERE to the mcvevk board config file
v3: Only define ENV_IS_NOWHERE if env is not in MMC, NAND, FAT, and SPI_FLASH
v2: Move this option to be on a per-board
Hi Peng,
On Wed, Sep 23, 2015 at 5:13 AM, Peng Fan wrote:
> Some i.MXes use __NA_ or 0 to avoid setting mux_mode, but the following patch
> only take i.MX6/7 into consideration.
Small typo that I missed to report in v1: "takes". This can probably
be fixed when applying.
>
> "c3c8a5748897b24f186
Hi,
> i want to boot a little kernel on ARM Cortex a9.
> But the kernel crushes pretty early with the following u-boot output:
>
> ## Starting application at 0x0100 ...
> ## Application terminated, rc = 0x1
What board do you use? This address may be used by something different
than applicatio
This patch is to separate the base trigger from the read/write transfer start
addresses.
Base trigger register address (0x1c register) corresponds to the address which
should be put on AHB bus to handle indirect transfer triggered before.
To handle indirect transfer we need to issue addresses fro
Indirect read/write start addresses are flash start addresses for indirect read
or write transfers. These should be absolute flash addresses instead of
offsets.
Signed-off-by: Vikas Manocha
---
Changes in v7: none
Changes in v6: none
Changes in v5: fixed type cast compilation warnings.
Changes i
This macro is not being used anywhere in the code.
Signed-off-by: Vikas Manocha
---
Changes in v7: new.
drivers/spi/cadence_qspi_apb.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 2638f00..c0116e3 100644
--- a/dr
No need to configure indirect trigger address for every read/write.
Signed-off-by: Vikas Manocha
---
Changes in v7: None
Changes in v6: None
Changes in v5: fixed type cast compilation warnings.
Changes in v4: removed extra type casts.
Changes in v3: added commit message & removed extra bracket.
Fifo width could be different on different socs, e.g. stv0991 & altera soc
have different fifo width.
Signed-off-by: Vikas Manocha
---
Changes in v7: unused macro moved to separate patch.
Changes in v6: none
Changes in v5: none
Changes in v4: alligned to linux device tree binding.
Changes in v3:
This patchset:
- fixes trigger base & transfer start address register programming. This fix
superseeds the previous patch "spi: cadence_qspi: Fix the indirect ahb trigger
address setting".
- adds support to get fifo width from device tree
Changes in v7:
- added info for renaming the parameter from
plat->ahbbase renamed to plat->flashbase for better clarity.
With ahbbase it was not clear which base address it is, flashbase makes
it clear that it is mapped flash memory base address.
Signed-off-by: Vikas Manocha
---
Changes in v7: added info for renaming the parameter from ahbbase to flashba
Thanks Simon.
On Tue, Sep 22, 2015 at 10:48 PM, Simon Glass wrote:
> +Masahiro,
>
> Hi,
>
> On 22 September 2015 at 08:01, Tom Rini wrote:
>> On Tue, Sep 22, 2015 at 01:12:56PM +0800, Bin Meng wrote:
>>
>>> Hi,
>>>
>>> I was using buildman to get toolchains from kernel.org to build U-Boot
>>> fo
Hi Tom,
On Tue, Sep 22, 2015 at 10:01 PM, Tom Rini wrote:
> On Tue, Sep 22, 2015 at 01:12:56PM +0800, Bin Meng wrote:
>
>> Hi,
>>
>> I was using buildman to get toolchains from kernel.org to build U-Boot
>> for as many boards as possible. But I still see some boards do not
>> build. Are these bui
Dear ba_f,
In message <5c515fb3b2f956768d10d2e2c2e94...@rbg.informatik.tu-darmstadt.de>
you wrote:
>
> But the kernel crushes pretty early with the following u-boot output:
>
> ## Starting application at 0x0100 ...
> ## Application terminated, rc = 0x1
This is NOT a crash. The program ter
These macros can be used to clear and set multiple bits
in a register using a single call.
Signed-off-by: Thomas Chou
---
arch/nios2/include/asm/io.h | 57 +
1 file changed, 57 insertions(+)
diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/includ
On 09/20/2015 04:36 PM, Thomas Chou wrote:
Convert altera_jtag_uart to driver model.
Signed-off-by: Thomas Chou
Acked-by: Marek Vasut
Reviewed-by: Simon Glass
---
v2
add ioremap.
make the change to dts compatible with linux.
v3
use fdt address translation patch from Stefan Roese.
On 09/20/2015 07:41 PM, Thomas Chou wrote:
Convert altera_uart to driver model.
Signed-off-by: Thomas Chou
Reviewed-by: Simon Glass
Acked-by: Marek Vasut
---
v2
fix coding style as Marek suggested.
v3
add early debug uart.
fix coding style as Simon suggested.
arch/nios2/dts/3c1
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