Convert copy_exception_trampoline() to use dm cpu data.
Signed-off-by: Thomas Chou
---
v2
fix exception address references.
arch/nios2/cpu/cpu.c | 24
arch/nios2/cpu/start.S | 24 +---
2 files changed, 25 insertions(+), 23 deletions(-)
diff --gi
Convert dma_alloc_coherent to use memalign.
Signed-off-by: Thomas Chou
---
v2
use memalign.
arch/nios2/include/asm/dma-mapping.h | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/arch/nios2/include/asm/dma-mapping.h
b/arch/nios2/include/asm/dma-mappin
> You can build U-Boot with NO_SDL=1
Ah, thanks... that was the important magic flag I needed!
> Actually you should enable the option in configs/sandbox_defconfig,
> not lib/Kconfig. See the condition used by compression.c:
>
> obj-$(CONFIG_SANDBOX) += compression.o
Okay, makes sense. I looked
[Re: [U-Boot] [PATCH 5/5] sbc8641d: enable and test CONFIG_SYS_GENERIC_BOARD]
On 04/10/2015 (Sun 01:45) Masahiro Yamada wrote:
> Hi.
>
>
> 2015-09-02 23:05 GMT+09:00 Simon Glass :
> > Hi Paul,
> >
> > On 2 September 2015 at 07:37, Paul Gortmaker
> > wrote:
> >> On 2015-09-01 10:08 PM, York Sun
On 9/21/2015 2:02 PM, Troy Kisky wrote:
> Signed-off-by: Troy Kisky
> ---
> tools/imximage.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tools/imximage.c b/tools/imximage.c
> index 97a6880..7c21922 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -39
From: Stephen Warren
p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This
patch adds the relevant DT to enable the PCI controller and configure
the XUSB padctl pin muxing, and code to turn on the PCI power and enable
PCI features in U-Boot. I have only tested the x4 slot.
Sign
From: Stephen Warren
Tegra210's PCI controller is largely identical to Tegra124, and hence
shares the same binding. However, it has a unique compatible value due
to the existence of at least one new HW bug that would prevent any driver
for a previous HW version from operating correctly.
Signed-o
From: Stephen Warren
Tegra peripherals can generally access a 32-bit physical address space,
and I believe this applies to PCIe. Clip the PCI region that refers to
DRAM so it fits into 32-bits to avoid issues.
Signed-off-by: Stephen Warren
---
drivers/pci/pci_tegra.c | 10 +-
1 file ch
From: Stephen Warren
This needs a separate compatible value from Tegra124 since the new HW
version has bugs that would prevent a driver for previous HW versions
from operating at all.
Signed-off-by: Stephen Warren
---
drivers/pci/pci_tegra.c | 22 ++
include/fdtdec.h
From: Stephen Warren
The number of cells used by each entry in the DT ranges property is
determined by the #address-cells/#size-cells properties. Fix the code
to respect this.
Signed-off-by: Stephen Warren
---
drivers/pci/pci_tegra.c | 33 ++---
1 file changed, 30 i
From: Stephen Warren
Add code to detect timeouts when waiting for HW events such as PLL
lock done. Any errors are logged and trigger an error return code.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/tegra210/xusb-padctl.c | 25 -
1 file changed, 20 insertions(
From: Stephen Warren
The board PCI setup code may control regulators that are required simply
to bring up the PCI controller itself (or PLLs, IOs, ... it uses). Move
the call to this function earlier so that all board-provided resources
are ready early enough for everything to work.
Signed-off-b
From: Stephen Warren
Tegra210's PCIe controller has a bug that requires the PCA (performance
counter) feature to be enabled. If this isn't done, accesses to device
configuration space will hang the chip for tens of seconds. Implement
the workaround.
Signed-off-by: Stephen Warren
---
drivers/pc
From: Stephen Warren
There are some differences between the Tegra124 and Tegra210 XUSB padctl
code. So far, the common XUSB padctl code only supports Tegra124. Add
some parameters etc. so that it can work for both chips.
This also allows moving Tegra124's process_nodes() into the common file;
so
From: Stephen Warren
Add the tables defining which pads and mux options exist in the Tegra210
XUSB padctl hardware.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/tegra210/xusb-padctl.c | 78 --
arch/arm/mach-tegra/xusb-padctl-common.h | 4 +-
2 files chan
From: Stephen Warren
This change simply deletes code from the Tegra210 XUSB padctl driver that
is already present in the common XUSB padctl code. Since all the arrays
in tegra210_socdata are empty, this update may leave the Tegra210 XUSB
padctl driver non-functional at run-time. However, (a) this
From: Stephen Warren
A fair amount of the XUSB padctl driver will be common between Tegra124
and Tegra210. To avoid cut/paste between the two chips, create a new
file that will contain the common code, and convert the Tegra124 code to
use it. This change doesn't move every last piece of code that
From: Stephen Warren
A future patch will soon move some of the XUSB padctl code into a common
file in arch/arm/mach-tegra. Rename the existing dummy XUSB padctl file
to avoid conflicting with that, or being confusing.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/Makefile
From: Stephen Warren
Implement the procedure that the TRM mandates to initialize PLLREFE and
PLLE. This makes the PLL actually lock.
Note that this section of the TRM is being cleaned up to remove some
confusion. The set of register accesses in this patch should be final,
although the step numbe
If an Android boot image does not contain a ramdisk, make sure rd_len
and rd_data are returned to indicate no ramdisk rather than just relying
on returning an error.
Signed-off-by: Rob Herring
---
common/image-android.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/commo
On Tue, Sep 1, 2015 at 8:50 AM, Paul Kocialkowski wrote:
> Le jeudi 27 août 2015 à 15:42 -0400, Tom Rini a écrit :
>> In 2dd4632 the check for where a ramdisk is found on an Android image
>> was got moved into the "normal" loop here, causing people to have to
>> pass the kernel address in the ramd
From: Stephen Warren
This sets up a fine-grained page table, which is a requirement for
noncached_init() to operate correctly.
MMU setup code currently exists in a number of places:
- A version in the core ARMv8 support code that sets up page tables that
use very large block sizes that CONFIG_SY
From: Stephen Warren
Now that we have solved the problems that prevented this feature from
being enabled, enable it everywhere.
Signed-off-by: Stephen Warren
---
include/configs/tegra-common-post.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/tegra-common-post.h
b/incl
From: Stephen Warren
The implementation of noncached_init() uses define MMU_SECTION_SIZE.
Define this on ARM64.
Move the prototype of noncached_{init,alloc}() to a location that
doesn't depend on !defined(CONFIG_ARM64).
Note that noncached_init() calls mmu_set_region_dcache_behaviour() which
re
From: Stephen Warren
In order for noncached_init() to operate correctly, SoCs must set up a
custom page table with fine-grained (2MiB) sections, which can be
configured from noncached_init().
This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c
by cut/pasting and re-impleme
On Fri, Oct 2, 2015 at 6:44 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> Casting from dev->priv to pci_dev_t changes the value's size on a 64-bit
> system. This causes the compiler to complain about casting a pointer to an
> integer of a different (smaller) size. To avoid this, cast to an
Hi Sjoerd,
On Mon, Oct 5, 2015 at 3:55 AM, Sjoerd Simons
wrote:
>
> On Sat, 2015-10-03 at 15:30 +0100, Simon Glass wrote:
> > Hi Sjoerd,
>
> > > static int designware_eth_send(struct udevice *dev, void *packet,
> > > int length)
> > > diff --git a/drivers/net/designware.h b/drivers/net/designwar
In case sdhci_get_config() or do_sdhci_init() fail, show
the error code that was returned.
Acked-by: Przemyslaw Marczak
Signed-off-by: Tobias Jakobi
---
drivers/mmc/s5p_sdhci.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc
exynos_mmc_init() always returns zero, so for the caller
it looks like it never fails.
Correct this by returning the error code of process_nodes().
For process_nodes() do something similar and return early
when do_sdhci_init() fails.
v2: Only fail in process_nodes() if we fail on all
availabl
Add more debug printfs in do_sdhci_init() for calls
that can potentially fail.
Acked-by: Przemyslaw Marczak
Signed-off-by: Tobias Jakobi
---
drivers/mmc/s5p_sdhci.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5
This makes sure that setting the host_caps in s5p_sdhci_core_init()
doesn't operate on potentially uninitialized memory.
Acked-by: Lukasz Majewski
Signed-off-by: Tobias Jakobi
---
drivers/mmc/s5p_sdhci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/s5p_sdh
Messages on corrected bit-flips are not really useful,
as bit-flips are perfectly normal. Let's avoid cluttering
the console and make them debug.
Signed-off-by: Ezequiel Garcia
---
drivers/mtd/nand/omap_gpmc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/
Hello:
I am unsure if this is a good place to ask.
T5220 connected to a serial console. I can see all output perfectly fine
but only in read mode, I can not type anything:
U-Boot 1.1.1 (Feb 13 2009 - 10:56:58)
CPU: MPC885ZPnn at 133 MHz: 8 kB I-Cache 8 kB D-Cache FEC present
Board: SPARC88
On Mon, Oct 5, 2015 at 6:05 AM, Jagan Teki wrote:
> Couldn't understand why would we get an errors for define this in
> spi_flash.h Like spi_flash_erase/_read/_write spi_flash_protect is a
> command ops which would intern call mtd/spi operations as function
> pointers.
Ok, got your point. Fixed
Add support for the order_base_2() macro from the Linux kernel.
This is useful for the SPI unlock function.
Signed-off-by: Fabio Estevam
---
Changes since v5:
- None
arch/arm/include/asm/bitops.h | 56 +++
1 file changed, 56 insertions(+)
diff --git a/a
Add the SPI NOR protection mechanism from the kernel.
This code is based on the work from Brian Norris
https://patchwork.ozlabs.org/patch/513041/
Signed-off-by: Fabio Estevam
---
Changes since v5:
- None
drivers/mtd/spi/sf_ops.c | 188 +++
1 file ch
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the
status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations,
making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
On Mon, 2015-10-05 at 11:07 +0200, Guillaume GARDET wrote:
> Add boot script (boot.scr) support. If no boot script are
> found, it boots as usual.
Instead of extending the specialized boot script, it would belovely to
see the odroid board switch to distro boot commands for a more
standardized boo
Add boot script (boot.scr) support. If no boot script are
found, it boots as usual.
Signed-off-by: Guillaume GARDET
Cc: Przemyslaw Marczak
Cc: Minkyu Kang
---
include/configs/odroid.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/odroid.h b/include/configs/odro
Those 2 patches enhances Odroid board support.
* First patch replace 'fatload' command by 'load', to be able to use EXT*
partitions while keeping FAT partition compatibility.
* Second patch adds boot script (boot.scr) support. If no boot script are
found, it boots as usual.
Changes in V2:
* Expan
Replace 'fatload' command by 'load', to be able to use EXT*
partitions while keeping FAT partition compatibility.
Signed-off-by: Guillaume GARDET
Cc: Przemyslaw Marczak
Cc: Minkyu Kang
---
include/configs/odroid.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/incl
On 2 October 2015 at 00:06, Fabio Estevam wrote:
> On Thu, Oct 1, 2015 at 10:48 AM, Jagan Teki wrote:
>
>> To be in-line with mtd lock utils, how about this notation
>> sf protect lock
>> sf protect unlock
>> sf protect islocked
>
> Ok.
>
>>> diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi
On Sat, 2015-10-03 at 15:29 +0100, Simon Glass wrote:
> > On 1 October 2015 at 10:48, Sjoerd Simons <
> > sjoerd.sim...@collabora.co.uk> wrote:Add support for the gmac
> > ethernet interface to pinctrl. This hardcodes
> > the setup to match that of the firefly and Radxa Rock2 boards,
> > using the
On Sat, 2015-10-03 at 15:30 +0100, Simon Glass wrote:
> Hi Sjoerd,
> > static int designware_eth_send(struct udevice *dev, void *packet,
> > int length)
> > diff --git a/drivers/net/designware.h b/drivers/net/designware.h
> > index 47e727b..b45599b 100644
> > --- a/drivers/net/designware.h
> > ++
Hello,
we are facing problems with downloading U-Boot tarballs and automated build
systems. The old URL are redirected to owncloud.denx.de and owncloud.denx.de
uses a self signed certificate.
To make things a little bit complexer - we need to use a proxy for all web
accesses. The download bre
Hi Simon,
On 10/03/2015 03:36 PM, Simon Glass wrote:
Hi,
On 30 September 2015 at 19:30, Simon Glass wrote:
Hi Przemyslaw,
On 30 September 2015 at 06:25, Przemyslaw Marczak wrote:
Hello Tom, Simon,
On 09/30/2015 03:13 PM, Tom Rini wrote:
On Wed, Sep 30, 2015 at 01:14:49PM +0200, Przemys
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