[U-Boot] [PATCH v2 1/3] spi: spi_flash: Dont set quad enable for micron in all cases

Dont set quad enable for micron devices in all cases Setting the quad enable bit in micron expects all other commands like register reads on quad lines which may not be supported by some controllers. Hence, dont set the quad enable if controller driver sets the no_all_quad. Signed-off-by: Siva Dur

[U-Boot] [PATCH 1/5] arm64: fsl-layerscape: add get_svr and IS_SVR_REV helper

Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 7 +++ arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++ arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 3 +++ arch/arm/include/asm/arch-fsl-layerscape/

[U-Boot] [PATCH 4/5] armv8/ls2080: Remove workaround for erratum A008751

Remove the errata workaround from soc specific file for LS2080 Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 10 -- 1 file changed, 10 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-lay

[U-Boot] [PATCH 2/5] usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllers

Signed-off-by: Rajesh Bhagat Signed-off-by: Sriram Dash --- drivers/usb/common/fsl-dt-fixup.c | 51 +-- 1 file changed, 17 insertions(+), 34 deletions(-) diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c index 6f31932..520130

[U-Boot] [PATCH 0/5] Supporting ARM v8 USB errata for FSL

The patch-set does the following : 1. Adds support for ARM for USB Erratum Checking code for implementing the USB Erratum for fsl. 2. Performs code cleanup to reduce redundancy when adding fsl device tree fixup. 3. Implements Erratum A008751 for LS2 platform. Sriram Dash (5): arm64: fsl-layers

[U-Boot] [PATCH 5/5] usb: xhci: fsl: Add workaround for USB erratum A-008751

This patch is doing the following: 1. Implementing the errata for LS2080. 2. Adding fixup for fdt for LS2080. Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 + board/freescale/ls2080aqds/ls2080aqds.c| 2 ++ board/

[U-Boot] [PATCH 3/5] fsl: usb: make errata function common for PPC and ARM

Signed-off-by: Sriram Dash Signed-off-by: Rajesh Bhagat --- drivers/usb/common/fsl-dt-fixup.c | 1 + include/fsl_usb.h | 51 --- 2 files changed, 17 insertions(+), 35 deletions(-) diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/

[U-Boot] [PATCH v2] mmc: atmel_sdhci: Convert to the driver model support

Convert the driver to the driver model while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang --- Changes in v2: - Add clock support, include enabling peripheral clock and

[U-Boot] please pull u-boot-samsung master

Dear Tom, The following changes since commit fc15b9beed05dec6cc092c265042381a0eadb0e9: Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2016-05-24 13:42:03 -0400) are available in the git repository at: http://git.denx.de/u-boot-samsung for you to fetch changes up to 086e13c

Re: [U-Boot] [PATCH 1/2] ARM: exynos: Fix build error if SERIAL is disabled in SPL

On 02/05/16 03:55, Simon Glass wrote: > +Minkyu > > On 30 April 2016 at 16:36, Marek Vasut wrote: >> If CONFIG_SPL_SERIAL_SUPPORT is not defined in >> include/configs/exynos5-common.h >> the following error is produced during the build of the SPL: >> >> arch/arm/mach-exynos/built-in.o: In functi

Re: [U-Boot] [PATCH 2/2] ARM: exynos: Disable serial support in SPL

On 02/05/16 04:46, Marek Vasut wrote: > On 05/01/2016 08:57 PM, Tom Rini wrote: >> On Sun, May 01, 2016 at 12:36:12AM +0200, Marek Vasut wrote: >> >>> The exynos5 platforms use DM in U-Boot and do not use DM in SPL. The serial >>> driver, serial_s5p.c, is DM-only. This is OK for U-Boot, but in SPL,

[U-Boot] [PATCH v2] dm: at91: Add driver model support for the spi driver

Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang --- Changes in v2: - Add clock support. drivers/spi/Kconfig | 9 ++ drivers/spi/atme

Re: [U-Boot] [PATCH v1 3/7] nand: add nand mtd concat support

Hello Scott, Am 25.05.2016 um 16:51 schrieb Scott Wood: On 05/25/2016 01:10 AM, Heiko Schocher wrote: Hello Scott, Am 25.05.2016 um 07:30 schrieb Scott Wood: On 05/25/2016 12:07 AM, Heiko Schocher wrote: add for nand devices mtd concat support. Generic MTD concat support is already ported to

[U-Boot] [PATCH v3 5/5] configs: sama5d2_xplained: Add #ifndef before CONFIG_ATMEL_PIO4

Since CONFIG_ATMEL_PIO4 options is added to Kconfig, to avoid compilation warnings when the option is enabled, add #ifndef CONFIG_DM_GPIO before #define CONFIG_ATMEL_PIO4 to avoid compilation warnings. Signed-off-by: Wenyou Yang --- Changes in v3: None Changes in v2: - integrate the gpio rework

[U-Boot] [PATCH v3 0/5] ARM: AT91: Add AT91 PIO4 pinctrl driver and gpio driver with DM

AT91 PIO4 controller is a combined gpio-controller, pin-mux and pin-config module. This patch is to add the pinctrl driver, and rework the atmel-pio4 gpio driver to support driver model and device tree. Changes in v3: - Add bind callback to support the pinctl device regarding as a child of a

[U-Boot] [PATCH v3 4/5] atmel: Bring in at91 pio4 device tree file and bindings

Bring in required device tree file and bindings from Linux. Signed-off-by: Wenyou Yang Reviewed-by: Andreas Bießmann --- Changes in v3: None Changes in v2: - add detailed example to show how to configure pinctrl for device. - remove interrupt and gpio property description. - add reviewed-by

[U-Boot] [PATCH v3 3/5] pinctrl: at91-pio4: Add pinctrl driver

AT91 PIO4 controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic. The pin configuration is performed on specific registers which are shared along with the gpio controller. So regard the pinctrl device as a chil

[U-Boot] [PATCH v3 2/5] gpio: atmel_pio4: Rework to support DM & DT

Rework the driver to support driver model and device tree, and support to regard the pio4 pinctrl device as a child of atmel_pio4 device. Signed-off-by: Wenyou Yang --- Changes in v3: - Add bind callback to support the pinctl device regarding as a child of atmel_pio4 device. - Add clock sup

[U-Boot] [PATCH v3 1/5] gpio: atmel_pio4: Move PIO4 definitions to head file

In order to make these PIO4 definitions shared with AT91 PIO4 pinctrl driver, move them from the existing gpio driver to the head file, and rephrase them. Signed-off-by: Wenyou Yang --- Changes in v3: None Changes in v2: None arch/arm/mach-at91/include/mach/atmel_pio4.h | 35 ++ dr

[U-Boot] [PATCH 0/2] clk: at91: Add new clock driver

For CLK uclass add post binding support to recursively bind its children as clk devices. Add the clock driver for AT91's SoCs. Wenyou Yang (2): clk: clk-uclass: Add post binding for CLK uclass clk: at91: Add new clock driver arch/arm/mach-at91/include/mach/at91_pmc.h | 11 ++- drivers/c

[U-Boot] [PATCH 2/2] clk: at91: Add new clock driver

The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in dt are aligned with the Linux. Signed-off-by: Wenyou Yang --- arch/arm/mach-at91/include/mach/at91_pmc.h | 11 ++- drivers/clk/Kconfig| 1 + drivers/clk/Makefile

[U-Boot] [PATCH 1/2] clk: clk-uclass: Add post binding for CLK uclass

Add post binding support for CLK uclass to recursively bind its children as clk devices. Signed-off-by: Wenyou Yang --- drivers/clk/clk-uclass.c | 51 1 file changed, 51 insertions(+) diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclas

[U-Boot] [PATCH v2 8/8] x86: baytrail: acpi: Fix I/O APIC ID in the MADT table

So far this is hardcoded to 2, but it should really be read from the I/O APIC register. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v2: None arch/x86/cpu/baytrail/acpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/cpu/baytrail/acpi.c b/arc

[U-Boot] [PATCH v2 7/8] x86: galileo: Enable ACPI table generation

Enable ACPI table generation by creating a DSDT table. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v2: None board/intel/galileo/.gitignore | 3 +++ board/intel/galileo/Makefile | 1 + board/intel/galileo/acpi/mainboard.asl | 11 +++ board/intel/

[U-Boot] [PATCH v2 5/8] x86: quark: Add platform ASL files

This adds basic quark platform ASL files. They are intended to be included in dsdt.asl of any board that is based on this platform. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v2: None arch/x86/include/asm/arch-quark/acpi/irqroute.h| 15 ++ arch/x86/include/asm/arch-q

[U-Boot] [PATCH v2 6/8] x86: quark: Generate ACPI FADT/MADT tables

Generate quark platform-specific FADT/MADT tables. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v2: None arch/x86/cpu/quark/Makefile | 1 + arch/x86/cpu/quark/acpi.c | 163 2 files changed, 164 insertions(+) create mode 1006

[U-Boot] [PATCH v2 2/8] x86: acpi: Make irqroute.asl common

The irqroute.asl file is already common enough to all x86 platforms. Platform ASL files need only provide a irqroute.h to describe how internal PCI devices and PCIe downstream port devices' INTx pins are routed to which PIRQ pin. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v

[U-Boot] [PATCH v2 4/8] x86: quark: Prepare device.h for inclusion by ASL

There is a device.h for quark on-chip devices, mainly for definitions of internal PCI device numbers, but it's not ready to be included by ASL files. Update to use hex numbers for PCI dev and __ASSEMBLY__. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v2: - Use __ASSEMBLY__ i

[U-Boot] [PATCH v2 1/8] x86: acpi: Create a common irqlinks ASL file

Move the irqlinks.asl file currently in the BayTrail directory to a common place to be shared among all x86 platforms. As the PIRQ routing control programming interface is common to Intel chipsets, leave the common part in the common file, and move the platform specific part to the platform files.

[U-Boot] [PATCH v2 0/8] x86: quark: Add ACPI support

This series adds basic ACPI support to Intel Quark platform, enables the support on the Intel Galileo board. Testing was performed by booting Linux kernel from an SD card. All interrupts are routed to I/O APIC based on information provided in the ACPI tables, and typing 'reboot' from shell can suc

[U-Boot] [PATCH v2 3/8] acpi: Pass -D__ASSEMBLY__ when compiling ASL files

ASL files may include various U-Boot header files, but IASL compiler does not understand any C language embedded in these header files. To reuse those header files for ASL compiling, use __ASSEMBLY__ in the header files to exclude everything that is not liked by IASL. Signed-off-by: Bin Meng Revi

Re: [U-Boot] [PATCH V2 1/7] mips: ath79: ar933x: Avoid warning with gcc5

Am 22.05.2016 um 05:59 schrieb Wills Wang: > GCC 5.3 report a warning: 'upper' and 'lower' may be used > uninitialized in this function [-Wmaybe-uninitialized]. > Compiler might need explicit initializer. > > Signed-off-by: Wills Wang > --- > > arch/mips/mach-ath79/ar933x/ddr.c | 2 ++ > 1 fi

Re: [U-Boot] [PATCH v3 0/8] Add support for Espresso7420 board

On 24/04/16 01:48, Thomas Abraham wrote: > Changes since v2: > - changes based on comments from Simon Glass and Minkyu Kang. > > This patch series add support for Espresso7420 board. This board is > the development/evaluation platform for Exynos7420 SoC. The SoC is > composed of quad Cortex-A57 bl

Re: [U-Boot] [PATCH v2 00/25] exynos: video: Convert exynos LCD driver to use driver model

On 24/05/16 10:35, Jaehoon Chung wrote: > Hi All, > > On 05/24/2016 05:18 AM, Simon Glass wrote: >> Hi Minkyu, >> >> On 16 May 2016 at 22:38, Minkyu Kang wrote: >>> Hi, >>> >>> On 17/05/16 13:22, Jaehoon Chung wrote: Hi Simon. On 05/15/2016 06:22 AM, Simon Glass wrote: > Hi Jae

Re: [U-Boot] [PATCH 3/8] acpi: Pass -D__ACPI__ when compiling ASL files

Hi Simon, On Thu, May 26, 2016 at 7:17 AM, Simon Glass wrote: > On 25 May 2016 at 02:48, Bin Meng wrote: >> ASL files may include various U-Boot header files, but IASL compiler >> does not understand any C language embedded in these header files. >> To reuse those header files for ASL compiling,

[U-Boot] [GIT PULL] u-boot-mips/master

Hi Tom, here is another batch of MIPS updates. The following changes since commit fc15b9beed05dec6cc092c265042381a0eadb0e9: Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2016-05-24 13:42:03 -0400) are available in the git repository at: git://git.denx.de/u-boot-mips.git mas

Re: [U-Boot] [PATCH] mips: Allow overriding start.S in SPL

Am 25.05.2016 um 02:17 schrieb Marek Vasut: > Certain chips, like the JZ47xx, have extreme size constraints on the > SPL size and require custom start.S . Allow overriding the start.S > the same way ARM MXS does it. > > Signed-off-by: Marek Vasut > Cc: Daniel Schwierzeck > Cc: Paul Burton > -

Re: [U-Boot] [PATCH 5/8] x86: quark: Add platform ASL files

Hi Simon, On Thu, May 26, 2016 at 7:17 AM, Simon Glass wrote: > Hi Bin, > > On 25 May 2016 at 02:48, Bin Meng wrote: >> This adds basic quark platform ASL files. They are intended to be >> included in dsdt.asl of any board that is based on this platform. >> >> Signed-off-by: Bin Meng >> --- >>

Re: [U-Boot] [PATCH] mtd: nand: Remove jz4740 driver

Am 25.05.2016 um 02:16 schrieb Marek Vasut: > This driver is not used by anyone, remove it. > > Signed-off-by: Marek Vasut > Cc: Daniel Schwierzeck > Cc: Paul Burton > Cc: Scott Wood > --- > drivers/mtd/nand/Makefile | 1 - > drivers/mtd/nand/jz4740_nand.c | 258 > --

Re: [U-Boot] [PATCH] mips: Drop JZ4740 remnants

Am 25.05.2016 um 02:17 schrieb Marek Vasut: > Remove the remnants of JZ4740 support. > > Signed-off-by: Marek Vasut > Cc: Daniel Schwierzeck > Cc: Paul Burton > --- > arch/mips/include/asm/global_data.h |8 - > arch/mips/include/asm/jz4740.h | 1150 > ---

Re: [U-Boot] [PATCH V2 2/7] mips: ath79: ar933x: Fix ethernet PHY mismatch

Am 22.05.2016 um 05:59 schrieb Wills Wang: > We need reset the Ethernet Switch analog part before operation, > or the build-in Ethernet PHY don't work. > > Signed-off-by: Wills Wang > --- > > arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 + > arch/mips/mach-ath79/reset.c

Re: [U-Boot] [PATCH 7/8] x86: galileo: Enable ACPI table generation

On 25 May 2016 at 02:48, Bin Meng wrote: > Enable ACPI table generation by creating a DSDT table. > > Signed-off-by: Bin Meng > --- > > board/intel/galileo/.gitignore | 3 +++ > board/intel/galileo/Makefile | 1 + > board/intel/galileo/acpi/mainboard.asl | 11 +++ > b

Re: [U-Boot] [PATCH] sandbox: gpio: doc: Fix parameter documentation

On 25 May 2016 at 07:18, Mario Six wrote: > The documentation of parameters in arch/sandbox/include/asm/gpio.h is > either missing or faulty. > > This patch corrects the documentation. > > Signed-off-by: Mario Six > --- > arch/sandbox/include/asm/gpio.h | 16 ++-- > 1 file changed, 1

Re: [U-Boot] [PATCH 2/4] MIPS: Fix _ACAST32_ for pointers on MIPS64

Am 17.05.2016 um 12:56 schrieb Paul Burton: > When building for MIPS64 and providing a pointer to _ACAST32_, > optionally via CPHYSADDR or one of the CKSEGxADDR macros, the cast > directly to a 32 bit int leads to compilation warnings such as the > following: > > In file included from ./arch/m

Re: [U-Boot] [PATCH 8/8] x86: baytrail: acpi: Fix I/O APIC ID in the MADT table

On 25 May 2016 at 02:48, Bin Meng wrote: > > So far this is hardcoded to 2, but it should really be read > from the I/O APIC register. > > Signed-off-by: Bin Meng > > --- > > arch/x86/cpu/baytrail/acpi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Simon Glass

Re: [U-Boot] [PATCH 5/8] x86: quark: Add platform ASL files

Hi Bin, On 25 May 2016 at 02:48, Bin Meng wrote: > This adds basic quark platform ASL files. They are intended to be > included in dsdt.asl of any board that is based on this platform. > > Signed-off-by: Bin Meng > --- > > arch/x86/include/asm/arch-quark/acpi/irqroute.h| 15 ++ > arch/x86/

Re: [U-Boot] [PATCH 3/8] acpi: Pass -D__ACPI__ when compiling ASL files

On 25 May 2016 at 02:48, Bin Meng wrote: > ASL files may include various U-Boot header files, but IASL compiler > does not understand any C language embedded in these header files. > To reuse those header files for ASL compiling, use __ACPI__ in the > header files to exclude everything that is not

Re: [U-Boot] [PATCH 6/8] x86: quark: Generate ACPI FADT/MADT tables

On 25 May 2016 at 02:48, Bin Meng wrote: > Generate quark platform-specific FADT/MADT tables. > > Signed-off-by: Bin Meng > --- > > arch/x86/cpu/quark/Makefile | 1 + > arch/x86/cpu/quark/acpi.c | 163 > > 2 files changed, 164 insertions(+) > cr

Re: [U-Boot] [PATCH 4/8] x86: quark: Prepare device.h for inclusion by ASL

On 25 May 2016 at 02:48, Bin Meng wrote: > There is a device.h for quark on-chip devices, mainly for definitions > of internal PCI device numbers, but it's not ready to be included by > ASL files. Update to use hex numbers for PCI dev and __ACPI__. > > Signed-off-by: Bin Meng > --- > > arch/x86/

Re: [U-Boot] [PATCH 2/8] x86: acpi: Make irqroute.asl common

On 25 May 2016 at 02:48, Bin Meng wrote: > The irqroute.asl file is already common enough to all x86 platforms. > Platform ASL files need only provide a irqroute.h to describe how > internal PCI devices and PCIe downstream port devices' INTx pins are > routed to which PIRQ pin. > > Signed-off-by:

Re: [U-Boot] [PATCH 1/8] x86: acpi: Create a common irqlinks ASL file

On 25 May 2016 at 02:48, Bin Meng wrote: > Move the irqlinks.asl file currently in the BayTrail directory to > a common place to be shared among all x86 platforms. As the PIRQ > routing control programming interface is common to Intel chipsets, > leave the common part in the common file, and move

Re: [U-Boot] [PATCH v5 4/4] dm: test: Add GPIO open drain tests

On 25 May 2016 at 07:15, Mario Six wrote: > > Add some tests for the new open drain setting feature of the GPIO > uclass, and extend the capabilities of the sandbox GPIO driver > accordingly. > > Signed-off-by: Mario Six > --- > > v5: > - Use 'sandbox_gpio_*' functions in tests > - Add 'sandbox_g

Re: [U-Boot] [PATCH v5 3/4] dm: gpio: Implement open drain for MPC85XX GPIO

On 25 May 2016 at 07:15, Mario Six wrote: > From: "mario@gdsys.cc" > > This patch implements the open-drain setting feature for the MPC85XX > GPIO controller. > > Signed-off-by: Mario Six > --- > > v5: > None > > v4: > - Added forgotten mpc85xx_gpio_{get,set}_open_drain functions > > v3: > -

Re: [U-Boot] [PATCH 1/4] MIPS: Move CONFIG_SYS_TEXT_BASE to Kconfig

Am 17.05.2016 um 12:56 schrieb Paul Burton: > Move CONFIG_SYS_TEXT_BASE to Kconfig, and add default values in board > Kconfig files matching what was present in their config headers. This > will make it cleaner to conditionalise the value for Malta based on 32 > vs 64 bit builds. > > Signed-off-

Re: [U-Boot] [PATCH v3 1/5] fdt: Support for ISA busses

Am 17.05.2016 um 08:43 schrieb Paul Burton: > Support ISA busses in much the same way as Linux does. This allows for > ISA bus addresses to be translated, and only if CONFIG_OF_ISA_BUS is > selected in order to avoid including the code in builds which won't need > it. > > Signed-off-by: Paul Bur

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 12:31 AM, Daniel Schwierzeck wrote: > > > Am 26.05.2016 um 00:21 schrieb Marek Vasut: >> On 05/26/2016 12:17 AM, Daniel Schwierzeck wrote: >>> >>> >>> Am 25.05.2016 um 02:19 schrieb Marek Vasut: The Ingenic JZ47xx requires special bit (UART_EN) set in FCR register in order

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

Am 26.05.2016 um 00:21 schrieb Marek Vasut: > On 05/26/2016 12:17 AM, Daniel Schwierzeck wrote: >> >> >> Am 25.05.2016 um 02:19 schrieb Marek Vasut: >>> The Ingenic JZ47xx requires special bit (UART_EN) set in FCR register >>> in order to work at all. Add this special case handling into the drive

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

On 05/26/2016 12:17 AM, Daniel Schwierzeck wrote: > > > Am 25.05.2016 um 02:19 schrieb Marek Vasut: >> The Ingenic JZ47xx requires special bit (UART_EN) set in FCR register >> in order to work at all. Add this special case handling into the driver. >> >> Signed-off-by: Marek Vasut >> Cc: Tom Rin

Re: [U-Boot] [PATCH] serial: 16550: Add JZ47xx support

Am 25.05.2016 um 02:19 schrieb Marek Vasut: > The Ingenic JZ47xx requires special bit (UART_EN) set in FCR register > in order to work at all. Add this special case handling into the driver. > > Signed-off-by: Marek Vasut > Cc: Tom Rini > Cc: Simon Glass > Cc: Daniel Schwierzeck > Cc: Paul B

[U-Boot] [PATCH v4 3/5] dm: ns16550: Don't map_physmem for I/O ports

From: Paul Burton If the UART is to be accessed using I/O port accessors (inb & outb) then using map_physmem doesn't make sense, since it operates in a different memory space. Remove the call to map_physmem when CONFIG_SYS_NS16550_PORT_MAPPED is defined, allowing I/O port addresses to not be mang

Re: [U-Boot] [PATCH v3 5/5] malta: Use device model & tree for UART

Am 17.05.2016 um 08:43 schrieb Paul Burton: > Make use of device model & device tree to probe the UART driver. This is > the initial step in bringing Malta up to date with driver model, and > allows for cleaner handling of the different I/O addresses for different > system controllers by specifyi

Re: [U-Boot] [PATCH v4 3/5] dm: ns16550: Don't map_physmem for I/O ports

Am 26.05.2016 um 00:01 schrieb Daniel Schwierzeck: > From: Paul Burton > > If the UART is to be accessed using I/O port accessors (inb & outb) then > using map_physmem doesn't make sense, since it operates in a different > memory space. Remove the call to map_physmem when > CONFIG_SYS_NS16550_P

Re: [U-Boot] [PATCH v3 4/5] malta: Tidy up UART address selection

Am 17.05.2016 um 08:43 schrieb Paul Burton: > The address of the UART differs based upon the system controller because > it's actually within the I/O port region, which is in a different > location for each system controller. Rather than handling this as 2 > UARTs with the correct one selected at

Re: [U-Boot] [PATCH v3 2/5] fdt: Document the rest of struct of_bus

Am 17.05.2016 um 08:43 schrieb Paul Burton: > Provide some documentation for the fields of struct of_bus, for > consistency with that provided for the new match field. > > Signed-off-by: Paul Burton > --- > > Changes in v3: None > Changes in v2: > - New patch. > > common/fdt_support.c | 19 +

[U-Boot] [PATCH V3] gpio: add Tegra186 GPIO driver

From: Stephen Warren Tegra186's GPIO controller register layout is significantly different from previous chips, so add a new driver for it. In fact, there are two different GPIO controllers in Tegra186 that share a similar register layout, but very different port mapping. This driver covers both.

Re: [U-Boot] [PATCH V2] Add a mailbox driver framework/uclass

On 05/23/2016 09:39 AM, Simon Glass wrote: On 14 May 2016 at 13:33, Simon Glass wrote: On 13 May 2016 at 15:50, Stephen Warren wrote: From: Stephen Warren A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some othe

Re: [U-Boot] [PATCH v2] arm64: allow space reservation for boot header

On Wed, May 25, 2016 at 9:50 AM, Andre Przywara wrote: > Hi, > > On 25/05/16 17:15, Steve Rae wrote: > > Hi, > > > > On Wed, May 25, 2016 at 1:48 AM, Hans de Goede > > wrote: > > > > Hi, > > > > On 25-05-16 10:40, Andre Przywara wrote: > > > > Some SPL

Re: [U-Boot] [PATCH v2] driver/ddr/fsl: Add workaround for erratum A-010165

On 05/10/2016 01:13 AM, Shengzhou Liu wrote: > During DDR-2133 operation, the transmit data eye margins determined > during the memory controller initialization may be sub-optimal, set > DEBUG_29[12] and DEBUG_29[13:16] = 4'b0100 before MEM_EN is set. > > Signed-off-by: Shengzhou Liu > --- > v2:

Re: [U-Boot] [PATCH v2] arm64: allow space reservation for boot header

Hi, On 25/05/16 17:15, Steve Rae wrote: > Hi, > > On Wed, May 25, 2016 at 1:48 AM, Hans de Goede > wrote: > > Hi, > > On 25-05-16 10:40, Andre Przywara wrote: > > Some SPL loaders (like Allwinner's boot0) require a header > before the >

Re: [U-Boot] [PATCH 2/2 v2] driver/ddr/fsl: Add workaround for erratum A-009803

On 03/10/2016 01:46 AM, Shengzhou Liu wrote: > During initial DDR training, false parity errors may be detected. > This patch adds workaround to fix the erratum. > Tested on LS2085QDS and LS2080RDB. > > Signed-off-by: Shengzhou Liu > --- > v2: Integrated York's comments. > > arch/arm/include/as

[U-Boot] Please pull u-boot-sunxi master

Hi Tom, Here is the first sunxi pull-req for v2016.07, it contains a few improvements and fixes, nothing special. Note the big diffstat is due to cleaning up defconfig's be enabling various CMD options by default on sunxi. The following changes since commit fc15b9beed05dec6cc092c265042381a0eadb

Re: [U-Boot] [PATCH v2] arm64: allow space reservation for boot header

Hi, On Wed, May 25, 2016 at 1:48 AM, Hans de Goede wrote: > Hi, > > On 25-05-16 10:40, Andre Przywara wrote: > >> Some SPL loaders (like Allwinner's boot0) require a header before the >> actual U-Boot binary to both check its validity and to find other data >> to load. >> Introduce a config opti

Re: [U-Boot] [PATCH] ts4800: add CONFIG_SYS_FSL_ERRATUM_ESDHC_A001

Hi Fabio, On 05/20/2016 05:40 PM, Fabio Estevam wrote: > Hi Sebastien, > > On Fri, May 20, 2016 at 5:13 PM, Sebastien Bourdelin > wrote: > >> This issue happen with the SD card, i currently didn't found the time to >> try with eMMC. > Ok, we also boot from SD card on the mx51evk and never observe

[U-Boot] pull request: u-boot-uniphier/master

Hi Tom, Here are some UniPhier SoC updates for v2016.07-rc1: - Support the second ARMv8 SoC from Socionext Inc. - Misc cleanups and fixes The following changes since commit fc15b9beed05dec6cc092c265042381a0eadb0e9: Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2016-05-24 13:42:

Re: [U-Boot] [PATCH 0/7] ARM: uniphier: updates for v2016.07-rc1

2016-05-24 21:13 GMT+09:00 Masahiro Yamada : > > > Masahiro Yamada (7): > ARM: uniphier: disable cache in SPL of PH1-LD20 > ARM: uniphier: clean up boot mode tables > ARM: uniphier: rename umc-ld20-regs.h to umc64-regs.h > ARM: uniphier: rename UMC macro names of PH1-LD20 > ARM: uniphier:

Re: [U-Boot] [linux-sunxi] [PATCH 0/7] spl: nand: sunxi: implement auto-detection

Hi, On 20-05-16 15:55, Boris Brezillon wrote: Hello, This patch series aims at adding support for NAND auto-detection to the sunxi SPL NAND driver. As explained in patch 7, this auto-detection is nothing more than a dumb "trial and error" logic, but it allows one to use the same SPL binary for

Re: [U-Boot] [PATCH 11/21] tools: moveconfig: add --undef option to move CONFIGs with default y

2016-05-26 0:00 GMT+09:00 Joe Hershberger : > On Tue, May 24, 2016 at 6:16 PM, Masahiro Yamada > wrote: >> Hi Joe, >> >> 2016-05-24 23:38 GMT+09:00 Joe Hershberger : >> We can move bool option with default y in this way: 1. create an entry in Kconfig 2. run "tools/moveconfig.py --

Re: [U-Boot] [PATCH 11/21] tools: moveconfig: add --undef option to move CONFIGs with default y

On Tue, May 24, 2016 at 6:16 PM, Masahiro Yamada wrote: > Hi Joe, > > 2016-05-24 23:38 GMT+09:00 Joe Hershberger : > >>> We can move bool option with default y in this way: >>> 1. create an entry in Kconfig >>> 2. run "tools/moveconfig.py --undef=CONFIG_FOO CONFIG_FOO" >> >> This seems tedious t

Re: [U-Boot] [PATCH 2/2] spi: zynqmp_qspi: Add qspi driver support for ZynqMP boards

On 23.5.2016 14:04, Siva Durga Prasad Paladugu wrote: > Added the qspi driver support for respective ZynqMP boards > ZCU102, ZCU102 RevB and DC1 boards. > > Signed-off-by: Siva Durga Prasad Paladugu > --- > configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig |4 > configs/xilinx_zynqmp_zcu

Re: [U-Boot] [PATCH v1 3/7] nand: add nand mtd concat support

On 05/25/2016 01:10 AM, Heiko Schocher wrote: > Hello Scott, > > Am 25.05.2016 um 07:30 schrieb Scott Wood: >> On 05/25/2016 12:07 AM, Heiko Schocher wrote: >>> add for nand devices mtd concat support. Generic MTD concat >>> support is already ported to mainline, and used in the cfi_mtd >>> driver

Re: [U-Boot] [PATCH 10/10] sunxi: Add PSCI implementation in C

On 25/05/16 03:14, Chen-Yu Tsai wrote: > On Tue, May 24, 2016 at 4:41 PM, Marc Zyngier wrote: >> On 23/05/16 13:41, Chen-Yu Tsai wrote: >>> To make the PSCI backend more maintainable and easier to port to newer >>> SoCs, rewrite the current PSCI implementation in C. >>> >>> Some inline assembly bi

Re: [U-Boot] [PATCH v1 2/7] ubi: add new ubi command "ubi dettach"

On 05/25/2016 01:28 AM, Heiko Schocher wrote: > Hello Scott, > > Am 25.05.2016 um 07:47 schrieb Scott Wood: >> On 05/25/2016 12:07 AM, Heiko Schocher wrote: >>> @@ -661,7 +675,9 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, >>> char * const argv[]) >>> U_BOOT_CMD( >>> ubi, 6, 1

Re: [U-Boot] [PATCH 06/10] sunxi: Group cpu core related controls together

On 24/05/16 17:06, Chen-Yu Tsai wrote: > On Tue, May 24, 2016 at 4:15 PM, Marc Zyngier wrote: >> On 23/05/16 13:41, Chen-Yu Tsai wrote: >>> Instead of listing individual registers for controls to each processor >>> core, list them as an array of registers. This makes accessing controls >>> by core

Re: [U-Boot] [PATCH 04/10] ARM: allocate extra space for PSCI stack in secure section during link phase

On 24/05/16 16:49, Chen-Yu Tsai wrote: > Hi, > > On Tue, May 24, 2016 at 9:58 PM, Marc Zyngier wrote: >> On 24/05/16 11:21, Marc Zyngier wrote: >>> On 23/05/16 13:41, Chen-Yu Tsai wrote: The PSCI implementation expects at most 2 pages worth of space reserved at the end of the secure sec

Re: [U-Boot] [RFC][PATCH] arm: rk: Drop SYS_MALLOC_F and SPL_SYS_MALLOC_SIMPLE

On 05/25/2016 05:29 AM, Simon Glass wrote: > Hi Marek, > > On 24 May 2016 at 18:15, Marek Vasut wrote: >> Both SYS_MALLOC_F and SPL_SYS_MALLOC_SIMPLE are generic config options, >> drop them from the rockchip-specific Kconfig file. >> >> Signed-off-by: Marek Vasut >> Cc: Tom Rini >> Cc: Simon G

[U-Boot] [PATCH v5 1/4] dm: gpio: Add driver for MPC85XX GPIO controller

From: "mario@gdsys.cc" This patch adds a driver for the built-in GPIO controller of the MPC85XX SoC (probably supporting other PowerQUICC III SoCs as well). Each GPIO bank is identified by its own entry in the device tree, i.e. gpio-controller@fc00 { #gpio-cells = <2>; compatibl

[U-Boot] [PATCH] sandbox: gpio: doc: Fix parameter documentation

The documentation of parameters in arch/sandbox/include/asm/gpio.h is either missing or faulty. This patch corrects the documentation. Signed-off-by: Mario Six --- arch/sandbox/include/asm/gpio.h | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/sandbox/

[U-Boot] [PATCH v5 4/4] dm: test: Add GPIO open drain tests

Add some tests for the new open drain setting feature of the GPIO uclass, and extend the capabilities of the sandbox GPIO driver accordingly. Signed-off-by: Mario Six --- v5: - Use 'sandbox_gpio_*' functions in tests - Add 'sandbox_gpio_{get,set}_open_drain' prototypes to arch/sandbox/include/

[U-Boot] [PATCH v5 3/4] dm: gpio: Implement open drain for MPC85XX GPIO

From: "mario@gdsys.cc" This patch implements the open-drain setting feature for the MPC85XX GPIO controller. Signed-off-by: Mario Six --- v5: None v4: - Added forgotten mpc85xx_gpio_{get,set}_open_drain functions v3: - Added comments v2: - Added missing commit message - Fixed white spac

[U-Boot] [PATCH v5 0/4] dm: gpio: Add driver for MPC85xx GPIO controller

The functions for accessing GPIOs on MPC85xx are hardcoded in arch/powerpc/include/asm/mpc85xx_gpio.h This leads to problems if another GPIO controller supporting the driver model is to be used simultaneously. Therefore, this patch moves the "static" functions into a DM-compatible driver, and also

[U-Boot] [PATCH v5 2/4] dm: gpio: Add methods for open drain setting

From: "mario@gdsys.cc" Certain GPIO devices have the capability to switch their GPIOs into open-drain mode, that is, instead of actively driving the output (Push-pull output), the pin is connected to the collector (for a NPN transistor) or the drain (for a MOSFET) of a transistor, respectivel

Re: [U-Boot] [PATCH] spl: Allow settings malloc_f base address

On 05/25/2016 05:30 AM, Simon Glass wrote: > Hi Marek, Hi! > On 24 May 2016 at 18:14, Marek Vasut wrote: >> Allow configuring the begining of the malloc_f area in SPL. >> This patch uses the same CONFIG_MALLOC_F_ADDR established by >> the sandbox. > > What is this used for? Is the existing sche

[U-Boot] [PATCH v3 2/2] powerpc/mpc85xx: T104x: Add nand secure boot target

For mpc85xx SoCs, the core begins execution from address 0xFFFC. In non-secure boot scenario from NAND, this address will map to CPC configured as SRAM. But in case of secure boot, this default address always maps to IBR (Internal Boot ROM). The IBR code requires that the bootloader(U-boot) mus

[U-Boot] [PATCH v3 1/2] powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL

As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block acces

Re: [U-Boot] [PATCH v1 6/7] dfu, nand, ubi: fix erasing after write finish

On 05/25/2016 12:07 AM, Heiko Schocher wrote: > writting to ubi nand partitions need after write ends an erase > of the remaining sectors. This fail, if dfu write size was not > a multiple of erasesize, example log: > > Failure erase: -1 > > Fix this error. > > Signed-off-by: Heiko Schocher Wh

Re: [U-Boot] [PATCH] mtd: nand: arasan_nfc: Correct nand ecc initialization

On 25.5.2016 11:50, Siva Durga Prasad Paladugu wrote: > Correct the nand ecc initialization code > This fixes the issue of incorrect nand ecc > init if no device is found in ecc_matrix then > it endsup ecc init with junk initialization > instead of the most suited one. > > Signed-off-by: Siva Durg

[U-Boot] [PATCH v2 1/2] powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL

As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block acces

[U-Boot] [PATCH] powerpc/board: SPL: Enable malloc flag in global data.

For malloc to work in SPL framework enable GD_FLG_FULL_MALLOC_INIT flag in global data after allocating memory using mem_malloc_init. Signed-off-by: Sumit Garg --- board/freescale/b4860qds/spl.c | 1 + board/freescale/c29xpcie/spl.c | 1 + board/freescale/p1010rdb/spl.c | 1 + board/

[U-Boot] [PATCH v2 2/2] powerpc/mpc85xx: T104x: Add nand secure boot target

For mpc85xx SoCs, the core begins execution from address 0xFFFC. In non-secure boot scenario from NAND, this address will map to CPC configured as SRAM. But in case of secure boot, this default address always maps to IBR (Internal Boot ROM). The IBR code requires that the bootloader(U-boot) mus

Re: [U-Boot] wanting to confirm i'm setting the MAC address the right way

On Wed, 25 May 2016, Bin Meng wrote: > On Wed, May 25, 2016 at 12:31 AM, Robert P. J. Day > wrote: > > > > i want to use the fdt_fixup_ethernet() routine to automate most > > of the work of setting the MAC address in the FDT before passing > > it to the kernel, so here's what i'm about to do, a

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