Hello Scott,
Am 30.05.2016 um 20:57 schrieb Scott Wood:
Updates the NAND code to match Linux v4.6. The previous sync was from
Linux v4.1 in commit d3963721d93fafa.
Note that none of the individual NAND drivers tracked Linux closely
enough to be synced themselves, other than manually applying a
> Am 31.05.2016 um 07:04 schrieb Michal Simek :
>
>> On 30.5.2016 21:36, Alexander Graf wrote:
>>
>>
>>> On 05/30/2016 04:11 PM, Michal Simek wrote:
>>> Setup flag when default environment are used to be able to
>>> rewrite default distro boot variables based on SoC boot mode.
>>>
>>> Signed-
Lukasz
>> Hi Lukasz
>>
>> > On 30-May-2016, at 5:24 PM, Lukasz Majewski
>> > wrote:
>> >
>> > Hi Ravi,
>> >
>> > Thanks for adding this functionality to DFU.
>> >
>> > Please find below organizational tips:
>> >
>> > - Please use 'patman' (./tools/patman/patman) tool when sending
>> > patc
Hi Tom,
please pull the following patches from the Marvell git repository.
I've included 2 SPEAr patches there since we don't have a SPEAr
git repository. I hope this okay.
Thanks,
Stefan
The following changes since commit e4a94ce4ac77396b181663c0493c50bc2d5b9143:
Merge git://git.denx.de/u-bo
Hi Hamish,
On Mon, May 30, 2016 at 11:00 PM, Hamish Martin
wrote:
> Define a platform data structure for the MPC85XX GPIO driver to allow
> use of the driver without device tree. Users should define the GPIO
> blocks for their platform like this:
> struct mpc85xx_gpio_plat gpio_blocks[] = {
>
On 26.05.2016 10:48, Peter Robinson wrote:
In the big move of CONFIG_HUSH_PARSER to config files the clearfog
somehow missed out.
Signed-off-by: Peter Robinson
Applied to u-boot-marvell/master
Thanks,
Stefan
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On 27.04.2016 09:10, Stefan Roese wrote:
As the old ethernet PHY is not available any more, the x600 board has
been redesigned with the Micrel KSZ9031 PHY. This patch adds support
to autodetect the PHY and configure the Micrel PHY correctly.
Signed-off-by: Stefan Roese
Applied to u-boot-marve
On 27.04.2016 09:10, Stefan Roese wrote:
EFI is not needed on x600. So lets remove the EFI support to make it fit
into the 0x6 image size limit again.
Signed-off-by: Stefan Roese
Applied to u-boot-marvell/master
Thanks,
Stefan
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On 30.5.2016 21:36, Alexander Graf wrote:
>
>
> On 05/30/2016 04:11 PM, Michal Simek wrote:
>> Setup flag when default environment are used to be able to
>> rewrite default distro boot variables based on SoC boot mode.
>>
>> Signed-off-by: Michal Simek
>> ---
>>
>> I didn't find any way how to d
Hi,
On 30.5.2016 16:12, Amit Tomer wrote:
> Hello,
>
> Trying to add support for H3 EMAC driver.
>
> http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/261544
>
> It was working well until commit "
> b733c278d7adc48c71bd06faf359db3d9e385185" was introduced.
>
> net: phy: Handle phy_start
On Monday 30 May 2016 11:26 PM, Tom Rini wrote:
> On Thu, Apr 28, 2016 at 10:36:11AM +0200, Michal Simek wrote:
>
>> If bl_len is not aligned it can caused a problem because another code
>> expects that start is aligned.
>>
>> Signed-off-by: Michal Simek
>> Reviewed-by: Simon Glass
>
> Applie
Add device tree support.
Signed-off-by: Wenyou Yang
---
drivers/serial/atmel_usart.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index 4fe992b..b78a94c 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/seri
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Tuesday, May 17, 2016 12:55 AM
> To: Shengzhou Liu ; u-boot@lists.denx.de
> Subject: Re: [PATCH 1/2] drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl
>
> Shengzhou,
>
> Your understanding is correct. However, we
On 05/31/2016 02:35 AM, Wills Wang wrote:
>
>
> On 05/30/2016 11:18 PM, Marek Vasut wrote:
>> On 05/30/2016 04:54 PM, Wills Wang wrote:
>>> Add code to ungate USB and ethernet controller on qca953x
>> Is this code coming from mainline Linux ?
>
> No, i refer to u-boot code from QSDK.
Oh ok. I'd
On 05/30/2016 11:18 PM, Marek Vasut wrote:
On 05/30/2016 04:54 PM, Wills Wang wrote:
Add code to ungate USB and ethernet controller on qca953x
Is this code coming from mainline Linux ?
No, i refer to u-boot code from QSDK.
Signed-off-by: Wills Wang
---
arch/mips/mach-ath79/reset.c | 50
On Mon, 2016-05-30 at 18:39 +0200, Stefan Roese wrote:
> On 30.05.2016 17:22, Marek Vasut wrote:
> > Remove the check for GD_FLG_SPL_INIT in spl_relocate_stack_gd().
> > The check will always fail. This is because spl_relocate_stack_gd()
> > is called from ARM's crt0.S and it is called before board
On Mon, 2016-05-30 at 18:39 +0200, Stefan Roese wrote:
> On 30.05.2016 17:22, Marek Vasut wrote:
> > Enable both features to reduce the SPL size by 6 kiB.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Chin Liang See
> > Cc: Dinh Nguyen
> > Cc: Pavel Machek
> > Cc: Stefan Roese
>
> Reviewed-by:
On 05/30/2016 07:55 PM, Tom Rini wrote:
> On Thu, May 26, 2016 at 06:00:24PM +0200, Marek Vasut wrote:
>
>> Tweak the tiny printf code to also provide similarly tiny sprintf()
>> implementation. This is not comformant with POSIX for sure, but it
>> keeps the size down while still behaving rather r
On 05/30/2016 07:55 PM, Tom Rini wrote:
> On Thu, May 26, 2016 at 06:00:25PM +0200, Marek Vasut wrote:
>
>> Enable support for tiny printf and tiny sprintf on the omap3_logic
>> board to trim down the SPL size. This makes the SPL actually build
>> again and fit into the SRAM.
>>
>> Signed-off-by:
On 05/30/2016 01:23 PM, Rajesh Bhagat wrote:
> Implements the logic to calculate the optimal usb maximum trasfer blocks
> instead of sending USB_MAX_XFER_BLK blocks which is 65535 and 20 in case
> of EHCI and other USB protocols respectively.
>
> It adds an array of trasfer blocks that should be c
On Tue, 31 May 2016 01:48:05 +0300
Siarhei Siamashka wrote:
> Currently the AHB1 clock speed is configured as 200MHz by
> the SPL, but this causes a subtle and hard to reproduce data
> corruption in SRAM C (for example, this can't be easily
> detected with a trivial memset/memcmp test).
>
> For
Currently the AHB1 clock speed is configured as 200MHz by
the SPL, but this causes a subtle and hard to reproduce data
corruption in SRAM C (for example, this can't be easily
detected with a trivial memset/memcmp test).
For what it's worth, the Allwinner's BSP configures AHB1
as 200MHz, as can be
The full SPL support is not quite ready for Allwinner A64 yet,
but these fixes are likely to be necessary. Of course, unless the
problem is actually caused by wrong voltages and the AXP803 PMIC
support magically fixes it.
PS. Discovered when developing a sunxi-fel based SPI flash programmer
tool a
Since the SRAM C corruption issue is now resolved on Allwinner
A64, it is possible to move the stack top to the address 0x1A000
on both A64 and A80. The boot ROM can load SPL binaries with
up to 32 KiB size on A64 (the 24 KiB SPL size limitation only
affects A10/A20), and this patch also ensures th
On Mon, May 30, 2016 at 5:25 PM, Pavel Machek wrote:
> Yes, it helps. Thanks! I can now write to the enviornment.
Ok, good. What happens if you revert the hack and boot a fresh 2016.05 U-boot?
Are you able to write/save to the env?
I want to understand if your flash always come up with the SR
Hi Sumit!
On Sun, May 29, 2016 at 10:32 PM, Sumit Garg wrote:
> Can you make this support more generic as you have used only
> CONFIG_SPL_FIT_SIGNATURE for SPL verified boot while our platforms doesn't
> use fit signature approach for verification?
>
CONFIG_SPL_FIT_SIGNATURE only adds ./lib/rs
On 05/30/2016 10:37 PM, Marek Vasut wrote:
> On 05/30/2016 10:15 PM, Wolfgang Denk wrote:
>> Dear Marek,
>>
>> In message <1464621732-7617-1-git-send-email-ma...@denx.de> you wrote:
>>> Remove what must've been a typo.
>>>
>>> Signed-off-by: Marek Vasut
>>> Cc: Tom Rini
>>> Cc: Simon Glass
>>> -
On 05/30/2016 10:15 PM, Wolfgang Denk wrote:
> Dear Marek,
>
> In message <1464621732-7617-1-git-send-email-ma...@denx.de> you wrote:
>> Remove what must've been a typo.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Tom Rini
>> Cc: Simon Glass
>> ---
>> include/malloc.h | 1 -
>> 1 file changed, 1 d
On Mon 2016-05-30 10:43:39, Fabio Estevam wrote:
> On Mon, May 30, 2016 at 5:33 AM, Pavel Machek wrote:
>
> > Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:
> >
> > offset 0x4 is protected and cannot be erased
> > => sf help
> > No SPI flash selected. Please run `sf
Dear Marek,
In message <1464621732-7617-1-git-send-email-ma...@denx.de> you wrote:
> Remove what must've been a typo.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
> ---
> include/malloc.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/include/malloc.h b/include/ma
Dear Marek,
In message <574c1963.8000...@denx.de> you wrote:
>
> That's a start, otherwise it boils down the readelf and analyzing what
> is taking space and where to save space.
Does not the .map file provide exactly this type of information?
Best regards,
Wolfgang Denk
--
DENX Software Engi
Dear Pavel,
In message <20160528194124.GA27144@amd> you wrote:
> Debugging SPL is hard, and if SPL is too big, it tends to crash in
> mysterious ways.
>
> (I'm not sure what the exact threshold is, 49762 bytes works, 52426
> bytes does not, so 5 should be good value).
Can you please make cle
On 05/30/2016 04:11 PM, Michal Simek wrote:
Setup flag when default environment are used to be able to
rewrite default distro boot variables based on SoC boot mode.
Signed-off-by: Michal Simek
---
I didn't find any way how to detect that default or saved variables are
used. I want to have a
Marek Vasut writes:
> Remove what must've been a typo.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
> ---
> include/malloc.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/include/malloc.h b/include/malloc.h
> index 8175c75..e065473 100644
> --- a/include/malloc.h
Updates the NAND code to match Linux v4.6. The previous sync was from
Linux v4.1 in commit d3963721d93fafa.
Note that none of the individual NAND drivers tracked Linux closely
enough to be synced themselves, other than manually applying a few
cross-tree changes.
Signed-off-by: Scott Wood
---
d
This change is part of the Linux 4.6 sync. It is being done before the
main sync patch in order to make it easier to address the issue across
all NAND drivers (many/most of which do not closely track their Linux
counterparts) separately from other merge issues.
Signed-off-by: Scott Wood
---
dri
These functions are part of the Linux 4.6 sync. They are being added
before the main sync patch in order to make it easier to address the
issue across all NAND drivers (many/most of which do not closely track
their Linux counterparts) separately from other merge issues.
Signed-off-by: Scott Wood
Commit ad4f54ea86b ("arm: Remove palmtreo680 board") removed the only
user of the docg4 driver and the palmtreo680 image flashing tool. This
patch removes them.
Signed-off-by: Scott Wood
Cc: Mike Dunn
Cc: Simon Glass
---
drivers/mtd/nand/Makefile|2 -
drivers/mtd/nand/docg4.c
This typedef serves no purpose other than causing confusion with
struct nand_chip.
Signed-off-by: Scott Wood
---
cmd/bootm.c| 30 +++
cmd/jffs2.c| 6 +-
cmd/nand.c | 161 ++-
common/env
From: Marek Vasut
This driver is not used by anyone, remove it.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Paul Burton
Cc: Scott Wood
Acked-by: Daniel Schwierzeck
Signed-off-by: Scott Wood
---
drivers/mtd/nand/Makefile | 1 -
drivers/mtd/nand/jz4740_nand.c | 258
nand_info[] is now an array of pointers, with the actual mtd_info
instance embedded in struct nand_chip.
This is in preparation for syncing the NAND code with Linux 4.6,
which makes the same change to struct nand_chip. It's in a separate
commit due to the large amount of changes required to accom
Hi Tom,
On Mon, May 30, 2016 at 11:14 AM, Tom Rini wrote:
>
> On Mon, May 30, 2016 at 09:51:22AM -0700, Steve Rae wrote:
>
> > From: Andre Przywara
> >
> > Some SPL loaders (like Allwinner's boot0, and Broadcom's boot0)
> > require a header before the actual U-Boot binary to both check its
> > v
On 25 May 2016 at 12:13, Marek Vasut wrote:
> The ns16550 driver needs serial_in_shift() and serial_out_shift()
> when compiled in debug UART mode, so shift the DM_SERIAL check a
> little to make these functions available.
>
> Signed-off-by: Marek Vasut
> Cc: Tom Rini
> Cc: Simon Glass
> ---
>
On Thu, May 19, 2016 at 07:10:41PM -0500, Daniel Allred wrote:
> Adds doc/README.ti-secure file to explain in generic terms
> how boot images need to be created for secure devices from
> Texas Instruments.
>
> Specific details for creating secure boot images for the
> AM43xx, DRA7xx and AM57xx se
On Thu, May 19, 2016 at 03:23:12PM -0400, Robert P. J. Day wrote:
> Since CONFIG_OF_BOARD_SETUP depends on CONFIG_OF_LIBFDT:
>
> config OF_BOARD_SETUP
> bool "Set up board-specific details in device tree before boot"
> depends on OF_LIBFDT
> ...
>
> remove superfl
On Mon, May 30, 2016 at 09:51:22AM -0700, Steve Rae wrote:
> From: Andre Przywara
>
> Some SPL loaders (like Allwinner's boot0, and Broadcom's boot0)
> require a header before the actual U-Boot binary to both check its
> validity and to find other data to load. Sometimes this header may
> only b
On Sun, May 22, 2016 at 05:46:05AM -0400, Robert P. J. Day wrote:
> Signed-off-by: Robert P. J. Day
>
> diff --git a/tools/.gitignore b/tools/.gitignore
> index ff07680..cb1e722 100644
Applied to u-boot/master, thanks!
--
Tom
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On Tue, May 17, 2016 at 04:38:08PM +0900, Masahiro Yamada wrote:
> Since 1e6ad55c0582 ("armv8/cache: Change cache invalidate and flush
> function"), this routine can be used for both cache flushing and
> cache invalidation. So, it is better to not include "flush" in
> this routine name.
>
> Sign
On Tue, May 17, 2016 at 04:38:06PM +0900, Masahiro Yamada wrote:
> __asm_dcache_all can directly return to the caller of
> __asm_{flush,invalidate}_dcache_all.
>
> We do not have to waste x16 register here.
>
> Signed-off-by: Masahiro Yamada
> Reviewed-by: York Sun
Applied to u-boot/master, t
On Mon, May 23, 2016 at 01:31:19PM +0530, Lokesh Vutla wrote:
> All the output clock parameters of a DPLL needs to be programmed before
> locking the DPLL. But it is being configured after locking the DPLL which
> could potentially bypass DPLL. So fixing this sequence.
>
> Reported-by: Richard Wo
On Wed, May 18, 2016 at 03:00:15PM +0200, Martin Hejnfelt wrote:
> When the base registers are read from device tree the base is not
> 0x48030100 as the driver expects, but 0x4803, resulting in
> non functioning SPI. To deal with this, use same idea as how this
> is done in the linux kernel (d
On Mon, May 16, 2016 at 11:47:29AM +0530, Lokesh Vutla wrote:
> Different AM335x based platforms have different serial consoles. As serial
> console is Kconfig option a separate defconfig has to be created for each
> platform. So pass the serial device dynamically.
>
> Signed-off-by: Lokesh Vutla
On Tue, May 17, 2016 at 04:38:07PM +0900, Masahiro Yamada wrote:
> We should say "clean & invalidate", or simply "flush".
>
> Signed-off-by: Masahiro Yamada
Applied to u-boot/master, thanks!
--
Tom
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On Fri, May 27, 2016 at 10:28:37AM -0600, Simon Glass wrote:
> Hi Tom,
>
> This improves the driver-model block support in MMC, brings in a
> mailbox uclass and fixes/improves a few minor things in the rockchip
> support.
>
>
> The following changes since commit 6523dbf7cce8d8c903346f756e0e41e4
On Sun, May 22, 2016 at 03:16:47PM +0900, Masahiro Yamada wrote:
> Since f6c8f38ec601 ("tools/genboardscfg.py: improve performance more
> with Kconfiglib"), this tool does not use the subprocess module.
>
> Signed-off-by: Masahiro Yamada
Applied to u-boot/master, thanks!
--
Tom
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On Sat, May 21, 2016 at 05:06:31AM -0400, Robert P. J. Day wrote:
> Signed-off-by: Robert P. J. Day
Applied to u-boot/master, thanks!
--
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On Mon, May 16, 2016 at 11:47:26AM +0530, Lokesh Vutla wrote:
> In order to enable cpsw on AM335x ICEv2 board, the following needs to be done:
>
> 1)There are few on board jumper settings which gives a choice between
> cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting
>
On Mon, May 16, 2016 at 11:47:25AM +0530, Lokesh Vutla wrote:
> The CDCE913 and CDCEL913 devices are modular PLL-based, low cost,
> high performance , programmable clock synthesizers. They generate
> upto 3 output clocks from a single input frequency. Each output can
> be programmed for any clock-
On Mon, May 16, 2016 at 11:47:28AM +0530, Lokesh Vutla wrote:
> Add minimal dts support for AM335x-ICEv2 board
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
> Signed-off-by: Roger Quadros
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:47:23AM +0530, Lokesh Vutla wrote:
> Add necessary pinmux support for AM335x ICEv2 board.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:47:24AM +0530, Lokesh Vutla wrote:
> AM335x ICEv2 contains a 2Gbit(128Mx16) of DDR3 SDRAM(MT41J128M16JT-125),
> capable of running at 400MHz. Adding this specific DDR configuration
> details running at 400MHz.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
A
On Mon, May 16, 2016 at 11:11:18AM +0530, Lokesh Vutla wrote:
> Add initial DTS support for AM437x-IDK evm.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:47:22AM +0530, Lokesh Vutla wrote:
> Similar to other TI's AM335x platforms, AM335x ICEv2 also has an
> eeprom populated for its unique identification. Adding this info
> so that AM335x ICEv2 specific initialization can be done.
>
> Reviewed-by: Tom Rini
> Signed-off-b
On Mon, May 16, 2016 at 11:47:27AM +0530, Lokesh Vutla wrote:
> Populate the right dtb file and console for AM335x-ICEv2 board.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:32:49AM +0530, Lokesh Vutla wrote:
> From: Tom Rini
>
> Re-org env sections so that we can fall back to env is in FAT on SD
> card, for broader board compatibility
>
> Signed-off-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
On Mon, May 16, 2016 at 11:24:27AM +0530, Lokesh Vutla wrote:
> From: Mugunthan V N
>
> As per mmc device tree binding documentation card detect gpio has
> to be active low signal. When a hardware is designed with active
> high card detect, gpio polarity has to be changed with
> cd-inverted dt p
On Mon, May 16, 2016 at 11:32:49AM +0530, Lokesh Vutla wrote:
> From: Tom Rini
>
> Re-org env sections so that we can fall back to env is in FAT on SD
> card, for broader board compatibility
>
> Signed-off-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
On Mon, May 16, 2016 at 11:24:28AM +0530, Lokesh Vutla wrote:
> Add initial DTS support for AM335x-evm sk.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:24:29AM +0530, Lokesh Vutla wrote:
> Add initial DTS support for AM335x-BBG
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:24:25AM +0530, Lokesh Vutla wrote:
> Allow am335x-bone.dts to be built and enable uart and timer
> for all beaglebones.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:24:24AM +0530, Lokesh Vutla wrote:
> FIT allows for a multiple dtb in a single image. SPL needs a way to
> detect the right dtb to be used. Adding support for the same.
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
On Mon, May 16, 2016 at 11:11:17AM +0530, Lokesh Vutla wrote:
> Add initial DTS support for AM43-EPOS evm.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:24:26AM +0530, Lokesh Vutla wrote:
> Use a single defconfig for all AM335x platforms by enabling FIT
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:11:19AM +0530, Lokesh Vutla wrote:
> Convert usb host boot defconfig to use DM, DT. Also enable FIT
> support.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:11:16AM +0530, Lokesh Vutla wrote:
> Use a single defconfig for all AM43xx platforms by enabling FIT and delete
> the platform specific defconfigs.
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 11:11:15AM +0530, Lokesh Vutla wrote:
> FIT allows for a multiple dtb in a single image. SPL needs a way to
> detect the right dtb to be used. Adding support for the same.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
On Mon, May 16, 2016 at 10:51:23AM +0530, Lokesh Vutla wrote:
> FIT allows for a multiple dtb in a single image. SPL needs a way to
> detect the right dtb to be used. Adding support for the same.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
On Mon, May 16, 2016 at 10:51:24AM +0530, Lokesh Vutla wrote:
> Use a single defconfig for all DRA7 platforms by enabling FIT and delete
> the platform specific defconfigs.
>
> Signed-off-by: Lokesh Vutla
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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On Mon, May 16, 2016 at 10:51:25AM +0530, Lokesh Vutla wrote:
> Removing:
> uart3_defconfig:
> Now uart3 can be selected using menuconfig, removing separate
> config for uart mode. Doing uart boot is not straight forward as ROM uses
> uart3 as default serial console. In order to boot to prompt, co
On Tue, May 24, 2016 at 10:34:42AM +0530, Lokesh Vutla wrote:
> Detect a FIT when loading from NAND and handle it using the
> new FIT SPL support.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Fri, May 13, 2016 at 01:08:56PM +1200, Chris Packham wrote:
> This follows on from commit d98b052 ("powerpc: Cleanup BOOTFLAG_*
> references") and commit fc3d297 ("Drop bogus BOOTFLAG_* definitions").
> Remove the definitions that have crept in since.
>
> Signed-off-by: Chris Packham
Applied
On Tue, May 24, 2016 at 10:34:41AM +0530, Lokesh Vutla wrote:
> When offset is not aligned to page address, it is possible that extra offset
> will be read from nand. Adjust the image such that first byte of the image
> is at load address after the first page is read.
>
> Reviewed-by: Tom Rini
>
On Tue, May 24, 2016 at 10:34:44AM +0530, Lokesh Vutla wrote:
> This provides a way to load a FIT containing U-Boot and a selection of device
> tree files from UART.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Tue, May 24, 2016 at 10:34:43AM +0530, Lokesh Vutla wrote:
> No prints should be allowed during UART load.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Tue, May 24, 2016 at 10:34:38AM +0530, Lokesh Vutla wrote:
> This provides a way to load a FIT containing U-Boot and a selection of device
> tree files from a File system. Making sure that all the reads and writes
> are aligned to their respective needs.
>
> Tested-by: Michal Simek
> Reviewed
On Tue, May 24, 2016 at 10:34:39AM +0530, Lokesh Vutla wrote:
> Detect a FIT when loading from a FAT File system and handle it using the
> new FIT SPL support.
>
> Tested-by: Michal Simek
> Reviewed-by: Simon Glass
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/maste
On Tue, May 24, 2016 at 10:34:40AM +0530, Lokesh Vutla wrote:
> Detect a FIT when loading from SPI and handle it using the
> new FIT SPL support.
>
> Reviewed-by: Tom Rini
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
--
Tom
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On Thu, May 19, 2016 at 07:10:55PM -0500, Daniel Allred wrote:
> Adds new defconfig files for DRA7xx and AM57xx secure devices.
> These are the same as the non-secure parts, but with the addition
> of the CONFIG_TI_SECURE_DEVICE option set to 'y'.
>
> Signed-off-by: Daniel Allred
> Signed-off-by
On Thu, May 19, 2016 at 07:10:53PM -0500, Daniel Allred wrote:
> Adds an fdt.c file in that defines the ft_cpu_setup() function,
> which should be called from a board-specific ft_board_setup()).
> This ft_cpu_setup() will currently do nothing for non-secure (GP)
> devices but contains pertin
On Tue, May 24, 2016 at 10:34:37AM +0530, Lokesh Vutla wrote:
> sectors field is not being updated when reading fdt from fit image. Because of
> this size_of(u-boot.bin) is being read when reading fdt. Fixing it by updating
> the sectors field properly.
>
> Tested-by: Michal Simek
> Reviewed-by:
On Thu, May 19, 2016 at 07:10:50PM -0500, Daniel Allred wrote:
> Updated the CONFIG_SPL_TEXT_BASE to support secure parts (moving
> the start address past secure reserved memory and the size of the
> security certificate that precedes the boot image on secure devices).
> Updated the related CONFIG
On Thu, May 19, 2016 at 07:10:54PM -0500, Daniel Allred wrote:
> Adds the board specific ft_board_setup() functions that
> are called when CONFIG_OF_BOARD_SETUP is defined. These functions
> will currently just call the ft_cpu_setup() function.
>
> Adds CONFIG_OF_BOARD_SETUP to the defconfig file
On Thu, May 19, 2016 at 07:10:52PM -0500, Daniel Allred wrote:
> Update the CPU string output so that the device
> type is now included as part of the CPU string that
> is printed as the SPL or u-boot comes up. This update
> adds a suffix of the form "-GP" or "-HS" for production
> devices, so tha
On Thu, May 19, 2016 at 07:10:51PM -0500, Daniel Allred wrote:
> Updates the SPL build so that when CONFIG_TI_SECURE_DEVICE
> is in use (which it should be when building for secure parts),
> the TI secure development package is used to create a valid
> secure boot image. The u-boot SPL build proce
On Thu, May 19, 2016 at 07:10:48PM -0500, Daniel Allred wrote:
> From: Madan Srinivas
>
> Adds code to detect AM43xx HS EVMS - the string in the
> I2C EEPROM for HS EVMs differs from GP EVMs. Adds code to
> for evm detection, regardless of whether the evm is for
> GP or HS parts, and updates boa
On Thu, May 19, 2016 at 07:10:49PM -0500, Daniel Allred wrote:
> From: Madan Srinivas
>
> Adds a new defconfig file for the AM43xx secure device.
> This is the same as for the non-secure part, except for:
> CONFIG_TI_SECURE_DEVICE option set to 'y'
> CONFIG_ISW_ENTRY_ADDR updated for
On Thu, May 19, 2016 at 07:10:45PM -0500, Daniel Allred wrote:
> Adds a centralized config_secure.mk in omap-common for
> OMAP-style TI secure devices to use for boot image generation
>
> Depending on the boot media, different images are needed for
> secure devices. These commands generates u-boo
On Thu, May 19, 2016 at 07:10:47PM -0500, Daniel Allred wrote:
> From: Madan Srinivas
>
> Updates configs/am43xx_evm.h to use CONFIG options from
> SOC specific Kconfig file for various calculations.
>
> On AM43x devices, the address of SPL entry point depends on
> the device type, i.e. whethe
On Thu, May 19, 2016 at 07:10:46PM -0500, Daniel Allred wrote:
> Modifies the config.mk to build secure images when building
> the SPL for secure devices.
>
> Depending on the boot media, different images are needed
> for secure devices. The build generates u-boot*_HS_* files
> as appropriate for
On Thu, May 19, 2016 at 07:10:44PM -0500, Daniel Allred wrote:
> From: Madan Srinivas
>
> Defines CONFIG_TI_SECURE_DEVICE which needs to be turned on
> when building images for secure devices. This flag is used
> to invoke the secure image creation tools for creating a
> boot image that can be u
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