Hello Masahiro,
Am 21.06.2016 um 07:32 schrieb Masahiro Yamada:
Move the bootdelay >= 0 check to the caller, which simplifies
the callees.
Signed-off-by: Masahiro Yamada
---
common/autoboot.c | 22 --
1 file changed, 8 insertions(+), 14
Hello Masahiro,
Am 21.06.2016 um 07:32 schrieb Masahiro Yamada:
Factor out the same code from the callees to the caller.
Signed-off-by: Masahiro Yamada
---
common/autoboot.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
Hello Masahiro,
Am 21.06.2016 um 07:32 schrieb Masahiro Yamada:
Because abortboot_keyed() and abortboot_normal() are not compiled
at the same time, we can rename both of them to __abortboot().
This allows to drop #ifdef from the caller.
Signed-off-by: Masahiro Yamada
Hello Masahiro,
Am 21.06.2016 um 07:32 schrieb Masahiro Yamada:
The same information now exists in common/Kconfig. Do not duplicate
documentation from the point of view of maintainability.
Signed-off-by: Masahiro Yamada
---
README | 17
Hello Masahiro,
Am 21.06.2016 um 07:32 schrieb Masahiro Yamada:
This recently added board missed the tree-wide migration of
CONFIG_BOOTDELAY.
Signed-off-by: Masahiro Yamada
---
configs/socfpga_is1_defconfig | 4 +---
include/configs/socfpga_is1.h | 1 -
2
On 22.06.16 04:50, Prabhakar Kushwaha wrote:
> Hi Alex
>
>> -Original Message-
>> From: Alexander Graf [mailto:ag...@suse.de]
>> Sent: Tuesday, June 21, 2016 4:37 AM
>> To: u-boot@lists.denx.de
>> Cc: york sun ; Prabhakar Kushwaha
>>
>>
On 21.06.16 20:02, york sun wrote:
> On 06/21/2016 10:55 AM, Alexander Graf wrote:
>>
>>
>>> Am 21.06.2016 um 19:12 schrieb york sun :
>>>
On 06/20/2016 04:07 PM, Alexander Graf wrote:
Some boards decided not to run ATF or other secure firmware in EL3, so
they
Hello.
I have a similar problem with U-Boot on Intel Atom C2000.
And I have found that the issue with the SPI flash is caused by a file
x86/cpu/coreboot/pci.c which contains an empty driver claiming to be
compatible with intel,pch7 and intel,pch9. After commenting it out the SPI
flash is being
> Am 22.06.2016 um 05:06 schrieb Prabhakar Kushwaha
> :
>
> Hi Alex,
>
>
>> -Original Message-
>> From: Alexander Graf [mailto:ag...@suse.de]
>> Sent: Tuesday, June 21, 2016 4:37 AM
>> To: u-boot@lists.denx.de
>> Cc: york sun ; Prabhakar
> Am 22.06.2016 um 04:51 schrieb Prabhakar Kushwaha
> :
>
> Hi Alex,
>
>
>> -Original Message-
>> From: Alexander Graf [mailto:ag...@suse.de]
>> Sent: Tuesday, June 21, 2016 4:37 AM
>> To: u-boot@lists.denx.de
>> Cc: york sun ; Prabhakar
> Am 21.06.2016 um 23:49 schrieb york sun :
>
>> On 06/20/2016 04:07 PM, Alexander Graf wrote:
>> Most new systems in U-Boot these days make use of the generic "distro"
>> framework which allows a user to have U-Boot scan for a bootable OS
>> on all available media types.
>>
Dear Heiko,
Sorry for being late.
It seems that code in sunxi_gpio_set_cfgbank is causing the panic.
regards,
2016-06-09 06:38 időpontban Heiko Schocher ezt írta:
Hello,
Am 08.06.2016 um 21:50 schrieb kri...@nmdps.net:
Küldve az én HTC-mről
- Továbbított üzenet -
Feladó:
On 20 June 2016 at 23:32, Masahiro Yamada wrote:
> As the help message of CONFIG_BOOTDELAY says, CONFIG_BOOTDELAY=-2
> means the autoboot with no delay, with no abort check even if
> CONFIG_ZERO_BOOTDELAY_CHECK is defined.
>
> To sum up, the autoboot behaves as
>From: Marek Vasut [mailto:ma...@denx.de]
>On 06/21/2016 09:22 AM, Sriram Dash wrote:
>> Modifies errata implementation due to the fact that P3041, P5020, and
>> P5040 are all big endian for the USB PHY registers, but they were
>> specified little endian. Also
>
>Please split this into two
On Wed, Jun 22, 2016 at 11:30 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> Set the enable-method in the cpu node to PSCI, and create device
> node for PSCI, when PSCI was enabled.
ARMv7 also has a similar function. Is it possible to move that one
From: Hou Zhiqiang
If the PSCI and PPA is ready, skip the fixup for spin-table and
waking secondary cores. Otherwise, change SMP method to spin-table,
and the device node of PSCI will be removed.
Signed-off-by: Hou Zhiqiang
---
V6:
- no change
V5:
From: Hou Zhiqiang
Set the enable-method in the cpu node to PSCI, and create device
node for PSCI, when PSCI was enabled.
Signed-off-by: Hou Zhiqiang
---
V6:
- Removed PSCI version 0.1 support.
V5:
- Moved the weak func
From: Hou Zhiqiang
This function assume that the d-cache and MMU has been enabled earlier,
so it just created MMU table in main memory. But the assumption is not
always correct, for example, the early setup is done in EL3, while
enable_caches() is called when the PE has
From: Hou Zhiqiang
The PPA use PSCI to make secondary cores bootup. So when PPA was
enabled, add the CONFIG_ARMV8_PSCI to identify the SMP boot-method
between PSCI and spin-table.
Signed-off-by: Hou Zhiqiang
---
V6:
- Refactor the integration of
From: Hou Zhiqiang
The FSL Primary Protected Application (PPA) is a software component
loaded during boot which runs in TrustZone and remains resident
after boot.
Use the secure firmware framework to integrate FSL PPA into U-Boot.
Signed-off-by: Hou Zhiqiang
From: Hou Zhiqiang
This framework is introduced for ARMv8 secure monitor mode firmware.
The main functions of the framework are, on EL3, verify the firmware,
load it to the secure memory and jump into it, and while it returned
to U-Boot, do some necessary setups at the
Hi Alex
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
>
> Subject: [PATCH v4 4/9] ls2080ardb: Convert to distro boot
>
Hi Alex,
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
>
> Subject: [PATCH v4 5/9] armv8: ls2080a: Declare spin tables
Hi Alex
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
>
> Subject: [PATCH v4 2/9] efi_loader: AArch64: Run EFI payloads
Hi Alex,
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun ; Prabhakar Kushwaha
>
> Subject: [PATCH v4 3/9] ls2080ardb: Reserve DP-DDR RAM
>
>
Hi Benjamin,
On 20 June 2016 at 12:42, Benjamin Tietz wrote:
>
> Hello,
>
> in my device-tree (for stm32f429 - as found in the linux kernel) exist
> two branches /soc and /clocks. While /soc contains all embedded
> functionality of the SOC, /clocks contain the
On Wed, Jun 22, 2016 at 8:48 AM, Bin Meng wrote:
> On Wed, Jun 22, 2016 at 1:07 AM, George McCollister
> wrote:
>> Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
>> This is very similar to conga-qeval20-qa3-e3845 in that there
On Wed, Jun 22, 2016 at 1:07 AM, George McCollister
wrote:
> Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
> This is very similar to conga-qeval20-qa3-e3845 in that there is a
> reference carrier board (SOM-DB5800) with a Baytrail based SoM
Hi Tom,
Please pull some udpates of moveconfig.py tool.
The following changes since commit 9f823615af919c6b89f0b80197f009f78299dcde:
Kconfig: Add a new DISTRO_DEFAULTS Kconfig option (2016-06-20 21:30:13 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-uniphier.git
2016-06-15 14:33 GMT+09:00 Masahiro Yamada :
>
> I sent a pull request for moveconfig recently,
> but this tool can be improved more.
>
> (This series has no impact on the on-going BOOTDELAY fix-up.)
>
>
>
> Masahiro Yamada (5):
> tools: moveconfig: fix needless
On Mon, Jun 20, 2016 at 10:34:05PM -0500, Andreas Dannenberg wrote:
> From: Daniel Allred
>
> The next stage boot loader image and the selected FDT can be
> post-processed by board/platform/device-specific code, which can include
> modifying the size and altering the starting
On Mon, Jun 20, 2016 at 10:34:07PM -0500, Andreas Dannenberg wrote:
> Adds a generic C-callable API for making secure ROM calls on OMAP and
> OMAP-compatible devices. This API provides the important function of
> flushing the ROM call arguments to memory from the cache, so that the
> secure world
On Mon, Jun 20, 2016 at 10:34:11PM -0500, Andreas Dannenberg wrote:
> From: Madan Srinivas
>
> Modify the SPL build procedure for AM437x high-security (HS) device
> variants to create a secure u-boot_HS.img FIT blob that contains U-Boot
> and DTB artifacts signed (and optionally
On Mon, Jun 20, 2016 at 10:34:10PM -0500, Andreas Dannenberg wrote:
> Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS)
> device variants to create a secure u-boot_HS.img FIT blob that contains
> U-Boot and DTB artifacts signed with a TI-specific process based on the
>
On Mon, Jun 20, 2016 at 10:34:06PM -0500, Andreas Dannenberg wrote:
> From: Daniel Allred
>
> Add an interface for calling secure ROM APIs across a range of OMAP and
> OMAP compatible high-security (HS) device variants. While at it, also
> perform minor cleanup/alignment
On Tue, Jun 21, 2016 at 10:01:54AM +0530, Lokesh Vutla wrote:
>
>
> On Tuesday 21 June 2016 09:04 AM, Andreas Dannenberg wrote:
> > Adds an API that verifies a signature attached to an image (binary
> > blob). This API is basically a entry to a secure ROM service provided by
> > the device and
On Tue, Jun 21, 2016 at 02:41:06PM -0500, Andreas Dannenberg wrote:
> Align the name of the defconfig file for high-security (HS) device variants
> from the AM43xx family of SoCs with the corresponding names used for the
> general purpose devices. This allows for easier cross-association of those
From: Chris Brand
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8.
Signed-off-by: Chris Brand
Signed-off-by: Steve Rae
---
arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c | 6 +-
1 file changed, 1
The handling of the "usage counter" is incorrect, and the clock should
only be disabled when transitioning from 1 to 0.
Reported-by: Chris Brand
Signed-off-by: Steve Rae
---
arch/arm/cpu/armv7/bcm235xx/clk-core.c | 10 +-
1 file changed, 5
The Kona PHY supports an 8-bit wide UTMI interface,
therefore, choose this Kconfig setting.
Signed-off-by: Steve Rae
---
configs/bcm23550_w1d_defconfig | 1 +
include/configs/bcm23550_w1d.h | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git
Choose the Kconfig boot0 hook option and implement the required code.
Signed-off-by: Steve Rae
---
arch/arm/include/asm/arch-bcm235xx/boot0.h | 15 +++
configs/bcm23550_w1d_defconfig | 1 +
2 files changed, 16 insertions(+)
create mode 100644
(1) implement Kconfig options which have been recently applied, and
(2) fix two outstanding issues.
Chris Brand (1):
arm: bcm235xx: fix kps ccu
Steve Rae (3):
arm: bcm235xx: choose 8-bit phy bus width
arm: bcm235xx: implement the boot0 hook code
arm: bcm235xx: update clock framework
Hi,
We have several boards making use of FIT images for the kernel/initrd/fdt.
With v2015.04 we can successfully boot our application image. With
v2016.05 we run into a problem where the FDT is overwritten when the
ramdisk is relocated.
Here's a snippet of boot output that illustrates the
Signed-off-by: Eric Nelson
---
arch/arm/cpu/armv7/mx6/Kconfig | 5 +
arch/arm/cpu/armv7/mx6/ddr.c| 2 +-
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 +-
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig
On 06/20/2016 04:07 PM, Alexander Graf wrote:
> Most new systems in U-Boot these days make use of the generic "distro"
> framework which allows a user to have U-Boot scan for a bootable OS
> on all available media types.
>
> This patch extends the LS2080ARDB board to use that framework if the
>
On Tue, Jun 21, 2016 at 4:13 PM, Masahiro Yamada
wrote:
> 2016-06-22 1:25 GMT+09:00 Joe Hershberger :
>> On Mon, Jun 20, 2016 at 8:53 PM, Masahiro Yamada
>> wrote:
>>> 2016-06-21 6:33 GMT+09:00 Joe
2016-06-22 1:25 GMT+09:00 Joe Hershberger :
> On Mon, Jun 20, 2016 at 8:53 PM, Masahiro Yamada
> wrote:
>> 2016-06-21 6:33 GMT+09:00 Joe Hershberger :
>>> On Wed, Jun 15, 2016 at 12:33 AM, Masahiro Yamada
>>>
Hi Nathan,
https://patchwork.ozlabs.org/patch/629829/ was applied to u-boot-net.git.
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Alexey,
https://patchwork.ozlabs.org/patch/626701/ was applied to u-boot-net.git.
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Guillaume,
https://patchwork.ozlabs.org/patch/630898/ was applied to u-boot-net.git.
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Stephen,
https://patchwork.ozlabs.org/patch/615309/ was applied to u-boot-net.git.
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Tom,
The following changes since commit 9f823615af919c6b89f0b80197f009f78299dcde:
Kconfig: Add a new DISTRO_DEFAULTS Kconfig option (2016-06-20 21:30:13 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-net.git master
for you to fetch changes up to
On 06/21/2016 11:41 AM, Eric Nelson wrote:
> This patch set makes use of the dynamic DDR calibration routines added in
> commit
> d339f16 to define an alternative to the Freescale DDR stress tester tool.
>
Hi all,
While preparing this patch set, I thought again about the tools we have
for
Align the name of the defconfig file for high-security (HS) device variants
from the AM43xx family of SoCs with the corresponding names used for the
general purpose devices. This allows for easier cross-association of those
files and also provides room to grow from an HS device part number
From: Stephen Warren
clk->id is unsigned, so it can't be < 0. Remove the check for that.
FWIW, this issue was introduced when the clock API converted e.g.
clk_get_rate()'s clock ID parameter from an int to an unsigned long
(with a struct clk), without removing this check.
> On 06/21/16 17:30, Christian Didriksson wrote:
> > Some more comments inline
> >
> >>
> >>> On 06/20/2016 06:04 PM, Christian Didriksson wrote:
> Hi,
> >>>
> >>> Hi,
> >>>
> > On 06/20/2016 03:22 PM, Christian Didriksson wrote:
> >> Hi Marek,
> >
> > Hi,
> >
> >>>
Signed-off-by: Eric Nelson
---
Note that I haven't tested this board because I don't currently have one.
configs/mx6memcal_warpboard_defconfig | 32
1 file changed, 32 insertions(+)
create mode 100644 configs/mx6memcal_warpboard_defconfig
diff
From: Stephen Warren
The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data
Signed-off-by: Eric Nelson
---
board/kosagi/novena/novena_spl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index 9b18187..39b846f 100644
--- a/board/kosagi/novena/novena_spl.c
+++
This patch set makes use of the dynamic DDR calibration routines added in commit
d339f16 to define an alternative to the Freescale DDR stress tester tool.
The goals of this effort are to make the process of DDR validation easier
and more robust:
- The use of SPL simplifies the process of
Signed-off-by: Eric Nelson
---
arch/arm/cpu/armv7/mx6/ddr.c | 44
1 file changed, 24 insertions(+), 20 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index bde6fe3..eb2d000 100644
---
Signed-off-by: Eric Nelson
---
configs/mx6memcal_mx6slevk_defconfig | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 configs/mx6memcal_mx6slevk_defconfig
diff --git a/configs/mx6memcal_mx6slevk_defconfig
This is a virtual "board" that uses configuration files and Kconfig to define
the memory layout used by a real board during the board bring-up process.
It generates an SPL image that can be loaded using imx_usb or SB_LOADER.exe.
When run, it will generate a set of calibration constants for
use
Signed-off-by: Eric Nelson
---
configs/mx6memcal_sabrelite_defconfig | 27 +++
1 file changed, 27 insertions(+)
create mode 100644 configs/mx6memcal_sabrelite_defconfig
diff --git a/configs/mx6memcal_sabrelite_defconfig
Signed-off-by: Eric Nelson
---
board/kosagi/novena/novena_spl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index f779bb4..9b18187 100644
--- a/board/kosagi/novena/novena_spl.c
+++
Signed-off-by: Eric Nelson
---
configs/mx6memcal_nitrogen6_max_defconfig | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 configs/mx6memcal_nitrogen6_max_defconfig
diff --git a/configs/mx6memcal_nitrogen6_max_defconfig
Allow the calibration data from mmdc_do_write_level_calibration
and mmdc_do_dqs_calibration to be returned to the caller for
display.
Signed-off-by: Eric Nelson
---
arch/arm/cpu/armv7/mx6/ddr.c| 29 +++--
Signed-off-by: Eric Nelson
---
configs/novena_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 69e5ea9..207e8eb 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -1,5 +1,6 @@
Before calling the dynamic DDR calibration routines, board files
must call mx6_dram_cfg, so they already have a struct mx6_ddr_sysinfo
available for use in determining the bus width.
Use it for determining the DRAM bus width instead of a mix of
dynamic determination in mmdc_do_dqs_calibration()
On 06/21/2016 10:55 AM, Alexander Graf wrote:
>
>
>> Am 21.06.2016 um 19:12 schrieb york sun :
>>
>>> On 06/20/2016 04:07 PM, Alexander Graf wrote:
>>> Some boards decided not to run ATF or other secure firmware in EL3, so
>>> they instead run U-Boot there. The uEFI spec doesn't
> Am 21.06.2016 um 19:12 schrieb york sun :
>
>> On 06/20/2016 04:07 PM, Alexander Graf wrote:
>> Some boards decided not to run ATF or other secure firmware in EL3, so
>> they instead run U-Boot there. The uEFI spec doesn't know what EL3 is
>> though - it only knows about EL2
On 06/20/2016 04:07 PM, Alexander Graf wrote:
> Some boards decided not to run ATF or other secure firmware in EL3, so
> they instead run U-Boot there. The uEFI spec doesn't know what EL3 is
> though - it only knows about EL2 and EL1. So if we see that we're running
> in EL3, let's get into EL2 to
Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
This is very similar to conga-qeval20-qa3-e3845 in that there is a
reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867)
installed.
Currently supported:
- 2x UART (From ITE EC on SOM-6867) routed to COM3/4
On 06/21/16 17:30, Christian Didriksson wrote:
Some more comments inline
On 06/20/2016 06:04 PM, Christian Didriksson wrote:
Hi,
Hi,
On 06/20/2016 03:22 PM, Christian Didriksson wrote:
Hi Marek,
Hi,
On 06/17/2016 04:39 PM, Christian Didriksson wrote:
Hi Marek,
Hi
I applied the
+Suresh Gupta
On 06/21/2016 12:22 AM, Sriram Dash wrote:
> Modifies errata implementation due to the fact that P3041,
> P5020, and P5040 are all big endian for the USB PHY registers, but
> they were specified little endian. Also, Adds errata for P1010 and
> P2041 2.0.
It would be helpful to
On Thu, Jun 16, 2016 at 10:10 PM, Bin Meng wrote:
> Hi George,
>
> On Wed, Jun 15, 2016 at 10:51 PM, George McCollister
> wrote:
>> Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
>> This is very similar to
On Mon, Jun 20, 2016 at 8:53 PM, Masahiro Yamada
wrote:
> 2016-06-21 6:33 GMT+09:00 Joe Hershberger :
>> On Wed, Jun 15, 2016 at 12:33 AM, Masahiro Yamada
>> wrote:
>>> The subprocess.Popen() does not change
On 20 June 2016 at 23:32, Masahiro Yamada wrote:
> Factor out the same code from the callees to the caller.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> common/autoboot.c | 21 ++---
> 1 file changed, 10
On 20 June 2016 at 23:47, Stefan Roese wrote:
> Hi Masahiro,
>
> On 21.06.2016 07:32, Masahiro Yamada wrote:
>>
>> Move the bootdelay >= 0 check to the caller, which simplifies
>> the callees.
>>
>> Signed-off-by: Masahiro Yamada
>
>
> Reviewed-by:
On 20 June 2016 at 23:32, Masahiro Yamada wrote:
> Because abortboot_keyed() and abortboot_normal() are not compiled
> at the same time, we can rename both of them to __abortboot().
> This allows to drop #ifdef from the caller.
>
> Signed-off-by: Masahiro Yamada
On 20 June 2016 at 23:32, Masahiro Yamada wrote:
> The same information now exists in common/Kconfig. Do not duplicate
> documentation from the point of view of maintainability.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> README
On 06/21/2016 08:32 AM, Masahiro Yamada wrote:
> As the help message of CONFIG_BOOTDELAY says, CONFIG_BOOTDELAY=-2
> means the autoboot with no delay, with no abort check even if
> CONFIG_ZERO_BOOTDELAY_CHECK is defined.
>
> To sum up, the autoboot behaves as follows:
>
> [1] CONFIG_BOOTDELAY=0
From: Andrej Rosano
Signed-off-by: Andrej Rosano
---
common/env_ext4.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/common/env_ext4.c b/common/env_ext4.c
index ce748ed..adefa7d 100644
---
On Sun, Jun 12, 2016 at 10:20:12PM +0200, Andreas Bießmann wrote:
> On 14.05.16 23:42, Marek Vasut wrote:
> > The SPL code already knows which boot device it calls the spl_boot_mode()
> > on, so pass that information into the function. This allows the code of
> > spl_boot_mode() avoid invokind
Some more comments inline
>
> > On 06/20/2016 06:04 PM, Christian Didriksson wrote:
> > > Hi,
> >
> > Hi,
> >
> > >> On 06/20/2016 03:22 PM, Christian Didriksson wrote:
> > >>> Hi Marek,
> > >>
> > >> Hi,
> > >>
> > On 06/17/2016 04:39 PM, Christian Didriksson wrote:
> > > Hi Marek,
> >
On Tue, Jun 21, 2016 at 11:22:38AM +0900, Masahiro Yamada wrote:
> 2016-06-21 6:16 GMT+09:00 Hans de Goede :
> > DISTRO_DEFAULTS is intended to mirror / replace
> > include/config_distro_defaults.h.
> >
> > The intend is for boards which include this file to select this from
>
From: Siva Durga Prasad Paladugu
Fix the memory leak by freeing the allocated out request buffer
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
Changes in v2:
- Simplify logic reported by
Based on:
"ARM: uniphier: use the default CONFIG_BOOTDELAY=2"
(sha1: 7c8ef0feb97586d35b0296b48903daef8c06ab21)
"I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig,
CONFIG_BOOTDELAY=2, is just fine for these boards."
Reported-by: Masahiro Yamada
Use Kbuild standard style where possible.
Signed-off-by: Masahiro Yamada
---
arch/arm/cpu/armv7/Makefile | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index
Hi Tom,
> -Original Message-
> From: Siva Durga Prasad Paladugu
> Sent: Tuesday, June 14, 2016 2:49 PM
> To: u-boot@lists.denx.de; jagannadh.t...@gmail.com
> Cc: Michal Simek ; 'Siva Durga Prasad Paladugu'
>
> Subject: RE: [PATCH 1/9]
Hi Tom,
> -Original Message-
> From: Siva Durga Prasad Paladugu
> Sent: Tuesday, June 14, 2016 2:48 PM
> To: jagannadh.t...@gmail.com; 'Siva Durga Prasad Paladugu'
> ; u-boot@lists.denx.de
> Cc: Michal Simek
> Subject: RE: [PATCH v2
Hi
I'm trying to flash on a spansion spi flash connected on qspi on imx7d board.
SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64
KiB, total 16 MiB
I have some problem:
- I can't erase the first sector
- I don't know if
BOOT_FROM qspi
BOOT_OFFSETFLASH_OFFSET_QSPI
I
On Tue 2016-06-21 14:32:42, Masahiro Yamada wrote:
> This recently added board missed the tree-wide migration of
> CONFIG_BOOTDELAY.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
On 06/21/2016 09:22 AM, Sriram Dash wrote:
> Modifies errata implementation due to the fact that P3041,
> P5020, and P5040 are all big endian for the USB PHY registers, but
> they were specified little endian. Also
Please split this into two patches.
, Adds errata for P1010 and
> P2041 2.0.
>
>
Hi,
Le 20/06/2016 23:43, Joe Hershberger a écrit :
On Mon, Jun 20, 2016 at 2:31 PM, Guillaume Gardet
wrote:
Please note that, this patch applies on top of this one:
NFS: Add error message when U-Boot NFS version (V2) is not supported by
NFS server
Lukasz
Ping !!
Did you get time to look into these patches.
Regards
Ravi
-Original Message-
From: B, Ravi
Sent: Tuesday, June 14, 2016 4:32 PM
To: u-boot@lists.denx.de; l.majew...@samsung.com
Cc: tr...@konsulko.com; ma...@denx.de; B, Ravi
Subject: [RFC PATCH v1 0/6] SPL: DFU Support
From: Praneeth Bajjuri
Correcting QSPI disable/unselect CS reset value.
CTRL_CORE_CONTROL_IO_2: QSPI_MEMMAPPED_CS[10:8]
This is not causing any issue, but its better
to untouch the reserved bits.
Praneeth Bajjuri
Signed-off-by: Ravi Babu
---
> On 06/20/2016 06:04 PM, Christian Didriksson wrote:
> > Hi,
>
> Hi,
>
> >> On 06/20/2016 03:22 PM, Christian Didriksson wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> On 06/17/2016 04:39 PM, Christian Didriksson wrote:
> > Hi Marek,
>
> Hi
>
> > I applied the two
Modifies errata implementation due to the fact that P3041,
P5020, and P5040 are all big endian for the USB PHY registers, but
they were specified little endian. Also, Adds errata for P1010 and
P2041 2.0.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
99 matches
Mail list logo