Hi Tom,
>
> I'm confused because I both can't replicate my problem but know I
> checked in drivers/misc for output (I use O= always).
I have no idea.
I tried with O=
and drivers/misc/i2c_eeprom.o was built as well.
>> > And
>> > moveconfig.py also didn't see it needed.
>>
>> This is co
Please resend the patch, patchwork mbox download shows different.
On 24 July 2016 at 00:49, Lad, Prabhakar wrote:
> On Sat, Jul 23, 2016 at 5:19 PM, Jagan Teki wrote:
>>
>> On 23 June 2016 at 19:28, Lad, Prabhakar wrote:
>> > During spi transfer, for example:
>> > sspi 1:1.0 8 ff
--
Jagan.
__
On 25 July 2016 at 19:08, Tom Rini wrote:
> On Mon, Jul 25, 2016 at 03:45:46PM +0530, Vignesh R wrote:
>
>> Now that QSPI driver can support 76.8MHz, update the
>> CONFIG_SF_DEFAULT_SPEED to the same value.
>>
>> Signed-off-by: Vignesh R
>
> Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
--
J
On 25 July 2016 at 15:45, Vignesh R wrote:
> According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, update
> the driver to use the same.
>
> Signed-off-by: Vignesh R
> ---
> drivers/spi/ti_qspi.c | 17 -
> 1 file changed, 12 insertions(+), 5 deletions(-)
>
> diff --git a
Hello,
I am trying to detect bad blocks in nand by erasing blocks and
checking if all bytes are 0x...
I want to include the OOB area in such testing (so that I treat them
as regular bytes in nand, which can be read,write, and erased)
In u-boot there is support for nand read.raw & write.raw, b
print_baudrate outputs serial baud rate.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 39 +--
1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index ab56ea5..b4abb91 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -
print_std_bdinfo outputs typical set of board information entries:
boot params location, memory and flash addresses and sizes, network
interfaces information and configured serial baud rate.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 32
1 file changed, 12 in
print_bi_flash outputs flashstart, flashsize and flashoffset lines.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 54 +++---
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 2f37232..f89de5f 100644
print_bi_mem outputs memstart and memsize lines.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 60aaafb..df68b58 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bd
print_eth_ip_addr outputs eth configurations for up to 6 interfaces and
configured IP address.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 113 +++
1 file changed, 36 insertions(+), 77 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo
Hi,
this series extracts common parts of cmd/bdinfo.c used by various
architectures into reusable functions.
Please review.
Max Filippov (7):
cmd/bdinfo: extract print_bi_boot_params
cmd/bdinfo: extract print_bi_mem
cmd/bdinfo: extract print_bi_dram
cmd/bdinfo: extract print_bi_flash
c
print_bi_dram outputs start address and size for each DRAM bank.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 58 +-
1 file changed, 17 insertions(+), 41 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index df68b58..2f37232 100644
print_bi_boot_params outputs boot parameters structure location.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index f2435ab..60aaafb 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
print_std_bdinfo outputs typical set of board information entries:
boot params location, memory and flash addresses and sizes, network
interfaces information and configured serial baud rate.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 32
1 file changed, 12 in
On Wed, Jul 27, 2016 at 8:27 AM, Max Filippov wrote:
> Hi,
>
> this series extracts common parts of cmd/bdinfo.c used by various
> architectures into reusable functions.
Sorry, messed up my patch directory, will resend.
--
Thanks.
-- Max
___
U-Boot ma
print_bi_flash outputs flashstart, flashsize and flashoffset lines.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 54 +++---
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 2f37232..f89de5f 100644
print_baudrate outputs serial baud rate.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 39 +--
1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index ab56ea5..b4abb91 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -
print_eth_ip_addr outputs eth configurations for up to 6 interfaces and
configured IP address.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 113 +++
1 file changed, 36 insertions(+), 77 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo
print_eth_ip_addr outputs eth configurations for up to 6 interfaces and
configured IP address.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 113 +++
1 file changed, 36 insertions(+), 77 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo
print_baudrate outputs serial baud rate.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 39 +--
1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index ab56ea5..b4abb91 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -
print_bi_flash outputs flashstart, flashsize and flashoffset lines.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 54 +++---
1 file changed, 27 insertions(+), 27 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 2f37232..f89de5f 100644
print_bi_dram outputs start address and size for each DRAM bank.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 58 +-
1 file changed, 17 insertions(+), 41 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index df68b58..2f37232 100644
print_bi_dram outputs start address and size for each DRAM bank.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 58 +-
1 file changed, 17 insertions(+), 41 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index df68b58..2f37232 100644
print_bi_mem outputs memstart and memsize lines.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 60aaafb..df68b58 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bd
Hi,
this series extracts common parts of cmd/bdinfo.c used by various
architectures into reusable functions.
Please review.
Max Filippov (7):
cmd/bdinfo: extract print_bi_boot_params
cmd/bdinfo: extract print_bi_mem
cmd/bdinfo: extract print_bi_dram
cmd/bdinfo: extract print_bi_flash
c
print_bi_boot_params outputs boot parameters structure location.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index f2435ab..60aaafb 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
print_bi_mem outputs memstart and memsize lines.
Signed-off-by: Max Filippov
---
cmd/bdinfo.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 60aaafb..df68b58 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bd
Hi
On 07/27/2016 01:10 AM, Steve Rae wrote:
> HI Lukasz,
>
> On Tue, Jul 26, 2016 at 2:13 AM, Lukasz Majewski
> wrote:
>> Hi Steve,
>>
>>> with this change, I can also set the following back to 100:
>>>
>>> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
>>> index de8d8ea..d593dc6 10064
On 07/20/2016 09:51 PM, Gong Qianyu wrote:
> QSPI and IFC are pin-multiplexed on LS1043AQDS board. If QSPI is
> enabled, IFC would not be initialized correctly. So disable the IFC
> node for Linux.
>
> Signed-off-by: Gong Qianyu
> ---
> v3:
> - Moved the fixup to board file.
> - Detected the mux
Hello Simon,
Am 26.07.2016 um 02:59 schrieb Simon Glass:
This adds the basic code for binman, including command parsing, processing
of entries and generation of images.
So far no entry types are supported. These will be added in future commits
as examples of how to add new types.
See the READM
On some of the SoCs one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it
jumps to boot loader. Hence introduce a weak function which can be
overridden based on the SoC type and switch to hypervisor mode in a
custom way.
Cc: beagl
Override the switch_to_hypervisor function to switch cpu to hypervisor
mode using the available ROM code hook early in the boot phase before
the boot loader checks for HYP mode.
Based on the work done by Jonathan Bergsagel jbergsa...@ti.com.
Cc: beagleboard-...@googlegroups.com
Signed-off-by: Kee
On Wednesday 27 July 2016 09:05 AM, Keerthy wrote:
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it
jumps to boot loader.
Patch 1: Introduces a weak function which can be overridden specific to
So
On SoCs like DRA7, OMAP5 one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it
jumps to boot loader.
Patch 1: Introduces a weak function which can be overridden specific to
SoCs to switch to hypervisor mode.
Patch 2: overrides we
Hello Simon,
Am 26.07.2016 um 02:58 schrieb Simon Glass:
Add a debug() at this point to help figure out what is wrong.
Signed-off-by: Simon Glass
---
arch/x86/cpu/intel_common/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Heiko Schocher
but wondering why th
Thanks York.
On Wed, Jul 27, 2016 at 4:24 AM, york sun wrote:
> On 07/21/2016 03:10 AM, macro.wav...@gmail.com wrote:
>> From: Hongbo Zhang
>>
>> This patch adds all the PSCI v1.0 functions in to the common framework, with
>> all the functions returning "not implemented" by default, as a common
On Tue, 2016-07-26 at 15:20 +0200, Marek Vasut wrote:
> On 07/26/2016 12:55 PM, Tien Fong Chee wrote:
> > This patch would do checking on device tree to ensure the UART
> > exist
> > in the system and ready for console before setting have_console to
> > true.
> > This is required to avoid unexpecte
Hi Hans
On Wed, Jul 27, 2016 at 6:30 AM, Hans de Goede wrote:
> Hi Tom,
>
> Here is the second sunxi pull-req for v2016.09,
> this adds some fixes to the h3 ethernet driver
> and disables it for now as it has too much issues.
>
> It also adds 1 new board.
>
> The following changes since commit 45
Hi,
On 26/07/16 19:06, Jaehoon Chung wrote:
> buswidth isn't used anywhere in sdhci_setup_cfg.
>
> Signed-off-by: Jaehoon Chung
> ---
> drivers/mmc/msm_sdhci.c | 4 ++--
> drivers/mmc/sdhci.c | 4 ++--
> drivers/mmc/zynq_sdhci.c | 2 +-
> include/sdhci.h | 3 +--
> 4 files change
On Wed, Jul 27, 2016 at 12:30:56AM +0200, Hans de Goede wrote:
> Hi Tom,
>
> Here is the second sunxi pull-req for v2016.09,
> this adds some fixes to the h3 ethernet driver
> and disables it for now as it has too much issues.
>
> It also adds 1 new board.
>
> The following changes since commit
On Tue, Jul 26, 2016 at 02:26:08PM +0200, Heiko Schocher wrote:
> Hello Tom,
>
> Sorry for being a little late, but I was on vacation ...
>
> In this pull request there is a fix for debug warnings in tools/env from
> Marcin.
> A DM conversion and improvements series for the mvtwsi driver from M
On Wed, Jul 27, 2016 at 03:47:58AM +0900, Masahiro Yamada wrote:
> We already have the entry for this option in Kconfig, so let's
> migrate to it.
>
> Signed-off-by: Masahiro Yamada
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
On Tue, Jul 26, 2016 at 08:28:50PM +, york sun wrote:
> Tom,
>
> The following changes since commit 29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8:
>
>ARM: uniphier: add clock/reset settings for xHCI of ProXstream2
> (2016-07-24 00:44:55 +0900)
>
> are available in the git repository at:
>
On Tue, Jul 26, 2016 at 08:31:09PM +, york sun wrote:
> Tom,
>
> The following changes since commit 29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8:
>
>ARM: uniphier: add clock/reset settings for xHCI of ProXstream2
> (2016-07-24 00:44:55 +0900)
>
> are available in the git repository at:
>
On Mon, Jul 25, 2016 at 09:56:39PM -0600, Simon Glass wrote:
> Hi Tom,
>
> Here's an interim pull request for rockchip including RK3399 SoC
> support. I hope to come up with another one by the end of the week.
>
>
> The following changes since commit 4579720412744dd13266a3505bb38ce2da819b4f:
>
From: Fabio Estevam
Pass the board/freescale/*mx*/ path as files maintained by Stefano
Babic.
While this is not ideal and does not cover all the i.MX board cases,
it gives at least a better hint for the /scripts/get_maintainer.pl
tool.
Signed-off-by: Fabio Estevam
---
MAINTAINERS | 1 +
1 fil
From: Fabio Estevam
Add an entry for the mx7dsabresd_secure_defconfig target.
Signed-off-by: Fabio Estevam
---
board/freescale/mx7dsabresd/MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/freescale/mx7dsabresd/MAINTAINERS
b/board/freescale/mx7dsabresd/MAINTAINERS
index b9
On 06/14/2016 04:36 AM, Sumit Garg wrote:
> Enable rsa signature verification in SPL framework before relocation for
> verification of main u-boot.
>
> Reviewed-by: Aneesh Bansal
> Signed-off-by: Sumit Garg
> ---
> drivers/crypto/fsl/fsl_rsa.c | 1 +
> 1 file changed, 1 insertion(+)
>
Applied t
Hi Ian,
On 26 July 2016 at 07:35, Ian Campbell wrote:
> (adding Hans)
>
> On Mon, 2016-07-25 at 18:59 -0600, Simon Glass wrote:
>> Add an example usage of binman for a sunxi board. This involves adding the
>> > image definition to the device tree and using it in the Makefile.
>
> My concern with
Hi Paul,
On 26 July 2016 at 16:24, Paul Burton wrote:
> Previously ns16550 compatible UARTs probed via device tree have needed
> their device tree nodes to contain a clock-frequency property. An
> alternative to this commonly used with Linux is to reference a clock via
> a phandle. This patch all
On 26 July 2016 at 16:24, Paul Burton wrote:
> In pci_uclass_pre_probe an attempt is made to detect whether the parent
> of a device is a PCI device and that the device is thus a bridge. This
> was being done by checking whether the parent of the device is of the
> UCLASS_ROOT class. This causes p
Hi Paul,
On 26 July 2016 at 16:24, Paul Burton wrote:
> This patch adds a driver for the Xilinx AXI bridge for PCI express, an
> IP block which can be used on some generations of Xilinx FPGAs. This is
> mostly a case of implementing PCIe ECAM specification, but with some
> quirks about what devic
Hi,
On 14 July 2016 at 06:14, Kever Yang wrote:
> Hi Andre,
>
>
> On 07/13/2016 08:45 PM, Andre Przywara wrote:
>>
>> Hi,
>>
>> On 13/07/16 13:27, Andreas Färber wrote:
>>>
>>> Hi Kever,
>>>
>>> Am 20.06.2016 um 04:59 schrieb Kever Yang:
I want to upstream a new SoC named RK3399 fr
Tom,
The following changes since commit 29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8:
ARM: uniphier: add clock/reset settings for xHCI of ProXstream2
(2016-07-24 00:44:55 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-mpc86xx.git
for you to fetch changes up to b6003
On 07/19/2016 02:26 PM, Scott Wood wrote:
> Without this, GCC uses the toolchain default, which may be incompatible
> with -maltivec.
>
> Signed-off-by: Scott Wood
> ---
> arch/powerpc/cpu/mpc86xx/config.mk | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Applied to mpc86xx master. Awai
On 07/01/2016 07:41 AM, York Sun wrote:
> Add ls2080aqds_qspi_defconfig to file list.
>
> Signed-off-by: York Sun
> ---
>
> board/freescale/ls2080aqds/MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
Applied to fsl-qoriq master. Awaiting upstream.
York
___
This patch introduces support for building U-Boot to run on the MIPS
Boston development board. This is a board built around an FPGA & an
Intel EG20T Platform Controller Hub, used largely as part of the
development of new CPUs and their software support. It is essentially
the successor to the older
Reading the PCI BAR & converting the result to a physical address is not
safe across all architectures. For example on MIPS the virtual:physical
mapping is not 1:1, so we cannot directly make use of the physical
address.
Use the more generic BAR-mapping function dm_pci_map_bar to discover the
MMIO
The pch_gbe driver previously casted pointers to & from unsigned 32 bit
integers in many locations. This breaks the driver on 64 bit systems,
producing streams of compiler warnings about mismatched pointer &
integer sizes and then failing to keep track of addresses correctly at
runtime.
Fix the dr
Previously ns16550 compatible UARTs probed via device tree have needed
their device tree nodes to contain a clock-frequency property. An
alternative to this commonly used with Linux is to reference a clock via
a phandle. This patch allows U-Boot to support that, retrieving the
clock frequency by pr
This patch adds a driver for the Xilinx AXI bridge for PCI express, an
IP block which can be used on some generations of Xilinx FPGAs. This is
mostly a case of implementing PCIe ECAM specification, but with some
quirks about what devices are valid to access.
Signed-off-by: Paul Burton
---
drive
Import a copy of the dt-bindings/interrupt-controller/mips-gic.h header
from Linux, such that we can use device trees which include it without
modification.
Signed-off-by: Paul Burton
---
include/dt-bindings/interrupt-controller/mips-gic.h | 9 +
1 file changed, 9 insertions(+)
create
This series introduces initial support for the MIPS Boston, and FPGA
based development board & successor to the older Malta board. Further
peripheral work is needed but this introduces the basics.
This can be tested in a currently out-of-tree QEMU port if desired,
which can be found in the boston
In pci_uclass_pre_probe an attempt is made to detect whether the parent
of a device is a PCI device and that the device is thus a bridge. This
was being done by checking whether the parent of the device is of the
UCLASS_ROOT class. This causes problems if the PCI controller is a child
of some other
On Mon, Jul 25, 2016 at 09:42:27AM +0200, Maxime Ripard wrote:
> On Fri, Jul 15, 2016 at 10:45:34AM +0200, Hans de Goede wrote:
> > Hi,
> >
> > On 04-07-16 14:57, Hans de Goede wrote:
> > >Hi All,
> > >
> > >Between my $dayjob, linux-sunxi, other foss projects and last but
> > >not least spending
Hi,
On 07/22/2016 12:16 PM, Chen-Yu Tsai wrote:
The sunxi ethernet address generation code looks for ethernet[0-3]
aliases to find ethernet controllers to generate MAC addresses for.
Without a valid address, the driver fails to register.
Signed-off-by: Chen-Yu Tsai
Thanks I've merged the en
Hi Tom,
Here is the second sunxi pull-req for v2016.09,
this adds some fixes to the h3 ethernet driver
and disables it for now as it has too much issues.
It also adds 1 new board.
The following changes since commit 4579720412744dd13266a3505bb38ce2da819b4f:
Prepare v2016.09-rc1 (2016-07-25 22
Disable the sun8i emac driver for now, there are 2 issues with it:
1) It is causing issues with network connectivity under the kernel driver,
when booting the kernel with v2 of Corentin's sun8i-h3 emac driver, I get
the connection status bouncing between connected at 100mbps full-duplex
and being
There is a new Orange Pi PC *Plus* version available now,
this is an extended version of the regular Orange Pi PC
with sdio wifi and an eMMC.
The upstream kernel devs have decided that they want a separate
dts for the PC Plus rather then sharing a single dts between the
regular PC and the PC Plus.
Tom,
The following changes since commit 29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8:
ARM: uniphier: add clock/reset settings for xHCI of ProXstream2
(2016-07-24 00:44:55 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
for you to fetch changes up to 840
On 07/21/2016 03:10 AM, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> This patch adds all the PSCI v1.0 functions in to the common framework, with
> all the functions returning "not implemented" by default, as a common
> framework
> all the dummy functions are added here, it is up to eve
On 07/26/2016 03:45 PM, Steve Arnold wrote:
So is there a fix to be had by maybe shifting both CONFIG_SPL_TEXT_BASE
and CONFIG_SYS_TEXT_BASE a little bit?
Steve
On Tue, Jul 26, 2016 at 2:14 PM, Stephen Warren mailto:swar...@wwwdotorg.org>> wrote:
On 07/26/2016 12:49 PM, Steve Arnold wrote:
On 07/05/2016 01:13 AM, Gong Qianyu wrote:
> From: Mingkai Hu
>
> The Fman module on LS1046A is similiar with that on LS1043A but
> LS1046A has one more XFI (10GbE) interface.
>
> Signed-off-by: Shaohui Xie
> Signed-off-by: Mingkai Hu
> Signed-off-by: Gong Qianyu
> ---
> v3:
> - Revise commit
On 07/21/2016 03:10 AM, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> The input parameter CPU ID needs to be validated before furher oprations such
> as CPU_ON, this patch introduces the function to do this.
>
> Signed-off-by: Wang Dongsheng
> Signed-off-by: Hongbo Zhang
> ---
> arch/a
I did mention it was black and showed nothing on serial console with the
default values, ie, building as-is doesn't even show u-boot trying to load
(after flashing it to the SPI flash the last thing you see is
"Resetting..."). Power it back up and nothing happens, no u-boot, nada.
U-Boot 2016.07-
On 07/05/2016 01:13 AM, Gong Qianyu wrote:
> New SoC LS1046A belongs to Freescale Chassis Generation 2 and
> has two SerDes so we need to add this support in fsl_lsch2.
> The SoC related SerDes 2 support will be added in SoC patch.
>
> Signed-off-by: Gong Qianyu
> ---
> v3:
> - Revise commit mess
On 06/07/2016 06:29 AM, Rajesh Bhagat wrote:
> Remove Soc specific defines and use generic chasis specific defines
> for USB controller base address mapping.
>
> Signed-off-by: Rajesh Bhagat
> ---
> Changes in v2:
> - Rebased patch for latest u-boot
>
> .../include/asm/arch-fsl-layerscape/immap_
So is there a fix to be had by maybe shifting both CONFIG_SPL_TEXT_BASE and
CONFIG_SYS_TEXT_BASE a little bit?
Steve
On Tue, Jul 26, 2016 at 2:14 PM, Stephen Warren
wrote:
> On 07/26/2016 12:49 PM, Steve Arnold wrote:
>
>> I did mention it was black and showed nothing on serial console with the
Hi All,
I had to made a change into this file common/env_mmc.c in order to be able to
Load u-boot env from the MMC1 in SPL.
I had to change all occurrence of dev = 0 to dev = 1 inside this file, is it
sound right ?
Is the code not adapted to have this part configurable ? I have feeling that I
Hi Stefan
> From: Stefan Agner [mailto:ste...@agner.ch]
> Sent: Dienstag, 26. Juli 2016 07:58
>
> Use CONFIG_TIMER_CLK_FREQ to let the non-secure init code initialize the
> generic timer on all CPU's. This allows to make use of the timer freuquency
> register also on other CPU than the start CPU
On Wed, Jul 27, 2016 at 03:54:31AM +0900, Masahiro Yamada wrote:
> Hi Tom,
>
>
> 2016-07-26 11:23 GMT+09:00 Tom Rini :
> > On Tue, Jul 26, 2016 at 11:07:02AM +0900, Masahiro Yamada wrote:
> >> Hi Tom,
> >>
> >> 2016-07-26 7:21 GMT+09:00 Tom Rini :
> >> > This option was set in the main uniphier c
Am 19.07.2016 um 15:16 schrieb Kever Yang:
> These files are from kernel upstream:
> "649a371 Add linux-next specific files for 20160616"
> with some modification need by U-Boot:
> - chosen with stdout-path to uart2.
> - add clock-frequency for uart2
>
> Signed-off-by: Kever Yang
> Acked-by: Simo
On 07/26/2016 12:49 PM, Steve Arnold wrote:
I did mention it was black and showed nothing on serial console with the
default values, ie, building as-is doesn't even show u-boot trying to
load (after flashing it to the SPI flash the last thing you see is
"Resetting..."). Power it back up and noth
On 07/05/2016 01:13 AM, Gong Qianyu wrote:
> From: Mingkai Hu
>
> The LS1046A processor is built on the QorIQ LS series architecture
> combining four ARM A72 processor cores with DPAA 1.0 support.
>
> Signed-off-by: Hou Zhiqiang
> Signed-off-by: Mihai Bantea
> Signed-off-by: Mingkai Hu
> Signed
On 07/21/2016 03:42 AM, Wenbin song wrote:
> Cleanup the variables: "kernel_addr","ramdisk_addr",
> "ramdisk_size","console".
>
> Signed-off-by: Wenbin Song
> ---
> include/configs/ls1043a_common.h | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
Applied to fsl-qoriq master. Awaitin
On 07/05/2016 01:12 AM, Gong Qianyu wrote:
> From: Alison Wang
>
> Add support to detect Cortex-A72 core for printing it out.
> The Initiator Version of A72 core should be 0x4.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Mingkai Hu
> Signed-off-by: Gong Qianyu
> ---
> v3:
> - Revise commit
On 07/01/2016 07:41 AM, York Sun wrote:
> Add ls1043aqds_lpuart_defconfig to file list.
>
> Signed-off-by: York Sun
>
> ---
>
> board/freescale/ls1043aqds/MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
Applied to fsl-qoriq master. Awaiting upstream.
York
_
On 05/23/2016 01:12 AM, mario@gdsys.cc wrote:
> Due to a oversight in testing, the initialization of the recently
> introduced Freescale I2C DM driver works only for 36 bit mode of e.g.
> the MPC85XX SoCs (specifically, if the physical addresses are 64 bit
> wide and the DT addresses 32 bit wid
On 07/05/2016 01:12 AM, Gong Qianyu wrote:
> Both LS1012A and LS1043A belong to FSL_LSCH2 and share some common
> configurations. So put the common define under FSL_LSCH2 to increase
> readability.
>
> Signed-off-by: Gong Qianyu
> ---
> v3:
> - New Patch.
>
> arch/arm/include/asm/arch-fsl-layers
On 07/21/2016 04:06 AM, Wenbin song wrote:
> From: Wenbin Song
>
> Add and share the the MTD partition scheme with kernel by defualt bootargs.
> And add the "mtdparts" env.
>
> Signed-off-by: Wenbin Song
> ---
> Changes for v2: rebase
> ---
> include/configs/ls1043a_common.h | 22 +++
On 07/21/2016 03:10 AM, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> LS1021 offers two secure OCRAM blocks for trustzone.
> This patch moves all the secure text sections into the OCRAM.
>
> Signed-off-by: Wang Dongsheng
> Signed-off-by: Hongbo Zhang
> ---
> arch/arm/include/asm/arch-l
On 07/22/2016 10:52 AM, York Sun wrote:
> MMU bit in SCTLR needs to be set explicitly after tables are
> created. It isn't an issue for EL3 becuase this bit is already
> set by early MMU setup. But for other exception levels this
> bit was not set.
>
> Signed-off-by: York Sun
> ---
> Setting CR_M
On 07/21/2016 03:10 AM, macro.wav...@gmail.com wrote:
> From: Hongbo Zhang
>
> This patch implements PSCI functions for ls102xa SoC following PSCI v1.0,
> they are as the list:
> psci_version,
> psci_features,
> psci_cpu_suspend,
> psci_affinity_info,
> psci_system_reset,
>
On 06/14/2016 04:37 AM, Sumit Garg wrote:
> Add SD secure boot target for ls1021atwr.
> Implement board specific spl_board_init() to setup CAAM stream ID and
> corresponding stream ID in SMMU. Change the u-boot size defined by a
> macro for copying the main U-Boot by SPL to also include the u-boot
On 06/14/2016 04:36 AM, Sumit Garg wrote:
> Override jump_to_image_no_args function to include validation of
> u-boot image using spl_validate_uboot before jumping to u-boot image.
> Also define macros in SPL framework to enable crypto operations.
>
> Reviewed-by: Aneesh Bansal
> Signed-off-by: Su
On 06/14/2016 04:36 AM, Sumit Garg wrote:
> Add support for reading bootscript and bootscript header from SD. Also
> renamed macros *_FLASH to *_DEVICE to represent SD alongwith NAND and
> NOR flash.
>
> Reviewed-by: Aneesh Bansal
> Signed-off-by: Sumit Garg
> ---
> arch/arm/include/asm/fsl_secu
Hi Tom,
2016-07-26 11:23 GMT+09:00 Tom Rini :
> On Tue, Jul 26, 2016 at 11:07:02AM +0900, Masahiro Yamada wrote:
>> Hi Tom,
>>
>> 2016-07-26 7:21 GMT+09:00 Tom Rini :
>> > This option was set in the main uniphier config file, but was not
>> > causing the driver to be built, so we just drop the li
We already have the entry for this option in Kconfig, so let's
migrate to it.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_ld11_defconfig | 2 ++
configs/uniphier_ld20_defconfig | 2 ++
configs/uniphier_ld4_sld8_defconfig | 2 ++
configs/uniphier_pro4_defconfig | 2 ++
co
On 07/25/2016 01:02 PM, Stephen Arnold wrote:
From: Steve Arnold
This updates the defaults for trimslice so it matches the last vendor
config. Use the tegra-uboot-flasher tools to create mmc and spi flash
images and flash to the device. Can optionally replace boot.scr with
extlinux.conf config
Hi Max,
On 2016-07-26 02:31, Max Krummenacher wrote:
> Hi Stefan
>
>> From: Stefan Agner [mailto:ste...@agner.ch]
>> Sent: Dienstag, 26. Juli 2016 07:58
>>
>> Use CONFIG_TIMER_CLK_FREQ to let the non-secure init code initialize the
>> generic timer on all CPU's. This allows to make use of the tim
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