Hi
On 12/29/2016 09:53 AM, Kever Yang wrote:
> Hi Stefan,
>
> Thanks for your review comment.
> On 12/29/2016 02:35 AM, Stefan Herbrechtsmeier wrote:
>> Hi,
>>
>> Am 28.12.2016 um 12:01 schrieb Jaehoon Chung:
>>> On 12/28/2016 12:32 PM, Kever Yang wrote:
Init the clock rate to
From: Dinh Nguyen
On the Arria10, the EMAC phy mode configuration for each EMACs is located
in separate registers versus being in 1 register for the GEN5 devices. The
Arria10 also has 3 EMACs compared to 2 for the GEN5 devices.
Update the dwmac_deassert_reset function to
From: Dinh Nguyen
Add the Arria10 reset manager defines that is used in Linux. Change the
license to SPDX.
[commit 007bb689b3dbad83cdab0ad192bc6ed0162451e0 from the Linux kernel]
Signed-off-by: Dinh Nguyen
---
From: Dinh Nguyen
There is no dependency on doing a separate clrbits first in the
dwmac_deassert_reset function. Combine them into a single
clrsetbits call.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/misc.c | 9 +++--
1 file
From: Dinh Nguyen
These functions are already in arch/arm/mach-socfpga/board.c
Signed-off-by: Dinh Nguyen
---
board/altera/arria10-socdk/socfpga.c | 17 -
1 file changed, 17 deletions(-)
diff --git
From: Dinh Nguyen
On the Arria10 device, the bridges are not mapped through the interconnect.
Signed-off-by: Dinh Nguyen
---
drivers/fpga/socfpga.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/fpga/socfpga.c
From: Dinh Nguyen
The Arria10 device will not be able to re-use the GEN5 SDRAM controller,
so we shouldn't build the driver. Move CONFIG_ALTERA_SDRAM to Kconfig
option in drivers/ddr/altera/Kconfig.
Signed-off-by: Dinh Nguyen
---
From: Dinh Nguyen
On arria5/cyclone5 parts, the bsel bits are at shift 0, while for arria10,
the bsel bits are at shift 12. Add SYSMGR_BOOTINFO_BSEL_SHIFT define so that
the reading the bsel can generic.
Suggested-by: Marek Vasut
Signed-off-by:
From: Dinh Nguyen
Signed-off-by: Dinh Nguyen
---
arch/arm/Kconfig | 4 ++--
arch/arm/mach-socfpga/Kconfig | 10 ++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig
From: Dinh Nguyen
Add the defines for the reset manager and some basic reset functionality.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/include/mach/reset_manager.h | 65 ++
From: Dinh Nguyen
The system manager on Arria10 is not used for pin muxing duties, so wrap
these functions for GEN5 devices only.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/system_manager.c | 2 ++
1 file changed, 2
From: Dinh Nguyen
Add arch_early_init_r function. The Arria10 has a firewall protection
around the SDRAM and OCRAM. These firewalls are to be disabled in order
for U-Boot to function.
Signed-off-by: Dinh Nguyen
---
From: Dinh Nguyen
Add a defconfig file for Arria10, which does not include enabling SPL.
Signed-off-by: Dinh Nguyen
Acked-by: Marek Vasut
---
configs/socfpga_arria10_defconfig | 16
1 file
From: Tien Fong Chee
Add system manager defines for Arria10.
Signed-off-by: Dinh Nguyen
---
.../arm/mach-socfpga/include/mach/system_manager.h | 122 +
1 file changed, 122 insertions(+)
diff --git
From: Dinh Nguyen
Add config for the Arria10 SoC Development Kit.
Signed-off-by: Dinh Nguyen
Acked-by: Marek Vasut
---
include/configs/socfpga_arria10_socdk.h | 94 +
1 file
From: Dinh Nguyen
Add minimal support for the Arria10 SoCDK.
Signed-off-by: Dinh Nguyen
---
board/altera/arria10-socdk/Kconfig | 18 ++
board/altera/arria10-socdk/Makefile | 7 +++
From: Dinh Nguyen
Add remaining 3 I2C base addresses for the Arria10.
Signed-off-by: Dinh Nguyen
Reviewed-by: Stefan Roese
---
arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 3 +++
1 file changed, 3
From: Dinh Nguyen
Add the structures for the SDRAM controller on Arria10.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/include/mach/sdram_a10.h | 380 +
1 file changed, 380 insertions(+)
create
Hi Stefan,
Thanks for your review comment.
On 12/29/2016 02:35 AM, Stefan Herbrechtsmeier wrote:
Hi,
Am 28.12.2016 um 12:01 schrieb Jaehoon Chung:
On 12/28/2016 12:32 PM, Kever Yang wrote:
Init the clock rate to max-frequency from dts with clock driver api.
Signed-off-by: Kever Yang
On 12/28/2016 07:34 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> Enhanced defconfig file for Arria10 to enable SPL build and supporting
> device tree build for SDMMC.
>
> Signed-off-by: Tien Fong Chee
> Cc: Marek Vasut
On 12/28/2016 09:52 AM, Lukasz Majewski wrote:
> Hi Marek,
>
>> On 12/26/2016 05:36 PM, Lukasz Majewski wrote:
>>> Hi Marek,
>>>
On 11/29/2016 07:18 PM, Tom Rini wrote:
> On Tue, Nov 29, 2016 at 11:50:34AM +0100, Marek Vasut wrote:
>> On 11/29/2016 10:11 AM, Lukasz Majewski wrote:
Currently a working SPL for V3s can be built now.
The U-Boot main binary still cannot work.
Signed-off-by: Icenowy Zheng
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c| 9 +++--
arch/arm/mach-sunxi/cpu_info.c | 2 ++
From: Andre Przywara
According to Jens disabling the on-die-termination should set bit 5,
not bit 1 in the respective register. Fix this.
Reported-by: Jens Kuske
Signed-off-by: Andre Przywara
---
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
DesignWare DRAM controller, which do not have official free DRAM
initialization code, but can use modified dram_sun8i_h3.c.
Add a invisible option for easier DRAM initialization code reuse.
Signed-off-by: Icenowy Zheng
Hi,
Am 28.12.2016 um 12:01 schrieb Jaehoon Chung:
On 12/28/2016 12:32 PM, Kever Yang wrote:
Init the clock rate to max-frequency from dts with clock driver api.
Signed-off-by: Kever Yang
Reviewed-by: Jaehoon Chung
This is an incorrect use
> -Original Message-
> From: Z.Q. Hou
> Sent: Wednesday, December 28, 2016 11:41 AM
> To: Prabhakar Kushwaha ; u-
> b...@lists.denx.de; albert.u.b...@aribaud.net; york sun ;
> Mingkai Hu ; Calvin Johnson
Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing
usage in ls102xa and fsl-layerscape. Remove all powerpc macros in
config header and board header files.
Signed-off-by: York Sun
---
arch/arm/cpu/armv7/ls102xa/Kconfig| 4
Create driver/ddr/fsl/Kconfig and move existing options. Clean up
existing macros.
Signed-off-by: York Sun
---
arch/arm/Kconfig | 1 +
arch/arm/cpu/armv7/ls102xa/Kconfig| 47 +
In this set, more mpc85xx config options are moved into Kconfig, including
some shared configuration for DDR, crypto, mmc, etc.
York Sun (24):
powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to Kconfig
powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to Kconfig
powerpc: mpc85xx: Move
Use Kconfig option to set little- or big-endian access to secure
boot and trust architecture.
Signed-off-by: York Sun
---
arch/arm/Kconfig | 2 ++
arch/arm/cpu/armv7/ls102xa/Kconfig| 1 +
Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.
Signed-off-by: York Sun
---
arch/arm/Kconfig | 4 ++
arch/arm/cpu/armv7/ls102xa/Kconfig| 2 +
Use Kconfig option for E500 and E500MC macros.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig| 30 ++
include/configs/B4860QDS.h | 3 ---
include/configs/BSC9131RDB.h| 2 --
include/configs/BSC9132QDS.h|
Use Kconfig option SYS_PPC64 instead.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig | 11 +++
arch/powerpc/include/asm/config_mpc85xx.h | 5 -
scripts/config_whitelist.txt | 1 -
3 files changed, 11 insertions(+), 6
Use Kconfig option E6500 and clean up existing usage.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig | 16
arch/powerpc/include/asm/config_mpc85xx.h | 9 -
scripts/config_whitelist.txt | 1 -
3 files changed, 16
After most config options are moved to Kconfig, the unused ifdef
or elif can be removed.
Signed-off-by: York Sun
---
arch/powerpc/include/asm/config_mpc85xx.h | 20 +---
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git
Use Kconfig option to select chassis version.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig | 21 +
arch/powerpc/include/asm/config_mpc85xx.h | 10 --
scripts/config_whitelist.txt | 2 --
3 files changed, 21
These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/cpu.c | 22 +++---
Use Kconfig to select DDR version instead of using config header.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig | 17 +
arch/powerpc/include/asm/config_mpc85xx.h | 12
2 files changed, 17 insertions(+), 12 deletions(-)
Use Kconfig to select errata workaround.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig | 317 ++
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 2 +-
arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +-
Use TARGET_T2080RDB from Kconfig instead.
Signed-off-by: York Sun
---
arch/powerpc/include/asm/fsl_secure_boot.h | 2 +-
board/freescale/t208xrdb/Makefile | 2 +-
include/configs/T208xRDB.h | 1 -
scripts/config_whitelist.txt | 1 -
4
Use Kconfig to select errata workaround.
Signed-off-by: York Sun
---
arch/arm/cpu/armv7/ls102xa/Kconfig| 7
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 41 +++
arch/arm/include/asm/arch-fsl-layerscape/config.h | 20 ---
Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.
Signed-off-by: York Sun
---
arch/arm/Kconfig | 7 +++
Use TARGET_T2080QDS from Kconfig instead.
Signed-off-by: York Sun
---
arch/powerpc/include/asm/fsl_secure_boot.h | 2 +-
board/freescale/t208xqds/Makefile | 2 +-
board/freescale/t208xqds/eth_t208xqds.c| 16
board/freescale/t208xqds/t208xqds.c
Remove this macro. It was added by e622d9ed but actually wasn't used.
Signed-off-by: York Sun
---
arch/powerpc/include/asm/fsl_secure_boot.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h
Use TARGET_T2081QDS from Kconfig instead.
Signed-off-by: York Sun
---
board/freescale/t208xqds/Makefile | 2 +-
board/freescale/t208xqds/eth_t208xqds.c | 16
board/freescale/t208xqds/t208xqds.c | 2 +-
include/configs/T208xQDS.h | 1
Use TARGET_T1040QDS from Kconfig instead.
Signed-off-by: York Sun
---
arch/powerpc/include/asm/fsl_secure_boot.h | 2 +-
include/configs/T1040QDS.h | 1 -
scripts/config_whitelist.txt | 1 -
3 files changed, 1 insertion(+), 3 deletions(-)
diff
Use TARGET_T1024RDB from Kconfig instead.
Signed-off-by: York Sun
---
board/freescale/t102xrdb/Makefile | 2 +-
board/freescale/t102xrdb/eth_t102xrdb.c | 6 +++---
board/freescale/t102xrdb/t102xrdb.c | 10 +-
configs/T1024RDB_NAND_defconfig | 2 +-
Remove these SoCs from Kconfig because they don't have individual
configuration. Clean up existing macros.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig | 12 +---
arch/powerpc/cpu/mpc85xx/Makefile | 4
Use TARGET_T1023RDB from Kconfig instead.
Signed-off-by: York Sun
---
board/freescale/t102xrdb/ddr.c | 2 +-
board/freescale/t102xrdb/eth_t102xrdb.c | 4 ++--
board/freescale/t102xrdb/t102xrdb.c | 12 ++--
board/freescale/t102xrdb/t102xrdb.h | 2 +-
Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/Kconfig | 8
arch/powerpc/include/asm/config_mpc85xx.h | 7 ---
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git
Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros.
Signed-off-by: York Sun
---
README| 9 ---
arch/powerpc/cpu/mpc85xx/Kconfig | 40 +++
arch/powerpc/include/asm/config_mpc85xx.h | 14
From: Dmitry Lifshitz
Add MAC support.
Use PHY, connected to RGMII1 as a default Eth adapter,
by appropriate setting of 'cpsw_data.active_slave'.
'cpsw_phy' env variable can override this setting.
Set the MAC addresses in the U-Boot environment.
The addresses are
From: Dmitry Lifshitz
Features supported :
* Serial console
* SPI Flash
* MMC/SD Card
* eMMC storage
* SATA
* PCA9555 - GPIO expander over I2C5 bus
* USB
Use spl alternate boot device feature to define fallback to
the main boot device as it is defined by hardware.
This patch series adds support for CompuLab CL-SOM-AM57X board and the
SBC-AM57X evaluation kit.
CL-SOM-AM57x is a miniature System-on-Module (SoM) based on
TI Sitara AM57x ARM Cortex-A15 System-on-Chip family.
SBC-AM57x is a single board computer, implemented with the
CL-SOM-AM57x
From: Dmitry Lifshitz
Add PCB revision message.
Implement board revision get_board_rev API.
Signed-off-by: Dmitry Lifshitz
Commit description update.
Signed-off-by: Uri Mashiach
Acked-by: Igor Grinberg
Modify U-Boot default env settings.
Boot sequence:
1. SD card boot script
2. SD card boot no script
3. SATA boot script
4. SATA boot no script
5. eMMC boot script
6. eMMC boot no script
Signed-off-by: Uri Mashiach
Acked-by: Igor Grinberg
not sure about this bit of code in that source file:
/* Set the environment according to the label...*/
if(protected == FLAG_PROTECT_INVALID) {
dataflash_info[i].Device.area_list[j].protected =
FLAG_PROTECT_INVALID;
} else {
digging around in CONFIG_SYS_FLASH_PROTECTION, and i see this
snippet in include/flash.h:
/* board/?/flash.c */
#if defined(CONFIG_SYS_FLASH_PROTECTION)
extern int flash_real_protect(flash_info_t *info, long sector, int prot);
extern void flash_read_user_serial(flash_info_t * info,
When using ARMv8 with ARMV8_SPIN_TABLE=y, we want the slave cores to
wait on spin_table_cpu_release_addr, until the Linux kernel will "wake" them
by writing to that location. The address of spin_table_cpu_release_addr is
transferred to the kernel using the device tree that is updated by
Hi Prabhakar,
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: 2016年12月28日 17:27
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; york sun ; Mingkai Hu
> ; Calvin Johnson
>
On 12/28/2016 12:32 PM, Kever Yang wrote:
> Init the clock rate to max-frequency from dts with clock driver api.
>
> Signed-off-by: Kever Yang
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
>
> Changes in v3:
> - using dt for
On 12/28/2016 12:32 PM, Kever Yang wrote:
> Add 'max-frequency' for sdhci node for clock init.
>
> Signed-off-by: Kever Yang
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
>
> Changes in v3: None
>
> arch/arm/dts/rk3399.dtsi
On Wed, 28 Dec 2016 11:30:10 +0100
Emmanuel Vadot wrote:
>
> Hello Simon,
>
> On Fri, 23 Dec 2016 01:39:06 -0700
> Simon Glass wrote:
>
> > On 18 December 2016 at 19:48, Tom Rini wrote:
> > > On Fri, Nov 25, 2016 at 08:16:01PM
Hello Simon,
On Fri, 23 Dec 2016 01:39:06 -0700
Simon Glass wrote:
> On 18 December 2016 at 19:48, Tom Rini wrote:
> > On Fri, Nov 25, 2016 at 08:16:01PM -0700, Simon Glass wrote:
> >
> >> Move sunxi boards to use binman. This involves adding the image
Hi Simon,
On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass wrote:
> Move the core relocation code into a separate function so that the checking
> code can be used for 64-bit relocation also.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
>
rk3399 has two clock-controller: cru and pmucru, update the
rockchip_get_crui() API, and rockchip_get_clk() do not used for
other module.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3399/clk_rk3399.c | 6 +++---
1 file changed, 3 insertions(+), 3
Hi Marek,
> On 12/26/2016 05:36 PM, Lukasz Majewski wrote:
> > Hi Marek,
> >
> >> On 11/29/2016 07:18 PM, Tom Rini wrote:
> >>> On Tue, Nov 29, 2016 at 11:50:34AM +0100, Marek Vasut wrote:
> On 11/29/2016 10:11 AM, Lukasz Majewski wrote:
> > Hi Marek,
> >
> >> On 11/28/2016
In the tiny-printf implementation, there is no support for %# and/or %l. This
patch checks if CONFIG_USE_TINY_PRINTF is defined and if so, prints a
different debug statement which doesn't use %#l
Signed-off-by: Oded Gabbay
Cc: Simon Glass
---
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