2017-02-13 16:34 GMT+09:00 Vignesh R :
> Use CONFIG_IS_ENABLED() macro to check whether OF_LIBFDT is enabled, so
> that code block is compiled irrespective of SPL or U-Boot build
> depending on CONFIG_SPL_OF_LIBFDT(for SPL) or CONFIG_OF_LIBFDT(for
> U-Boot).
>
> Signed-off-by: Vignesh R
Reviewed
Hello Masahiro,
Am 11.02.2017 um 04:39 schrieb Masahiro Yamada:
With the Kconfig re-sync with Linux 4.10, characters such as
'}', ';' in Kconfig help message cause warnings:
$ make defconfig
*** Default configuration is based on 'sandbox_defconfig'
drivers/i2c/Kconfig:132:warning: ignoring unsu
Hi Simon,
On 02/08/2017 01:10 PM, Simon Glass wrote:
+Tom in case you have some thoughts
Hi Kever,
On 4 February 2017 at 18:45, Kever Yang wrote:
Hi Simon,
On 01/26/2017 10:23 PM, Simon Glass wrote:
Hi Kever,
On 18 January 2017 at 05:16, Kever Yang wrote:
RK3399 support DDR3, LPDDR3, DD
On Sun, Feb 12, 2017 at 04:21:40PM +0100, Jelle van der Waa wrote:
> Add support for the NanoPi NEO Air H3 board from friendlyarm.com . This
> board contains WiFi, Bluetooth, 8GB eMMC storage and 512 MB DDR3 ram.
>
> Signed-off-by: Jelle van der Waa
Acked-by: Maxime Ripard
Thanks,
Maxime
--
On Sat, Feb 11, 2017 at 11:08:38PM +0800, Icenowy Zheng wrote:
> Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
> DesignWare DRAM controller, which do not have official free DRAM
> initialization code, but can use modified dram_sun8i_h3.c.
>
> Add a invisible option for easier DRA
On Tuesday 07 February 2017 09:15 PM, Jean-Jacques Hiblot wrote:
> This series allows the ti_qspi driver to use the same dts description as the
> linux kernel. In Linux since 4.6 the ctrl_mod_mmap is described in the DTS as
> a
> syscon. It used to be the 3rd memory range in "reg".
>
> The firs
On Tuesday 07 February 2017 09:15 PM, Jean-Jacques Hiblot wrote:
> We used to get the address of the optionnal ctrl_mod_mmap register as the
> third memory range of the "reg" property. the linux driver moved to use a
> syscon instead. In order to keep the DTS as close as possible to that of
> lin
Use CONFIG_IS_ENABLED() macro to check whether OF_LIBFDT is enabled, so
that code block is compiled irrespective of SPL or U-Boot build
depending on CONFIG_SPL_OF_LIBFDT(for SPL) or CONFIG_OF_LIBFDT(for
U-Boot).
Signed-off-by: Vignesh R
---
lib/fdtdec.c | 2 +-
1 file changed, 1 insertion(+), 1
Hi,
On Sat, Feb 11, 2017 at 07:11:02PM +0800, Icenowy Zheng wrote:
> @@ -0,0 +1,13 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_SUNXI=y
> +# CONFIG_ARMV7_NONSEC is not set
Why? It doesn't have Trustzone?
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-ele
On Sat, Feb 11, 2017 at 07:11:01PM +0800, Icenowy Zheng wrote:
> As we have now V3s support in board code, the V3s DTSI file should also
> be added.
>
> Add also some CCU include headers to satisfy the DTSI file.
>
> Signed-off-by: Icenowy Zheng
Acked-by: Maxime Ripard
Thanks,
Maxime
--
Max
On Sat, Feb 11, 2017 at 07:11:00PM +0800, Icenowy Zheng wrote:
> Basic U-Boot support is now present for V3s.
>
> Some memory addresses are changed specially for V3s, as the original
> address map cannot fit into a so small DRAM.
>
> As the DRAM controller code needs a big refactor, the SPL suppo
Hi Stefano,
On Thu, Feb 2, 2017 at 8:17 PM, Jagan Teki wrote:
> From: Jagan Teki
>
> This patch set support Engicam Is.IoT MX6UL board support.
>
> Changes for v5:
> - Update ccgr_init so-that it can enable required clocks
> - Add new patch for dts files include under board MAINTAINERS
> - Add n
Hi Stefano,
On Thu, Feb 2, 2017 at 8:25 PM, Jagan Teki wrote:
> From: Jagan Teki
>
> Changes for v3:
> - Update IMX6_BMODE_* shift macros with real number instead of bitops
> - %s/IMX6_BMODE_SERIAL/IMX6_BMODE_SERIAL_ROM
> - Assign enums with numbers so-that it can easy to see same in RM
> - Upda
commit 2f11cd9121658 ("dm: core: Handle global_data moving in SPL")
handles relocation of GD in SPL if spl_init() is called before
board_init_r(). So, uclass_root.next need not be initialized always
and accessing uclass_root.next->prev gives an abort. Update the
uclass_root only if it is available.
Hi Andreas,
> -Original Message-
> From: Andreas Bießmann [mailto:andr...@biessmann.org]
> Sent: 2017年2月13日 7:42
> To: Tony Yang - A41535
> Cc: U-Boot Mailing List ; Stephen Warren
>
> Subject: Re: [U-Boot,v5,1/2] gpio: at91_gpio: Remove CPU_HAS_PIO3 macro
>
> On Tue, Feb 07, 2017 at 02
The intention of this patch is the preparation to introduce
the pinctrl driver for AT91 PIO.
Use "union" to make the PIO3 and PIO2's registers be together
and make their offset aligned.
Signed-off-by: Wenyou Yang
---
Changes in v6:
- Move PIO_SCDR_DIV define from mach/ to mach/at91_pio.h
to
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each soc will have to describe the SoC limitation and pin
configuration via DT. This will allow to do not need to touch
the C code when adding ne
The purpose of this patch set is to add the pinctrl driver for AT91
PIO controller.
Changes in v6:
- Move PIO_SCDR_DIV define from mach/ to mach/at91_pio.h
to fix the build error.
Changes in v5:
- Rebase on the master branch on git://git.denx.de/u-boot-atmel.git
commit: 0ff27d4a94637d4b19
This feature is seldom used these days on UniPhier boards.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_ld11_defconfig | 1 -
configs/uniphier_ld20_defconfig | 1 -
configs/uniphier_ld4_sld8_defconfig | 1 -
configs/uniphier_pro4_defconfig | 1 -
configs/uniphier_pxs2_ld6
Hi,
On 02/11/2017 12:04 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> Add SDHCI host controller found on STMicroelectronics SoCs
>
> On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
> inside a dedicated flashSS sub-system that provides an extend subset
> of regist
On Tue, Feb 07, 2017 at 02:07:18PM +0800, Wenyou Yang wrote:
> The intention of this patch is the preparation to introduce
> the pinctrl driver for AT91 PIO.
>
> Use "union" to make the PIO3 and PIO2's registers be together
> and make their offset aligned.
>
This patch breaks on at91 devices wit
On Tue, Feb 07, 2017 at 05:11:35PM +0800, Wenyou Yang wrote:
> Move CONFIG_SYS_NO_FLASH to the configs/sama5d4*_defconfig file.
>
this one conflicts with e856bdcfb49291d30b19603fc101bea096c48196, just drop it
from the series.
Andreas
> Signed-off-by: Wenyou Yang
> Reviewed-by: Simon Glass
> -
On Tue, Feb 07, 2017 at 04:40:04PM +0800, Wenyou Yang wrote:
> Move CONFIG_SYS_NO_FLASH to the configs/sama5d3x_xplained_*_defconfig
> files.
this one conflicts with e856bdcfb49291d30b19603fc101bea096c48196, just drop it
from the series.
Andreas
>
> Signed-off-by: Wenyou Yang
> ---
>
> Changes
On Tue, Feb 07, 2017 at 04:01:29PM +0800, Wenyou Yang wrote:
> Move CONFIG_SYS_NO_FLASH to the configs/sama5d4*_defconfig file.
>
> Signed-off-by: Wenyou Yang
> Reviewed-by: Andreas Bießmann
this one will conflict with e856bdcfb49291d30b19603fc101bea096c48196, just
drop it.
Andreas
> ---
>
>
Hi Phil,
> -Original Message-
> From: Phil Edworthy [mailto:phil.edwor...@renesas.com]
> Sent: Tuesday, February 07, 2017 6:34 AM
> To: Tom Rini
> Cc: Kamil Lulko ; Vikas MANOCHA
> ; Michael Kurz ;
> Albert Aribaud ; U-Boot Mailing List
>
> Subject: RE: [U-Boot] [PATCH] armv7m: Add Sys
Hi Phil,
> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Sunday, February 05, 2017 3:17 PM
> To: Phil Edworthy ; Vikas MANOCHA
> ; Michael Kurz
>
> Cc: Albert Aribaud ; u-boot@lists.denx.de; Kamil
> Lulko
> Subject: Re: [U-Boot] [PATCH] armv7m: Add SysTick tim
On Sat, Feb 11, 2017 at 10:43:54PM +0900, Masahiro Yamada wrote:
> We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
> not completed. Finish this work by the tool.
>
> During this move, let's rename it to CONFIG_MTD_NOR_FLASH.
> Actually, we have more instances of "#ifndef CONFIG_SYS
On Sat, Feb 11, 2017 at 10:43:55PM +0900, Masahiro Yamada wrote:
> The whole of common/flash.c is guarded by #if defined() ... #endif.
> Move the conditional to common/Makefile.
>
> Signed-off-by: Masahiro Yamada
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital si
On Sun, Feb 12, 2017 at 10:44:20AM -0500, Tom Rini wrote:
> On Sat, Feb 11, 2017 at 10:43:54PM +0900, Masahiro Yamada wrote:
>
> > We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
> > not completed. Finish this work by the tool.
> >
> > During this move, let's rename it to CONFIG_MT
It also removes the ethernet pin configuration done during the board
initialization.
Signed-off-by: Vikas Manocha
---
Changed in v3: None
Changed in v2: None
arch/arm/dts/stm32f746-disco.dts | 1 +
arch/arm/dts/stm32f746.dtsi| 14 +
board/st/stm32f746-dis
This driver uses the same pin control binding as that of linux, binding
document of this patch is copied from linux. One addition done is for
GPIO input and output mode configuration which was missing.
Signed-off-by: Vikas Manocha
Reviewed-by: Simon Glass
---
Changed in v3:
- remove get length
Signed-off-by: Vikas Manocha
---
Changed in v3: None
Changed in v2: None
arch/arm/dts/stm32f746.dtsi | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index afcd327..f59eca8 100644
--- a/arch/arm/dts/stm32f746.d
It also removes the qspi pin configuration done during the
board initialization.
Signed-off-by: Vikas Manocha
---
Changed in v3: None
Changed in v2: None
arch/arm/dts/stm32f746-disco.dts | 1 +
arch/arm/dts/stm32f746.dtsi| 11
board/st/stm32f746-disco/stm32f
And remove the uart pin configuration from board initialization.
Signed-off-by: Vikas Manocha
---
Changed in v3: None
Changed in v2: None
arch/arm/dts/stm32f746-disco.dts | 6 ++
arch/arm/dts/stm32f746.dtsi| 13 +
board/st/stm32f746-disco/stm32f746-di
Signed-off-by: Vikas Manocha
Reviewed-by: Simon Glass
---
Changed in v3: None
Changed in v2:
- added blank lines in code like before return and after
variable declaration.
drivers/serial/serial_stm32x7.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/
Also created alias for usart1 and specified oscillator clock for stm32f7
discovery board.
Signed-off-by: Vikas Manocha
---
Changed in v3: None
Changed in v2: None
arch/arm/dts/stm32f746-disco.dts | 5 +
arch/arm/dts/stm32f746.dtsi | 27 +++
2 files changed, 32
Before clock driver availability it was required to enable usart1 clock
for serial init but now with clock driver is taking care of usart1 clock.
Signed-off-by: Vikas Manocha
---
Changed in v3: None
Changed in v2: None
board/st/stm32f746-disco/stm32f746-disco.c | 1 -
drivers/clk/clk_stm32f7.c
This patch adds device tree support for stm32f7 serial driver & removes serial
platform data structure.
Signed-off-by: Vikas Manocha
Reviewed-by: Simon Glass
---
Changed in v3: None
Changed in v2: None
board/st/stm32f746-disco/stm32f746-disco.c | 10 --
drivers/serial/serial_stm32x7.c
add basic clock driver support for stm32f7 to enable clocks required by
the peripherals.
Signed-off-by: Vikas Manocha
Reviewed-by: Simon Glass
---
Changed in v3: None
Changed in v2:
- added blank lines in code like before return and after
variable declaration.
- re-arr
This patchset:
- adds support for stm32f7 clock driver.
- adds support for stm32f7 pin control driver.
- adds device tree nodes for stm32f7 serial & clock.
- adds stm32f7 pin control device tree sub nodes :
- serial usart1
- ethernet
Hi Simon,
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: Saturday, February 11, 2017 12:20 PM
> To: Vikas MANOCHA
> Cc: U-Boot Mailing List ; Albert Aribaud
> ; Heiko Stübner ;
> Joe Hershberger ; Kever Yang
> ; Masahiro Yamada
> ;
Thanks Simon,
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: Saturday, February 11, 2017 12:20 PM
> To: Vikas MANOCHA
> Cc: U-Boot Mailing List ; Beniamino Galvani
> ; Daniel Schwierzeck
> ; Heiko Stübner ; Kever Yang
> ; Konstanti
On Sun, Feb 12, 2017 at 10:55:27AM +0200, Uri Mashiach wrote:
> Hi Tom,
>
> On 02/09/2017 10:29 PM, Tom Rini wrote:
> >On Thu, Feb 09, 2017 at 09:00:26AM +0200, Uri Mashiach wrote:
> >
> >>The following XHCI registers base address are set to OMAP5 values:
> >>OMAP_XHCI_BASE, OMAP_OCP1_SCP_BASE, OM
On Sat, Feb 11, 2017 at 10:43:54PM +0900, Masahiro Yamada wrote:
> We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is
> not completed. Finish this work by the tool.
>
> During this move, let's rename it to CONFIG_MTD_NOR_FLASH.
> Actually, we have more instances of "#ifndef CONFIG_SYS
Add support for the NanoPi NEO Air H3 board from friendlyarm.com . This
board contains WiFi, Bluetooth, 8GB eMMC storage and 512 MB DDR3 ram.
Signed-off-by: Jelle van der Waa
---
arch/arm/dts/Makefile| 3 +-
arch/arm/dts/sun8i-h3-nanopi-neo-air.dts | 97 +
Am 12.02.2017 um 15:29 schrieb Marek Vasut:
> On 02/12/2017 03:20 PM, Andreas Färber wrote:
>> Am 01.12.2016 um 02:06 schrieb Marek Vasut:
>>> diff --git a/drivers/mmc/jz_mmc.c b/drivers/mmc/jz_mmc.c
>>> new file mode 100644
>>> index 000..95b3367
>>> --- /dev/null
>>> +++ b/drivers/mmc/jz_mmc.
Since commit 26b09c022ab6 ("ARM: uniphier: move SBC and Support Card
init code to U-Boot proper"), SPL does not need pin-mux settings for
the System Bus.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ld11-ref.dts | 4
arch/arm/dts/uniphier-ld20-ref.dts | 4
2 files changed,
On 02/12/2017 03:20 PM, Andreas Färber wrote:
> Am 01.12.2016 um 02:06 schrieb Marek Vasut:
>> diff --git a/drivers/mmc/jz_mmc.c b/drivers/mmc/jz_mmc.c
>> new file mode 100644
>> index 000..95b3367
>> --- /dev/null
>> +++ b/drivers/mmc/jz_mmc.c
> [...]
>> +static void jz_mmc_set_ios(struct mmc
Am 01.12.2016 um 02:06 schrieb Marek Vasut:
> diff --git a/drivers/mmc/jz_mmc.c b/drivers/mmc/jz_mmc.c
> new file mode 100644
> index 000..95b3367
> --- /dev/null
> +++ b/drivers/mmc/jz_mmc.c
[...]
> +static void jz_mmc_set_ios(struct mmc *mmc)
This needs to return int by now.
> +{
> + st
Am 12.02.2017 um 12:52 schrieb Andreas Färber:
> Hi Marek,
>
> Am 01.12.2016 um 02:06 schrieb Marek Vasut:
>> From: Paul Burton
>>
>> Add support for the Creator CI20 platform based on the JZ4780 SoC.
>> The DTS file comes from Linux 4.6 as of revision
>> 78800558d104e003f9ae92e0107f1de39cf9de9f
On 02/12/2017 02:24 PM, Andreas Färber wrote:
> Am 12.02.2017 um 13:53 schrieb Marek Vasut:
>> On 02/12/2017 01:24 PM, Andreas Färber wrote:
>>> Am 12.02.2017 um 12:55 schrieb Marek Vasut:
On 02/12/2017 12:52 PM, Andreas Färber wrote:
> CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y leads t
Am 06.02.2017 um 23:30 schrieb Alexandru Gagniuc:
> diff --git a/arch/arm/mach-omap2/am33xx/board.c
> b/arch/arm/mach-omap2/am33xx/board.c
> index 190310f..f19e919 100644
> --- a/arch/arm/mach-omap2/am33xx/board.c
> +++ b/arch/arm/mach-omap2/am33xx/board.c
> @@ -190,11 +190,9 @@ static struct musb
Am 12.02.2017 um 13:53 schrieb Marek Vasut:
> On 02/12/2017 01:24 PM, Andreas Färber wrote:
>> Am 12.02.2017 um 12:55 schrieb Marek Vasut:
>>> On 02/12/2017 12:52 PM, Andreas Färber wrote:
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y leads to this error:
LD spl/u-boot-spl
>>>
Am 12.02.2017 um 10:08 schrieb Masahiro Yamada:
> These two functions are only used in lib/tiny-printf.c .
>
> Signed-off-by: Masahiro Yamada
> ---
>
> lib/tiny-printf.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Builds okay for ci20 (but does not resolve its size issue),
Tes
On 02/12/2017 01:24 PM, Andreas Färber wrote:
> Am 12.02.2017 um 12:55 schrieb Marek Vasut:
>> On 02/12/2017 12:52 PM, Andreas Färber wrote:
>>> CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y leads to this error:
>>>
>>> LD spl/u-boot-spl
>>> mipsel-suse-linux-ld.bfd: u-boot-spl section `.dat
Am 12.02.2017 um 12:55 schrieb Marek Vasut:
> On 02/12/2017 12:52 PM, Andreas Färber wrote:
>> CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y leads to this error:
>>
>> LD spl/u-boot-spl
>> mipsel-suse-linux-ld.bfd: u-boot-spl section `.data' will not fit in
>> region `.sram'
>> mipsel-suse-l
On 02/12/2017 10:10 AM, kos...@marvell.com wrote:
> From: Konstantin Porotchkin
>
> The USB device should linked to VBUS regulator through "vbus-supply"
> DTS property.
> This patch adds handling for "vbus-supply" property inside the USB
> device entry for turning on the VBUS regulator upon the h
On 02/12/2017 12:52 PM, Andreas Färber wrote:
> Hi Marek,
Hi!
> Am 01.12.2016 um 02:06 schrieb Marek Vasut:
>> From: Paul Burton
>>
>> Add support for the Creator CI20 platform based on the JZ4780 SoC.
>> The DTS file comes from Linux 4.6 as of revision
>> 78800558d104e003f9ae92e0107f1de39cf9de9
Hi Marek,
Am 01.12.2016 um 02:06 schrieb Marek Vasut:
> From: Paul Burton
>
> Add support for the Creator CI20 platform based on the JZ4780 SoC.
> The DTS file comes from Linux 4.6 as of revision
> 78800558d104e003f9ae92e0107f1de39cf9de9f
>
> So far, there are still a few details which will hav
Hi,
On 02/09/2017 05:27 PM, Tom Rini wrote:
On Thu, Feb 09, 2017 at 02:35:30PM +0100, Marek Vasut wrote:
On 02/09/2017 12:36 PM, Uri Mashiach wrote:
Hello Marek,
Hi!
[...]
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index b881b19..ceee12a 100644
--- a/drivers
On 03/02/2017 15:20, Markus Niebel wrote:
> From: Markus Niebel
>
> We have a Kconfig name for the module types. Let's Use it.
> Some feature selections and configurations are based on the
> module. Module selection selects the CPU type.
>
> Signed-off-by: Markus Niebel
> ---
> board/tqc/tqm
On 03/02/2017 15:20, Markus Niebel wrote:
> From: Markus Niebel
>
> This adds support for TQMa6DL using i.MX6DL and 1GiB DRAM
> Since The module will use the same devicetree, we patch
> the ram size in ft_board_setup.
>
> Signed-off-by: Markus Niebel
> ---
> board/tqc/tqma6/Kconfig
On 27/12/2016 11:04, Peng Fan wrote:
> Add compatible property for i.MX7ULP.
> Add a weak init_usdhc_clk function, i.MX7ULP use this to init the clock.
>
> Signed-off-by: Peng Fan
> Cc: Stefano Babic
> Cc: Jaehoon Chung
> ---
>
> V2:
> None
>
> drivers/mmc/fsl_esdhc.c | 8
> 1 fi
On 27/12/2016 11:04, Peng Fan wrote:
> Drop CONFIG_LPUART_32B_REG.
> Move the register structure to a common file include/fsl_lpuart.h
> Define lpuart_serial_platdata structure which includes the reg base and flags.
> For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
> big
On 27/12/2016 11:04, Peng Fan wrote:
> Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF
> size for HAB support boot on mx7ulp.
>
> Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build
> secure uboot.
>
> Signed-off-by: Peng Fan
> Signed-off-by: Ye Li
>
On 27/12/2016 11:04, Peng Fan wrote:
> From: Ye Li
>
> This driver implements the HW WATCHDOG functions. Which needs
> to set CONFIG_HW_WATCHDOG to use them. This is disabled by default for
> mx7ulp.
>
> Use watchdog for reset cpu. Implement this in the driver.
> Need to define CONFIG_ULP_WATC
On 27/12/2016 11:04, Peng Fan wrote:
> Add i.MX7ULP pinctrl driver.
> Select CONFIG_PINCTRL_IMX7ULP to use this driver.
>
> Signed-off-by: Peng Fan
> Cc: Simon Glass
> Cc: Stefano Babic
> ---
>
> V2:
> None
>
> drivers/pinctrl/nxp/Kconfig | 14
> drivers/pinctrl/nxp
Support the following DT properties:
"bias-disable"
"bias-pull-up"
"bias-pull-down"
"bias-pull-pin-default"
"input-enable"
"input-disable"
My main motivation is to support pull up/down biasing. For Pro5 and
later SoCs, the pupdctrl register number is the same as the pinmux
number, so
On 27/12/2016 11:04, Peng Fan wrote:
> Update the mxc_ocotp driver to support i.MX7ULP.
> The read/write sequence has some changes due to
> PDN and OUT_STATUS registers added and TIME register is
> removed. Also update the bank size and number.
>
> Add is_mx7ulp macro in sys_proto.h
>
> Signed-
For the memory footprint reason, the Boot ROM can not load the ARM
Trusted Firmware BL1 directly when Trusted Board Boot is enabled.
The second stage loader is Socionext's own firmware, so rename it
for clarification.
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h | 2 +-
1 file
On 27/12/2016 11:04, Peng Fan wrote:
> Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
> Have added all ports on RGPIO2P_0 and RGPIO2P_1.
>
> The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
> to y to enable the drivers.
>
> To use the GPIO function, the
On 27/12/2016 11:04, Peng Fan wrote:
> From: Ye Li
>
> Implement the i2c clock enable and get function for mx7ulp. These
> functions are required by imx_lpi2c driver.
>
> Signed-off-by: Peng Fan
> Signed-off-by: Ye Li
> Cc: Stefano Babic
> ---
>
> V2:
> None
>
> arch/arm/cpu/armv7/mx7ul
On 27/12/2016 11:04, Peng Fan wrote:
> Add handle the lpuarts in get_lpuart_clk.
>
> Signed-off-by: Peng Fan
> Signed-off-by: Ye Li
> Cc: Stefano Babic
> ---
>
> V2:
> None
>
> arch/arm/cpu/armv7/mx7ulp/clock.c | 34 +++---
> 1 file changed, 31 insertions(+), 3
Hi Peng,
On 27/12/2016 11:04, Peng Fan wrote:
> Implement soc level functions to get cpu rev, reset cause, enable cache,
> etc. We will disable the wdog and init clocks in s_init at very early u-boot
> phase.
>
> Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
> is har
Hi Peng,
On 27/12/2016 11:04, Peng Fan wrote:
> Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
> clock source, divider, clock rate and parent source.
> Users need to include pcc.h to use the APIs to for peripherals clock. Each
> peripheral clock is defined in enum pcc_cl
These two functions are only used in lib/tiny-printf.c .
Signed-off-by: Masahiro Yamada
---
lib/tiny-printf.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
index dfa8432..6def8f9 100644
--- a/lib/tiny-printf.c
+++ b/lib/tiny-printf
From: Konstantin Porotchkin
The USB device should linked to VBUS regulator through "vbus-supply"
DTS property.
This patch adds handling for "vbus-supply" property inside the USB
device entry for turning on the VBUS regulator upon the host adapter probe.
Signed-off-by: Konstantin Porotchkin
Cc:
Hi Tom,
On 02/09/2017 10:29 PM, Tom Rini wrote:
On Thu, Feb 09, 2017 at 09:00:26AM +0200, Uri Mashiach wrote:
The following XHCI registers base address are set to OMAP5 values:
OMAP_XHCI_BASE, OMAP_OCP1_SCP_BASE, OMAP_OTG_WRAPPER_BASE
Captured crash for "usb start" command:
--
Hi Peng,
On 27/12/2016 11:04, Peng Fan wrote:
> Add a new driver under ULP directory to support its IOMUXC
> controllers. The ULP has two IOMUXC, the IOMUXC0 is used
> for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
> the default IOMUX in this driver. Any pins in IOMUXC0 needs
> to confi
On 27/12/2016 11:04, Peng Fan wrote:
> Add imx-regs.h for i.MX7ULP registers addresses definitions and some
> registers structures.
>
> Signed-off-by: Peng Fan
> Signed-off-by: Ye Li
> Cc: Stefano Babic
> ---
>
> V2:
> None
>
> arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 1125
> +++
On 27/12/2016 11:04, Peng Fan wrote:
> i.MX7ULP is a new series SoC which has different architecture
> from previous i.MX platforms. Create a new cpu folder for it,
> and add it to Kconfig.
>
> Signed-off-by: Peng Fan
> Signed-off-by: Ye Li
> Cc: Stefano Babic
> ---
>
> V2:
> None
>
> arc
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