Hi,
Jaehoon Chung writes:
> Hi Andy,
>
> On 02/14/2017 11:18 PM, Andy Shevchenko wrote:
>> From: Felipe Balbi
>>
>> This patch adds Intel Tangier eMMC/SDHCI driver.
>>
>> Signed-off-by: Vincent Tinelli
>> Signed-off-by: Felipe Balbi
>> Signed-off-by: Andy Shevchenko
>> ---
>> drivers/mmc/
On 15.02.2017 01:57, Chris Packham wrote:
On Wed, Feb 15, 2017 at 11:56 AM, Chris Packham wrote:
On Tue, Feb 14, 2017 at 11:01 PM, Mario Six wrote:
On Tue, Feb 14, 2017 at 10:26 AM, Chris Packham wrote:
On Tue, Feb 14, 2017 at 7:56 PM, Mario Six wrote:
On Tue, Feb 14, 2017 at 7:36 AM, Ste
Hi,
Jaehoon Chung writes:
> On 02/13/2017 11:56 PM, Andy Shevchenko wrote:
>> From: Felipe Balbi
>>
>> We should only compile pci_mmc.c on platforms that actually need
>> this. Some platforms are using generic sdhci through driver model.
>>
>> Signed-off-by: Felipe Balbi
>> Signed-off-by: An
On Sel, 2017-02-14 at 10:28 -0800, Dalon Westergreen wrote:
> When CSEL=0x0 the socfpga bootrom does not touch the clock
> configuration for the device. This can lead to a boot failure
> on warm resets. To address this, the bootrom is configured to
> run a bit of code in the last 4KB of onchip ra
Hi Kever,
Kever Yang wrote on 2017年02月15日 14:13:
Hi Jacob,
On 02/15/2017 11:06 AM, Jacob Chen wrote:
We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin
rather than u-boot-spl-nodtb.bin
since we use spl_back_to_brom.
Have you try with CONFIG_SPL_OF_PLATDATA on and without S
Hi Jacob,
On 02/15/2017 11:06 AM, Jacob Chen wrote:
We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin rather than
u-boot-spl-nodtb.bin
since we use spl_back_to_brom.
Have you try with CONFIG_SPL_OF_PLATDATA on and without SPL_BACK_TO_BROM?
If this works on firefly, then we
Ping?
On 17-02-06 13:00:28, Sanchayan Maity wrote:
> Hello,
>
> This patchset adds support for the Freescale/NXP Display
> Controller Unit (DCU4) found on the LS1021A and Vybrid
> SoC.
>
> Patch series is based on top of latest u-boot master.
>
> First patch in the series renames existing CONFI
Hi,
On 02/13/2017 11:56 PM, Andy Shevchenko wrote:
> From: Felipe Balbi
>
> We should only compile pci_mmc.c on platforms that actually need
> this. Some platforms are using generic sdhci through driver model.
>
> Signed-off-by: Felipe Balbi
> Signed-off-by: Andy Shevchenko
> ---
> drivers/m
Hi Andy,
On 02/14/2017 11:18 PM, Andy Shevchenko wrote:
> From: Felipe Balbi
>
> This patch adds Intel Tangier eMMC/SDHCI driver.
>
> Signed-off-by: Vincent Tinelli
> Signed-off-by: Felipe Balbi
> Signed-off-by: Andy Shevchenko
> ---
> drivers/mmc/Kconfig | 5
> drivers/mmc/Ma
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
wrote:
> There is no microcode update available for SoCs used on Intel MID
> platforms.
>
> Use conditional to bypass it.
>
> Signed-off-by: Andy Shevchenko
> ---
> arch/x86/cpu/mp_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 dele
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
wrote:
> From: Vincent Tinelli
>
> Intel MID platform boards have special treatment, such as boot parameter
> setting.
>
> Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.
>
> Signed-off-by: Vincent Tinelli
> Signed-off-by: Andy Sh
We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin rather than
u-boot-spl-nodtb.bin
since we use spl_back_to_brom.
I miss it because i forget to clean build-dir..
Signed-off-by: Jacob Chen
---
configs/firefly-rk3288_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
wrote:
> Intel Mobile Internet Device (MID) platforms have special treatment in
> some cases, such as CPU enumeration or boot parameters configuration.
>
> Here we introduce specific quirk option for such cases.
>
> It is supposed to be s
Commit 94084eea3bd3 ("tools: kwbimage: Fix dest addr") changed kwbimage
to do this adjustment. So now the adjustment in kwboot is not needed
(and would prevent UART booting for images generated by the new
kwbimage). Remove the destaddr adjustment in kwboot.
Signed-off-by: Chris Packham
---
tool
On Wed, Feb 15, 2017 at 11:56 AM, Chris Packham wrote:
> On Tue, Feb 14, 2017 at 11:01 PM, Mario Six wrote:
>> On Tue, Feb 14, 2017 at 10:26 AM, Chris Packham
>> wrote:
>>> On Tue, Feb 14, 2017 at 7:56 PM, Mario Six wrote:
On Tue, Feb 14, 2017 at 7:36 AM, Stefan Roese wrote:
> Hi Chr
On Wed, Feb 15, 2017 at 12:03:32AM +0100, Marek Vasut wrote:
> On 02/14/2017 11:58 PM, Tom Rini wrote:
> > On Sun, Feb 12, 2017 at 12:52:45PM +0100, Andreas Färber wrote:
> >> Hi Marek,
> >>
> >> Am 01.12.2016 um 02:06 schrieb Marek Vasut:
> >>> From: Paul Burton
> >>>
> >>> Add support for the Cr
I am storing some information regarding my board within EEPROM (in memory
after I use the >eeprom read command) and I was wondering if it was possible
for me to somehow read from memory and store the values into an environment
variable.
I have done a search but could not find anything of relevance
On 02/14/2017 11:58 PM, Tom Rini wrote:
> On Sun, Feb 12, 2017 at 12:52:45PM +0100, Andreas Färber wrote:
>> Hi Marek,
>>
>> Am 01.12.2016 um 02:06 schrieb Marek Vasut:
>>> From: Paul Burton
>>>
>>> Add support for the Creator CI20 platform based on the JZ4780 SoC.
>>> The DTS file comes from Linu
On Wed, Feb 15, 2017 at 11:56 AM, Chris Packham wrote:
> On Tue, Feb 14, 2017 at 11:01 PM, Mario Six wrote:
>> On Tue, Feb 14, 2017 at 10:26 AM, Chris Packham
>> wrote:
>>> On Tue, Feb 14, 2017 at 7:56 PM, Mario Six wrote:
On Tue, Feb 14, 2017 at 7:36 AM, Stefan Roese wrote:
> Hi Chr
On Sun, Feb 12, 2017 at 12:52:45PM +0100, Andreas Färber wrote:
> Hi Marek,
>
> Am 01.12.2016 um 02:06 schrieb Marek Vasut:
> > From: Paul Burton
> >
> > Add support for the Creator CI20 platform based on the JZ4780 SoC.
> > The DTS file comes from Linux 4.6 as of revision
> > 78800558d104e003f9
On Tue, Feb 14, 2017 at 11:01 PM, Mario Six wrote:
> On Tue, Feb 14, 2017 at 10:26 AM, Chris Packham
> wrote:
>> On Tue, Feb 14, 2017 at 7:56 PM, Mario Six wrote:
>>> On Tue, Feb 14, 2017 at 7:36 AM, Stefan Roese wrote:
Hi Chris,
On 14.02.2017 02:48, Chris Packham wrote:
>
>
On 02/14/2017 11:56 AM, Alexander Graf wrote:
>
>
> On 14/02/2017 18:38, york sun wrote:
>> On 02/14/2017 09:00 AM, york@nxp.com wrote:
>>> On 02/14/2017 07:31 AM, Alexander Graf wrote:
On 14/02/2017 04:45, York Sun wrote:
> For ARMv8 Layerscape SoCs, secure memory and MC mem
On 02/14/17 at 12:43pm, Peter Robinson wrote:
> On Mon, Feb 13, 2017 at 9:57 AM, Peter Robinson wrote:
> > On Mon, Feb 13, 2017 at 9:00 AM, Jelle van der Waa wrote:
> >> The rsa_st struct has been made opaque in 1.1.x, add forward compatible
> >> code to access the n, e, d members of rsa_struct.
On Tue, Feb 14, 2017 at 03:56:43PM -0600, Adam Ford wrote:
> On Feb 14, 2017 3:10 PM, "Tom Rini" wrote:
>
> On Tue, Feb 14, 2017 at 03:03:44PM -0600, Adam Ford wrote:
>
> > Tom,
> >
> > I noticed there was an update to the omap3_logic_defconfig to use Simple
> Malloc
> >
> > http://git.denx.de/?
On Feb 14, 2017 3:10 PM, "Tom Rini" wrote:
On Tue, Feb 14, 2017 at 03:03:44PM -0600, Adam Ford wrote:
> Tom,
>
> I noticed there was an update to the omap3_logic_defconfig to use Simple
Malloc
>
> http://git.denx.de/?p=u-boot.git;a=commit;h=0959649dc6d9e6a371617abd3b0363
0c5d4d5a72
>
>
> I didn'
On Tue, Feb 14, 2017 at 03:03:44PM -0600, Adam Ford wrote:
> Tom,
>
> I noticed there was an update to the omap3_logic_defconfig to use Simple
> Malloc
>
> http://git.denx.de/?p=u-boot.git;a=commit;h=0959649dc6d9e6a371617abd3b03630c5d4d5a72
>
>
> I didn't see anything in my inbox indicating t
On Tue, Feb 14, 2017 at 02:32:42PM -0600, Andrew F. Davis wrote:
> On 02/14/2017 02:15 PM, Tom Rini wrote:
> > On Mon, Feb 13, 2017 at 12:47:36PM -0600, Andrew F. Davis wrote:
> >
> >> CONFIG_SPL_ABORT_ON_RAW_IMAGE causes SPL to abort and move on when it
> >> encounters RAW images, express this sa
Tom,
I noticed there was an update to the omap3_logic_defconfig to use Simple Malloc
http://git.denx.de/?p=u-boot.git;a=commit;h=0959649dc6d9e6a371617abd3b03630c5d4d5a72
I didn't see anything in my inbox indicating the patch, I only noticed
it because I pulled the latest from the trunk. Unfort
On 02/14/2017 02:15 PM, Tom Rini wrote:
> On Mon, Feb 13, 2017 at 12:47:36PM -0600, Andrew F. Davis wrote:
>
>> CONFIG_SPL_ABORT_ON_RAW_IMAGE causes SPL to abort and move on when it
>> encounters RAW images, express this same functionality as a positive
>> option enabling support for RAW images: C
On Mon, Feb 13, 2017 at 12:47:41PM -0600, Andrew F. Davis wrote:
> Disable support for loading non-FIT images for DRA7xx platforms using
> the high-security (HS) device variant.
>
> Signed-off-by: Andrew F. Davis
> Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
signature.asc
Descri
On Mon, Feb 13, 2017 at 12:47:40PM -0600, Andrew F. Davis wrote:
> Disable support for loading non-FIT images for AM57xx platforms using
> the high-security (HS) device variant.
>
> Signed-off-by: Andrew F. Davis
> Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
signature.asc
Descri
On Mon, Feb 13, 2017 at 12:47:39PM -0600, Andrew F. Davis wrote:
> Disable support for loading non-FIT images for AM43xx platforms using
> the high-security (HS) device variant.
>
> Signed-off-by: Andrew F. Davis
> Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
signature.asc
Descri
On Mon, Feb 13, 2017 at 12:47:38PM -0600, Andrew F. Davis wrote:
> Disable support for loading non-FIT images for AM335x platforms using
> the high-security (HS) device variant.
>
> Signed-off-by: Andrew F. Davis
> Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
--
Tom
signature.asc
Descri
On Mon, Feb 13, 2017 at 12:47:37PM -0600, Andrew F. Davis wrote:
> Add a Kconfig option that enables Legacy image support, this allows
> boards to explicitly disable this, for instance when needed for
> security reasons.
>
> Signed-off-by: Andrew F. Davis
> Reviewed-by: Simon Glass
Reviewed-by
On Mon, Feb 13, 2017 at 12:47:36PM -0600, Andrew F. Davis wrote:
> CONFIG_SPL_ABORT_ON_RAW_IMAGE causes SPL to abort and move on when it
> encounters RAW images, express this same functionality as a positive
> option enabling support for RAW images: CONFIG_SPL_RAW_IMAGE_SUPPORT
>
> Signed-off-by:
On Mon, Feb 13, 2017 at 06:49:40PM +0100, Axel Haslam wrote:
> The da850 soc's can boot from a external mmc card, but
> the AIS image should be written to the correct sector.
>
> Add instructions to copy the AIS image to a MMC card.
>
> Signed-off-by: Axel Haslam
Reviewed-by: Tom Rini
--
To
On Tue, Feb 14, 2017 at 01:26:24PM -0600, Nishanth Menon wrote:
> On 02/14/2017 01:20 PM, Tom Rini wrote:
> >On Tue, Feb 14, 2017 at 01:18:20PM -0600, menon.nisha...@gmail.com wrote:
> >>On Mon, Feb 13, 2017 at 7:27 AM, Tom Rini wrote:
> >>>On Mon, Feb 13, 2017 at 01:34:52PM +0200, Uri Mashiach wr
On 14/02/2017 18:38, york sun wrote:
On 02/14/2017 09:00 AM, york@nxp.com wrote:
On 02/14/2017 07:31 AM, Alexander Graf wrote:
On 14/02/2017 04:45, York Sun wrote:
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three bank
On 02/14/2017 01:20 PM, Tom Rini wrote:
On Tue, Feb 14, 2017 at 01:18:20PM -0600, menon.nisha...@gmail.com wrote:
On Mon, Feb 13, 2017 at 7:27 AM, Tom Rini wrote:
On Mon, Feb 13, 2017 at 01:34:52PM +0200, Uri Mashiach wrote:
The SOC family symbol CONFIG_AM57XX was removed by the commit
3891a
On Tue, Feb 14, 2017 at 01:18:20PM -0600, menon.nisha...@gmail.com wrote:
> On Mon, Feb 13, 2017 at 7:27 AM, Tom Rini wrote:
> > On Mon, Feb 13, 2017 at 01:34:52PM +0200, Uri Mashiach wrote:
> >
> >> The SOC family symbol CONFIG_AM57XX was removed by the commit
> >> 3891a54: "ARM: DRA7x/AM57xx: Ge
On Mon, Feb 13, 2017 at 7:27 AM, Tom Rini wrote:
> On Mon, Feb 13, 2017 at 01:34:52PM +0200, Uri Mashiach wrote:
>
>> The SOC family symbol CONFIG_AM57XX was removed by the commit
>> 3891a54: "ARM: DRA7x/AM57xx: Get rid of CONFIG_AM57XX".
>>
>> The symbol is needed by the XHCI OMAP USB driver.
>>
On Tue, Feb 14, 2017 at 02:16:13PM +0100, Jean-Jacques Hiblot wrote:
> Hi Tom,
>
> Have you had a chance to look at the patch below?
It looks fine but was too close to the release window (given the
potential impact) to merge. Thanks!
>
> Jean-Jacques
>
>
> On 01/02/2017 11:26, Jean-Jacques
When CSEL=0x0 the socfpga bootrom does not touch the clock
configuration for the device. This can lead to a boot failure
on warm resets. To address this, the bootrom is configured to
run a bit of code in the last 4KB of onchip ram on a warm reset.
This code puts the PLLs in bypass, disables the b
On Tue, Feb 14, 2017 at 7:46 PM, Andy Shevchenko
wrote:
> On Tue, Feb 14, 2017 at 7:40 PM, Andy Shevchenko
> wrote:
>> On Tue, Feb 14, 2017 at 7:33 PM, Simon Glass wrote:
>>> On 14 February 2017 at 10:21, Andy Shevchenko
>>> wrote:
On Tue, Feb 14, 2017 at 1:01 AM, Tom Rini wrote:
+
On Tue, Feb 14, 2017 at 07:25:33AM +0100, Heiko Schocher wrote:
> Hello Tom,
>
> Am 14.02.2017 um 06:38 schrieb Heiko Schocher:
> >Hello Tom,
> >
> >Am 14.02.2017 um 00:01 schrieb Tom Rini:
> >>Hey all,
> >>
> >>It's release day and v2017.03-rc2 is out. I think my patchwork queue is
> >>looking g
On 02/14/2017 07:39 AM, Alexander Graf wrote:
>
>
> On 14/02/2017 04:45, York Sun wrote:
>> Function mmu_change_region_attr() is added to change existing mapping
>> with updated PXN, UXN and memory type. This is a break-before-make
>> process during which the mapping becomes fault (invalid) before
Hi Andy,
On 14 February 2017 at 10:40, Andy Shevchenko wrote:
> On Tue, Feb 14, 2017 at 7:33 PM, Simon Glass wrote:
>> Hi Andy,
>>
>> On 14 February 2017 at 10:21, Andy Shevchenko
>> wrote:
>>>
>>> On Tue, Feb 14, 2017 at 1:01 AM, Tom Rini wrote:
>>> > Hey all,
>>> >
>>> > It's release day an
On Tue, Feb 14, 2017 at 7:40 PM, Andy Shevchenko
wrote:
> On Tue, Feb 14, 2017 at 7:33 PM, Simon Glass wrote:
>> Hi Andy,
>>
>> On 14 February 2017 at 10:21, Andy Shevchenko
>> wrote:
>>>
>>> On Tue, Feb 14, 2017 at 1:01 AM, Tom Rini wrote:
>>> > Hey all,
>>> >
>>> > It's release day and v2017
On Tue, Feb 14, 2017 at 7:33 PM, Simon Glass wrote:
> Hi Andy,
>
> On 14 February 2017 at 10:21, Andy Shevchenko
> wrote:
>>
>> On Tue, Feb 14, 2017 at 1:01 AM, Tom Rini wrote:
>> > Hey all,
>> >
>> > It's release day and v2017.03-rc2 is out. I think my patchwork queue is
>> > looking good cur
On Tue, Feb 14, 2017 at 2:24 AM, Wenyou Yang wrote:
> For the boards such as smartweb on which the clock driver isn't
> supported, the ethernet fail to be found when booting up with
> the below log.
> ---8<---
> Net: No ethernet found.
> --->8---
>
> Signed-off-by: Wenyou Yang
> Tested-by: Heik
On 02/14/2017 09:00 AM, york@nxp.com wrote:
> On 02/14/2017 07:31 AM, Alexander Graf wrote:
>>
>>
>> On 14/02/2017 04:45, York Sun wrote:
>>> For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
>>> at the end of DDR. DDR is spit into two or three banks. This patch
>>> reverts c
On 02/14/2017 09:23 AM, Dalon Westergreen wrote:
> When CSEL=0x0 the socfpga bootrom does not touch the clock
> configuration for the device. This can lead to a boot failure
> on warm resets. To address this, the bootrom is configured to
> run a bit of code in the last 4KB of onchip ram on a wa
Hi Andy,
On 14 February 2017 at 10:21, Andy Shevchenko wrote:
>
> On Tue, Feb 14, 2017 at 1:01 AM, Tom Rini wrote:
> > Hey all,
> >
> > It's release day and v2017.03-rc2 is out. I think my patchwork queue is
> > looking good currently but I'm open to being told there's important
> > stuff outst
+Bin
On 14 February 2017 at 10:33, Simon Glass wrote:
> Hi Andy,
>
> On 14 February 2017 at 10:21, Andy Shevchenko
> wrote:
>>
>> On Tue, Feb 14, 2017 at 1:01 AM, Tom Rini wrote:
>> > Hey all,
>> >
>> > It's release day and v2017.03-rc2 is out. I think my patchwork queue is
>> > looking good
On Tue, Feb 14, 2017 at 1:01 AM, Tom Rini wrote:
> Hey all,
>
> It's release day and v2017.03-rc2 is out. I think my patchwork queue is
> looking good currently but I'm open to being told there's important
> stuff outstanding. I'm probably going to grab some Kconfig things and
> perhaps other cl
On Tue, Feb 14, 2017 at 6:32 AM, Stefan Roese wrote:
> (added Joe to Cc as network custodian)
>
>
> On 14.02.2017 13:13, Konstantin Porotchkin wrote:
>>
>> Hi, Stefan,
>>
>> On 2/14/2017 13:49, Stefan Roese wrote:
>>>
>>> Hi Kosta,
>>>
>>> On 13.02.2017 14:38, kos...@marvell.com wrote:
F
On 02/14/2017 07:31 AM, Alexander Graf wrote:
>
>
> On 14/02/2017 04:45, York Sun wrote:
>> For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
>> at the end of DDR. DDR is spit into two or three banks. This patch
>> reverts commit aabd7ddb and simplifies the calculation of reserve
On 02/14/2017 03:16 PM, Andy Shevchenko wrote:
> From: Vincent Tinelli
>
> Remove sys_proto.h inclusion which is not used by the driver.
>
> Signed-off-by: Vincent Tinelli
> Signed-off-by: Andy Shevchenko
Applied, thanks
> ---
> drivers/usb/dwc3/gadget.c | 1 -
> 1 file changed, 1 deletion(
On 14/02/2017 04:45, York Sun wrote:
Function mmu_change_region_attr() is added to change existing mapping
with updated PXN, UXN and memory type. This is a break-before-make
process during which the mapping becomes fault (invalid) before final
attributres are set.
This is what we have the eme
On 14/02/2017 04:45, York Sun wrote:
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three banks. This patch
reverts commit aabd7ddb and simplifies the calculation of reserved
memory, and moves the code into common SoC file. Secure
When CSEL=0x0 the socfpga bootrom does not touch the clock
configuration for the device. This can lead to a boot failure
on warm resets. To address this, the bootrom is configured to
run a bit of code in the last 4KB of onchip ram on a warm reset.
This code puts the PLLs in bypass, disables the b
Hello,
I tired to build u-boot master for Snow board, install grub, chainload grub.
In short, it fails.
First, u-boot searches for EFI loader in ${distro_bootpart} which
defaults to unset and is interpreted as 1. grub wants the partition it
installs to to have the EFI System GUID. So to boot you
From: Patrice Chotard
This is a 96Board compliant board based on STiH410 SoC:
- 1GB DDR
- On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
- Ethernet 1000-BaseT
- SATA
- HDMI
- 2 x USB2.0 type A
- 1 x USB2.0 type micro-AB
- SD card slot
- High speed conn
From: Vincent Tinelli
Intel MID platform boards have special treatment, such as boot parameter
setting.
Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.
Signed-off-by: Vincent Tinelli
Signed-off-by: Andy Shevchenko
---
arch/x86/lib/zimage.c | 4
1 file changed, 4 insertio
There is no microcode update available for SoCs used on Intel MID
platforms.
Use conditional to bypass it.
Signed-off-by: Andy Shevchenko
---
arch/x86/cpu/mp_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 988073cc
Intel Mobile Internet Device (MID) platforms have special treatment in
some cases, such as CPU enumeration or boot parameters configuration.
Here we introduce specific quirk option for such cases.
It is supposed to be selected by Intel MID platform boards, for example,
Intel Edison.
Signed-off-b
From: Patrice Chotard
This device tree has been extracted from v4.9 kernel
Signed-off-by: Patrice Chotard
Reviewed-by: Tom Rini
---
v4 : _ Add mising "stdout-path" property in arch/arm/dts/stih410-b2260.dts
which allow serial driver to be probed
arch/arm/dts/Makefile
From: Patrice Chotard
Add SDHCI host controller found on STMicroelectronics SoCs
On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.
Thi
From: Patrice Chotard
The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.
It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.
Signed-off-by: Patrice Chotard
---
v3: _ add top le
From: Patrice Chotard
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs
Signed-off-by: Patrice Chotard
---
v4: _ fix STi serial driver to be fully DT compliant
_ remove
From: Patrice Chotard
Signed-off-by: Patrice Chotard
Reviewed-by: Simon Glass
---
v3 : _ convert previous arch/arm/mach-sti/cpu.c into STi sysreset driver
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_sti.c | 82 +
2 files changed
From: Patrice Chotard
Add STMicroelectronics STiH410 pinctrl driver
Signed-off-by: Patrice Chotard
Reviewed-by: Tom Rini
---
drivers/pinctrl/Kconfig | 10 ++
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-sti.c | 320 ++
3 files c
From: Patrice Chotard
Add ARM global timer based timer
Signed-off-by: Patrice Chotard
---
v3 : _ convert previous arch/arm/mach-sti/timer.c into STi timer driver
drivers/timer/Kconfig | 7 +
drivers/timer/Makefile| 1 +
drivers/timer/sti-timer.c | 78 +
From: Patrice Chotard
v4: _ fix STi serial driver to be fully DT compliant
_ remove arch/arm/include/asm/arch-stih410/sti.h and
include/dm/platform_data/serial_sti_asc.h which became useless
_ board file cleanup
_ fix some nits in sti_sdhci.c
_ rebased on top of v2017.03-rc2
From: Patrice Chotard
As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.
This is needed for example when including sdhci.h, which include
asm/gpio.h>.
Signed-off-by: Patrice Chotard
---
arch/arm/include/asm/gpio.h | 2 +-
From: Felipe Balbi
This patch adds Intel Tangier eMMC/SDHCI driver.
Signed-off-by: Vincent Tinelli
Signed-off-by: Felipe Balbi
Signed-off-by: Andy Shevchenko
---
drivers/mmc/Kconfig | 5
drivers/mmc/Makefile| 1 +
drivers/mmc/tangier_sdhci.c | 73 ++
From: Vincent Tinelli
Remove sys_proto.h inclusion which is not used by the driver.
Signed-off-by: Vincent Tinelli
Signed-off-by: Andy Shevchenko
---
drivers/usb/dwc3/gadget.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 25ccc0
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
DesignWare DRAM controller, which do not have official free DRAM
initialization code, but can use modified dram_sun8i_h3.c.
Add a invisible option for easier DRAM initialization code reuse.
Signed-off-by: Icenowy Zheng
Acked-by: Max
Hello,
typing saveenv I get:
Saving environment to SPI Flash...
SF: Detected gd25lq32 with page size 256 Bytes, erase size 4 KiB, total 4 MiB
Cannot set speed (err=-1)
*** Warning - spi_flash_probe_bus_cs() failed, using defualt environment
snow #
and now environment is not saved and it seems it
Hi Tom,
Have you had a chance to look at the patch below?
Jean-Jacques
On 01/02/2017 11:26, Jean-Jacques Hiblot wrote:
SPL has been restricted to use only dev 0 based on the assumption that only
one MMC device is registered. This is not always the case and many
platforms now register several
The include/configs/udoo_neo.h already includes the distro defaults
include files so it seems the board was missed in the move to the
config file, whether that in initial commit or conversion, so
enable the option now and remove duplicated settings.
Signed-off-by: Peter Robinson
---
configs/udoo
The fdt_addr and ramdisk_addr_r are currently both defined to
0x8300 and that's not going to work well for anyone. Move
the ramdisk_addr_r to 0x8400.
Signed-off-by: Peter Robinson
---
include/configs/udoo_neo.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/c
Standard boot processes including distro boot generally expect the
default console to be defined.
Signed-off-by: Peter Robinson
---
include/configs/udoo_neo.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index 23a3685..5b46272e 10064
Hi Breno, Francesco and Stefano,
The following three patches fix the generic distro boot support for me on the
udoo Neo (Full edition tested).
I think all three patches are pretty straight forward and self explanatory.
Would be good to get them into 2017.03 GA.
Thanks,
Peter
__
Hi,
I'm trying to build a u-boot binary containing default configuration.
I created my configuration include file:
```
#define MTDIDS_DEFAULT "nand0=nand_flash"
#define MTDPARTS_DEFAULT
"mtdparts=nand_flash:256k(bootstrap)ro,512k(uboot)ro,256k(env1),256k(env2),-(sys)"
#define CONFIG_BOOT
On Mon, Feb 13, 2017 at 9:57 AM, Peter Robinson wrote:
> On Mon, Feb 13, 2017 at 9:00 AM, Jelle van der Waa wrote:
>> The rsa_st struct has been made opaque in 1.1.x, add forward compatible
>> code to access the n, e, d members of rsa_struct.
>>
>> EVP_MD_CTX_cleanup has been removed in 1.1.x and
(added Joe to Cc as network custodian)
On 14.02.2017 13:13, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Implement the board-specific network init function for
ESPRESSOB
Hi Jaehoon
On 02/13/2017 01:29 AM, Jaehoon Chung wrote:
> Hi,
>
> On 02/11/2017 12:04 AM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> Add SDHCI host controller found on STMicroelectronics SoCs
>>
>> On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
>> inside a dedic
Hi Simon
On 02/14/2017 06:23 AM, Simon Glass wrote:
> On 10 February 2017 at 08:04, wrote:
>> From: Patrice Chotard
>>
>> Signed-off-by: Patrice Chotard
>> ---
>> drivers/sysreset/Makefile | 1 +
>> drivers/sysreset/sysreset_sti.c | 82
>> +
>>
Hi Simon
On 02/10/2017 05:22 PM, Simon Glass wrote:
> Hi Patrice,
>
> On 2 February 2017 at 10:00, wrote:
>> From: Patrice Chotard
>>
>> Add SDHCI host controller found on STMicroelctronics SoCs
>>
>> Signed-off-by: Patrice Chotard
>> ---
>> arch/arm/Kconfig | 2 +
>
On 2/14/2017 14:21, Stefan Roese wrote:
On 14.02.2017 13:07, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:43, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Fix the default pin control values in a board-specific
functi
Hi Simon
On 02/10/2017 05:22 PM, Simon Glass wrote:
> Hi Patrice,
>
> On 2 February 2017 at 10:00, wrote:
>> From: Patrice Chotard
>>
>> This patch adds support to ASC (asynchronous serial controller)
>> driver, which is basically a standard serial driver. This IP
>> is common across other STMi
On 14.02.2017 13:07, Konstantin Porotchkin wrote:
Hi, Stefan,
On 2/14/2017 13:43, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Fix the default pin control values in a board-specific
function on early board init stage.
This fix allo
Hi, Stefan,
On 2/14/2017 13:49, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Implement the board-specific network init function for
ESPRESSOBin community board, setting the on-board Topaz
switch port to forward mode and allow networ
Hi, Stefan,
On 2/14/2017 13:43, Stefan Roese wrote:
Hi Kosta,
On 13.02.2017 14:38, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Fix the default pin control values in a board-specific
function on early board init stage.
This fix allows the NETA driver to work in RGMII
mode until the
Hi Kosta,
On 13.02.2017 14:38, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Implement the board-specific network init function for
ESPRESSOBin community board, setting the on-board Topaz
switch port to forward mode and allow network connection
through any of the available Etherenet po
Hi Kosta,
On 13.02.2017 14:38, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Fix the default pin control values in a board-specific
function on early board init stage.
This fix allows the NETA driver to work in RGMII
mode until the full-featured pin control driver gets
introduced.
Sig
On Tue, Feb 14, 2017 at 7:57 AM, Stefan Roese wrote:
> Hi Yegor,
>
>
> On 13.02.2017 16:02, Yegor Yefremov wrote:
>>
>> On Mon, Feb 13, 2017 at 3:17 PM, Belisko Marek
>> wrote:
>>>
>>> Hi Yegor,
>>>
>>> On Mon, Feb 13, 2017 at 12:57 PM, Yegor Yefremov
>>> wrote:
My am335x based bo
On 14/02/2017 06:23, Simon Glass wrote:
Hi,
On 13 February 2017 at 08:17, Jean-Jacques Hiblot wrote:
In the DTS, the addresses are defined relative to the parent bus. We need
to translate them to get the address as seen by the CPU core.
Signed-off-by: Jean-Jacques Hiblot
---
to: s...@chro
On Tue, Feb 14, 2017 at 10:26 AM, Chris Packham wrote:
> On Tue, Feb 14, 2017 at 7:56 PM, Mario Six wrote:
>> On Tue, Feb 14, 2017 at 7:36 AM, Stefan Roese wrote:
>>> Hi Chris,
>>>
>>> On 14.02.2017 02:48, Chris Packham wrote:
I just tried UART booting db-88f6820-amc with the latest u-
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