From: Carlo Caione
This driver implements MMC support on Meson GX (S905) based systems.
It's based on Carlo Caione's work, changes:
- BLK support added
- general refactoring
Signed-off-by: Carlo Caione
Signed-off-by: Andreas Färber
Signed-off-by: Heiner Kallweit
Tested-by: Heinrich Schuchardt
To enable booting from MMC the MMC devices 0 and 1 are added to the
BOOT_TARGET_DEVICES.
Signed-off-by: Heinrich Schuchardt
---
v7:
- added this patch to patch series
---
include/configs/meson-gxbb-common.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/meson-gxbb-common.h
This patch series is a resubmission of the v6 patch series
https://lists.denx.de/pipermail/u-boot/2017-February/281941.html
by Heiner Kallweit.
Patch 1 updates the device tree to a recent Linux version.
Patch 2 add a MMC driver for the GXBB SOC
Both patches are unchanged relative to version 6 of t
On 04/13/2017 07:41 PM, Ley Foon Tan wrote:
> Add config and defconfig for the Arria10 and update socfpga_common.h.
>
> Signed-off-by: Tien Fong Chee
> Signed-off-by: Ley Foon Tan
[...]
> @@ -298,7 +306,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
> */
> #define CONFIG_SPL_FRAMEW
On 04/13/2017 07:41 PM, Ley Foon Tan wrote:
> Add i2c, timer and other A10 macros.
What's NOC anyway ?
> Signed-off-by: Ley Foon Tan
> ---
> arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-socfpga/
On 04/13/2017 07:41 PM, Ley Foon Tan wrote:
> Restructure clock manager driver in the preparation to support A10.
> Move the Gen5 specific code to _gen5 files.
>
> - Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
> - Check return value from wait_for_bit(). So change retur
On 10 April 2017 at 13:24, Simon Glass wrote:
> An early version of this is available upstream. Bring it in as a starting
> point. This is from dtc upstream commit e56f2b0.
>
> Future work will plumb it into dtoc and remove the now-unnecessary local
> libraries.
>
> Signed-off-by: Simon Glass
> -
There are 3 region used by rk3399 ATF:
- bl31 code, locate at 0x1;
- cortex-m0 code and data, locate at 0xff8c;
- bl31 data, locate at 0xff8c1000 ~ 0xff8c4000;
SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory
for ATF data, or else there will have memory corrupt after SPL
loa
On 5 April 2017 at 21:44, Simon Glass wrote:
> On 1 April 2017 at 00:49, Eddie Cai wrote:
>> Now that most rockchip SoC based board have usb host support, enable
>> USB boot targets by default.
>>
>> Signed-off-by: Eddie Cai
>> ---
>> include/configs/rockchip-common.h | 1 +
>> 1 file changed,
On 10 April 2017 at 20:13, Kever Yang wrote:
> Hi Eric,
>
>
>
> On 04/10/2017 09:53 AM, Eric Gao wrote:
>>
>> when enable PMIC rk808,the system will halt at very
>> early stage,log is shown as bellow.
>>
>> INFO:plat_rockchip_pmu_init(1211): pd status 3e
>> INFO:BL31: Initializing runtim
On 9 April 2017 at 13:28, Simon Glass wrote:
> On 7 April 2017 at 11:13, Philipp Tomsich
> wrote:
>> From: Klaus Goger
>>
>> The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
>> connector) system-on-module from Theobroma Systems, featuring the
>> Rockchip RK3399.
>>
>> It provides t
On 11 April 2017 at 07:55, Simon Glass wrote:
> On 9 April 2017 at 20:41, Eric Gao wrote:
>> For using mipi display, we need to enable lcd3v3
>> which supplied by rk808,so enable rk808 first.
>>
>> Signed-off-by: Eric Gao
>> ---
>>
>> arch/arm/dts/rk3399-evb.dts | 39 ++
On 9 April 2017 at 13:28, Simon Glass wrote:
> On 7 April 2017 at 04:38, Heiko Stuebner wrote:
>> The warm-reset of rk3188 socs keeps the remap setting as it was, so if
>> it was enabled, the cpu would start from address 0x0 of the sram instead
>> of address 0x0 of the bootrom, thus making the re
On 9 April 2017 at 13:28, Simon Glass wrote:
> On 7 April 2017 at 11:09, Philipp Tomsich
> wrote:
>> The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
>> This updates the licensing info in the rk3399-puma.dts.
>>
>> Signed-off-by: Philipp Tomsich
>>
>> ---
>>
>> arch/arm/dts/rk3399-
On 11 April 2017 at 07:55, Simon Glass wrote:
> On 9 April 2017 at 20:17, Eric Gao wrote:
>> To enable mipi display, we need to enable pmic
>> rk808 first for lcd3v3 power,which use i2c0 to
>> communicate with soc. So enable i2c0.
>>
>> Signed-off-by: Eric Gao
>>
>> ---
>>
>> arch/arm/dts/rk339
On 5 April 2017 at 21:44, Simon Glass wrote:
> On 1 April 2017 at 00:46, Eddie Cai wrote:
>> tinker board support ethernet and usb host, so enable USB, PXE and DHCP
>> support.
>>
>> Signed-off-by: Eddie Cai
>> ---
>> include/configs/tinker_rk3288.h | 5 -
>> 1 file changed, 4 insertions(+
On 9 April 2017 at 13:27, Simon Glass wrote:
> On 5 April 2017 at 16:19, Heiko Stuebner wrote:
>> Somehow 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") moved
>> the rock board in between some rk3288 board, probably as a result of
>> rebasing.
>>
>> So move it back to its original positi
On 9 April 2017 at 13:28, Simon Glass wrote:
> On 7 April 2017 at 04:12, Kever Yang wrote:
>> The lower address is reserved for ATF, do not use it.
>>
>> Signed-off-by: Kever Yang
>> ---
>>
>> include/configs/rk3399_common.h | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Acked
On 9 April 2017 at 13:27, Simon Glass wrote:
> On 5 April 2017 at 16:19, Heiko Stuebner wrote:
>> Most Rockchip socs have the ability to either map the bootrom or a sram
>> area to the starting address of the cpu by flipping a bit in the GRF.
>>
>> Newer socs leave this untouched and mapped to th
On 31 March 2017 at 22:23, Simon Glass wrote:
> On 29 March 2017 at 13:20, Philipp Tomsich
> wrote:
>> Signed-off-by: Philipp Tomsich
>
> Always nice to have a commit message. Also, please can you always add
> a 'rockchip: ' tag?
>> ---
>>
>> Changes in v3: None
>>
>> arch/arm/dts/rk3399-puma.d
On 31 March 2017 at 22:23, Simon Glass wrote:
>
> On 29 March 2017 at 13:20, Philipp Tomsich
> wrote:
> > The RK3399 hangs during DMA of the Designware MMC controller, when
> > performing DMA-based transactions in SPL due to the DDR security settings
> > left behind by the BootROM (i.e. accesses
> On 14 Apr 2017, at 11:02, David Wu wrote:
>
> If the tx_delay is not enabled, the RGMII/1000M can't work.
>
> Signed-off-by: David Wu
> ---
> arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-roc
Hi David,
On 04/14/2017 05:02 PM, David Wu wrote:
If the tx_delay is not enabled, the RGMII/1000M can't work.
Signed-off-by: David Wu
---
arch/arm/include/asm/arch-rockchip/grf_rk3288.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-rockchip/g
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
include/configs/ls1046a_common.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 8ec1247..2779bb4 100644
--- a/include/configs/ls1046a_common.h
+++ b/incl
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Yogesh Gaur
> Sent: Thursday, April 13, 2017 2:35 PM
> To: u-boot@lists.denx.de; york sun
> Cc: Priyanka Jain ; Yogesh Narayan Gaur
>
> Subject: [U-Boot] [PATCH] driver: net: fsl-mc: Update fsl_mc_ldpa
Support storing uboot environment in eMMC.
Signed-off-by: Heiner Kallweit
---
include/configs/meson-gxbb-common.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/meson-gxbb-common.h
b/include/configs/meson-gxbb-common.h
index cc2b5b6..5951263 100644
--- a/
In most cases Odroid C2 is used with a eMMC card. So far the eMMC slot
was assigned dev number 1 (0 is the SD slot). So on uboot prompt
we had to manually switch the mmc device first. Therefore change the
device number assignment.
Signed-off-by: Heiner Kallweit
---
arch/arm/dts/meson-gxbb-odroid
In most cases Odroid C2 is used with a eMMC card. So far the eMMC slot
was assigned dev number 1 (0 is the SD slot). So on uboot prompt
we had to manually switch the mmc device first.
Therefore change the device number assignment. Thanks to Jaehoon for
the hint how to do it.
In addition allow to s
Number of blocks is a 9 bit field where 0 stands for a unlimited
number of blocks. Therefore the max number of blocks which can
be set is 511.
Signed-off-by: Heiner Kallweit
---
drivers/mmc/meson_gx_mmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/meson_gx_mm
Hi Simon,
On 04/11/2017 09:55 PM, Simon Glass wrote:
Hi Kever,
On 9 April 2017 at 20:36, Kever Yang wrote:
Hi Simon,
On 04/10/2017 03:28 AM, Simon Glass wrote:
Hi Kever,
On 7 April 2017 at 04:35, Kever Yang wrote:
Need to enablt CONFIG_OF_EMBED if we use separate uboot and dtb
in FIT i
Add the clock support.
Note that the clock handling of the DBGU peripheral is different
from the USART.
Signed-off-by: Wenyou Yang
Reviewed-by: Simon Glass
---
Changes in v3:
- Rebase on the master branch (22e10be45) of u-boot-dm git tree.
Changes in v2:
- Fix the DBGU clock handling.
- Add
Add the uart init function to be used on both probe and the early
debug uart init. For the latter, the input clock should be from
CONFIG_DEBUG_UART_CLOCK.
Signed-off-by: Wenyou Yang
Reviewed-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
drivers/serial/atmel_usart.c | 36
The patches is rework the uart init to fix the early debug not work
in SPL, and add the clock support.
Changes in v3:
- Rebase on the master branch (22e10be45) of u-boot-dm git tree.
Changes in v2:
- Fix the DBGU clock handling.
- Add Reviewed-by tag.
Wenyou Yang (2):
serial: atmel_usart: F
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
configs/ls1046aqds_defconfig | 1 +
configs/ls1046aqds_lpuart_defconfig | 1 +
configs/ls1046aqds_nand_defconfig| 1 +
configs/ls1046aqds_qspi_defconfig| 1 +
configs/ls1046aqds_sdcard_ifc_defconfig | 1 +
conf
From: Hou Zhiqiang
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang
---
board/freescale/ls1043aqds/ls1043aqds.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c
b/board/freescale/
From: Hou Zhiqiang
The PPA is a EL3 firmware, which support PSCI, hotplug,
power-management features etc.
Signed-off-by: Hou Zhiqiang
---
board/freescale/ls1046aqds/ls1046aqds.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c
b/board/freescale/
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
configs/ls1043aqds_defconfig | 1 +
configs/ls1043aqds_lpuart_defconfig | 1 +
configs/ls1043aqds_nand_defconfig| 1 +
configs/ls1043aqds_nor_ddr3_defconfig| 1 +
configs/ls1043aqds_qspi_defconfig| 1 +
conf
Align the at91 pmc's compatibles with kernel.
Signed-off-by: Wenyou Yang
Reviewed-by: Simon Glass
Reviewed-by: Andreas Bießmann
---
Changes in v4:
- Incorporate [PATCH v2] clk: at91: pmc: align the at91 pmc's compatibles.
- Rebase on the master branch (22e10be45) of u-boot-dm git tree.
- Ad
Add the compatible "atmel,at91rm9200-clk-master" to align with
the kernel.
Signed-off-by: Wenyou Yang
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add the Reviewed-by tags.
drivers/clk/at91/clk-master.c | 1 +
1 file changed, 1 insertion(+)
diff --gi
Enhance the peripheral clock to support both at9sam9x5's and
at91rm9200's peripheral clock via the different compatibles.
Signed-off-by: Wenyou Yang
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use an enum with a descriptive name to denote the clock typ
The purpose of the patch set is to enhance the peripheral clock to
support both at9sam9x5's and at91rm9200's peripheral clock, and align
the clk-master's and at91-pmc's compatibles with kernel.
Changes in v4:
- Incorporate [PATCH v2] clk: at91: pmc: align the at91 pmc's compatibles.
- Rebase on
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