Hi,
Dne ponedeljek, 14. maj 2018 ob 22:49:53 CEST je Vasily Khoruzhick napisal(a):
> Currently dw_hdmi configures HSYNC polarity using VSYNC setting from
> EDID and vice versa. Fix it, since it breaks displays where HSYNC
> and VSYNC polarity differs
>
> Signed-off-by: Vasily Khoruzhick
Hi!
Dne ponedeljek, 14. maj 2018 ob 22:49:52 CEST je Vasily Khoruzhick napisal(a):
> HSYNC is bit 8, and VSYNC is bit 9.
>
> Signed-off-by: Vasily Khoruzhick
Reviewed-by: Jernej Skrabec
Best regards,
Jernej
> ---
>
Hi Simon
Is this is problem?
arch/arm/dts/bcm2835-rpi-a-plus.dtb: Warning (phys_property): Missing
property '#phy-cells' in node /phy or bad phandle (referred
from /soc/usb@7e98:phys[0])
repeated about 6 - 8 times
make[2]:'arch/arm/dts/bcm2837-rpi-3-b.dtb' is up to date.
mv_ddr_build_message.c is generated in Marvell's standalone mv_ddr code.
When imported into u-boot we need to add the appropriate SPDX tag and
re-format it slightly.
Signed-off-by: Chris Packham
---
drivers/ddr/marvell/a38x/mv_ddr_build_message.c | 4 +++-
1 file
Hi Tom, Stefan,
On Tue, May 15, 2018 at 3:16 AM Stefan Roese wrote:
> Hi Tom,
> (Cc'ing Chris)
> On 14.05.2018 17:11, Tom Rini wrote:
> > On Mon, May 14, 2018 at 01:58:59PM +0200, Stefan Roese wrote:
> >
> >> Hi Tom,
> >>
> >> please pull the following MVEBU related patches from
On Mon, May 14, 2018 at 05:32:25PM +0200, Dr. Philipp Tomsich wrote:
> Tom,
>
> I have two fixes for regressions (that unfortunately ended up in the last
> release) in my tree,
> ready for a merge onto master.
>
> Thanks,
> Philipp.
>
>
> The following changes since commit
Initial support for Avnet MiniZed board. Tested UART1 (serial console),
QSPI(Flash), SDHCI1 (eMMC), USB.
Signed-off-by: Ibai Erkiaga
---
Changes for v3:
-dts formating refactor
-CONFIG_DISPLAY_CPUINFO removed from config
-CONFIG_OF_EMBED
Initial support for Avnet MiniZed board. Tested UART1 (serial console),
QSPI(Flash), SDHCI1 (eMMC), USB.
Signed-off-by: Ibai Erkiaga
---
arch/arm/dts/Makefile |1 +
arch/arm/dts/zynq-minized.dts | 106
Hi,
On Wed, 9 May 2018 12:56:46 +0200
Paulo Neves wrote:
> Hello I have successfully built u-boot and launched qemu with the
> flags proposed by the patch. My problems start when I try to boot the
> kernel
>
> What is the linux kernel defconfig that should be used to boot
When dealing with filesystems that come from block devices we can get a
noticeable performance gain in some use cases from having the block
cache enabled. Do so by default for btrfs/ext4/FAT.
Signed-off-by: Tom Rini
---
In general this grows U-Boot itself by ~2KiB and does
On Mon, May 14, 2018 at 10:58:49PM +0200, Mark Kettenis wrote:
> > Date: Mon, 14 May 2018 10:57:12 -0400
> > From: Tom Rini
> >
> > On Mon, May 14, 2018 at 04:53:49PM +0200, Mark Kettenis wrote:
> > > > From: Philipp Tomsich
> > > >
On 05/14/2018 11:02 PM, Simon Goldschmidt wrote:
> The boot ROMs of the socfpga platform limit the size of the
> SPL to copy to less than the available SRAM.
> (See "Intel SoC FPGA Embedded Development Suite User Guide")
>
> According to this document, Cyclone V and Arria V allow 60KB
> maximum
On 05/14/2018 10:58 PM, Goldschmidt Simon wrote:
> Bootcounter for is1 and sr1500 boards somewhat relied on struct global data
> alignment gap
> at the end of internal SRAM. Let's fix this by explicitly reserving some
> bytes.
>
> Signed-off-by: Simon Goldschmidt
On 05/14/2018 03:39 PM, Michal Simek wrote:
> From: Rajan Vaja
>
> Existing EEMI version is to as 1.0 (available from xilinx v2018.1
> version). Update required API version to match with EEMI API version.
Not sure I understand this sentence.
> New PMUFW version is
On 05/14/2018 09:43 PM, Simon Goldschmidt wrote:
>
>
> On 14.05.2018 17:51, Stefan Roese wrote:
>> On 14.05.2018 11:06, Marek Vasut wrote:
>>> On 05/14/2018 11:01 AM, Simon Goldschmidt wrote:
On 14.05.2018 10:17, Marek Vasut wrote:
> On 05/14/2018 10:03 AM, Simon Goldschmidt
Snapdragon bootloader needs to jump from 32bit to 64bit
Allow booting in these cases when CONFIG_AARCH32_SUPPORT_ARM64 is
defined.
Signed-off-by: Ramon Fried
---
include/image.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/image.h b/include/image.h
Snapdragon bootloader needs to jump from 32bit to 64bit
Allow booting in these cases when CONFIG_AARCH32_SUPPORT_ARM64 is defined.
Signed-off-by: Ramon Fried
---
common/image-fit.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
On Mon, May 14, 2018 at 10:51 PM, Simon Glass wrote:
> Hi Ramon,
>
> On 14 May 2018 at 01:10, Ramon Fried wrote:
>> On Mon, May 14, 2018 at 1:00 AM, Simon Glass wrote:
>>> Hi Ramon,
>>>
>>> On 12 May 2018 at 20:15, Ramon Fried
On Mon, May 14, 2018 at 8:53 PM Simon Glass wrote:
> Hi Alex,
> On 14 May 2018 at 03:09, Alex Kiernan wrote:
> > Merge UDP fastboot support from AOSP:
> >
> >
https://android.googlesource.com/platform/external/u-boot/+/android-o-mr1-iot-preview-8
> >
On Mon, May 14, 2018 at 9:50 PM Tom Rini wrote:
> On Mon, May 14, 2018 at 05:14:42PM +0100, Alex Kiernan wrote:
> > On Mon, May 14, 2018 at 3:47 PM Tom Rini wrote:
> >
> > > On Mon, May 14, 2018 at 06:42:41PM +0530, Jassi Brar wrote:
> > > > Hi Tom,
> > >
> From: "Dr. Philipp Tomsich"
> Date: Mon, 14 May 2018 17:02:43 +0200
>
> > On 14 May 2018, at 16:53, Mark Kettenis wrote:
> >
> >> From: Philipp Tomsich
> >> Date: Mon, 14 May 2018 15:22:06
The boot ROMs of the socfpga platform limit the size of the
SPL to copy to less than the available SRAM.
(See "Intel SoC FPGA Embedded Development Suite User Guide")
According to this document, Cyclone V and Arria V allow 60KB
maximum while Arria 10 allows 200KB. In both cases, this is
less than
> Date: Mon, 14 May 2018 10:57:12 -0400
> From: Tom Rini
>
> On Mon, May 14, 2018 at 04:53:49PM +0200, Mark Kettenis wrote:
> > > From: Philipp Tomsich
> > > Date: Mon, 14 May 2018 15:22:06 +0200
> > >
> > > Following the conversion of
Bootcounter for is1 and sr1500 boards somewhat relied on struct global data
alignment gap
at the end of internal SRAM. Let's fix this by explicitly reserving some bytes.
Signed-off-by: Simon Goldschmidt
---
include/configs/socfpga_common.h | 6 +-
Add a doc comment for pciauto_region_allocate().
Signed-off-by: Tuomas Tynkkynen
---
This patch depends on [PATCH 2/2] PCI: autoconfig: Don't allocate 64-bit
addresses to 32-bit only resources.
---
include/pci.h | 13 +
1 file changed, 13 insertions(+)
diff
On Mon, May 14, 2018 at 05:14:42PM +0100, Alex Kiernan wrote:
> On Mon, May 14, 2018 at 3:47 PM Tom Rini wrote:
>
> > On Mon, May 14, 2018 at 06:42:41PM +0530, Jassi Brar wrote:
> > > Hi Tom,
> > >
> > > On Tue, May 8, 2018 at 10:45 PM, Tom Rini wrote:
>
Currently dw_hdmi configures HSYNC polarity using VSYNC setting from
EDID and vice versa. Fix it, since it breaks displays where HSYNC
and VSYNC polarity differs
Signed-off-by: Vasily Khoruzhick
---
drivers/video/dw_hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2
On Mon, May 14, 2018 at 02:07:27PM +0200, Dr. Philipp Tomsich wrote:
> While it’s not directly related to this patch, we should clearly state that
> the U-Boot code base (with the possible exception of the tools/ directory,
> which I have started touching here) has _implicitly_ moved to GNU11
>
HSYNC is bit 8, and VSYNC is bit 9.
Signed-off-by: Vasily Khoruzhick
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
b/drivers/video/sunxi/sunxi_dw_hdmi.c
index
Previous attempt to fix HSYNC and VSYNC polarity settings for dw_hdmi on sunxi
wasn't completely correct - there's another bug in dw_hdmi driver.
This series fixes hsync/vsync settings in sunxi glue driver and
applies proper fix to dw_hdmi
v2: don't revert earlier fix, just use correct bits for
Long time u-boot user... (since the ppc days).
Need a clarification from WD re. GPL2: do Makefiles and header files in
include/config fall within the u-boot GPL?
NO, I do not want to link with any u-boot libraries. I'm writing code
that uses the jump table to add my "extensions", but would
On Mon, May 14, 2018 at 8:53 PM Simon Glass wrote:
> Hi,
> On 14 May 2018 at 03:09, Alex Kiernan wrote:
> > Move strcmp_l1() to include/common.h so we can can call it from
elsewhere.
> > Move FASTBOOT_VERSION to include/fastboot.h so when we merge the
On 14.05.2018 21:43, Simon Goldschmidt wrote:
On 14.05.2018 17:51, Stefan Roese wrote:
On 14.05.2018 11:06, Marek Vasut wrote:
On 05/14/2018 11:01 AM, Simon Goldschmidt wrote:
On 14.05.2018 10:17, Marek Vasut wrote:
On 05/14/2018 10:03 AM, Simon Goldschmidt wrote:
On 12.05.2018 22:27,
Hi,
On 14 May 2018 at 03:09, Alex Kiernan wrote:
> Move strcmp_l1() to include/common.h so we can can call it from elsewhere.
> Move FASTBOOT_VERSION to include/fastboot.h so when we merge the UDP code
> we only have one definition.
>
> Signed-off-by: Alex Kiernan
On 14 May 2018 at 10:38, Tuomas Tynkkynen wrote:
> All of the debug output from this file is squished to one line. Fix
> it.
>
> Signed-off-by: Tuomas Tynkkynen
> ---
> drivers/pci/pci_auto_common.c | 4 ++--
> 1 file changed, 2 insertions(+), 2
On 14 May 2018 at 03:09, Alex Kiernan wrote:
> Add fs_get_type_name so we can get the current filesystem type.
>
> Signed-off-by: Alex Kiernan
> ---
>
> Changes in v3:
> - new
>
> Changes in v2: None
>
> fs/fs.c | 5 +
> include/fs.h | 5
Hi Alex,
On 14 May 2018 at 03:09, Alex Kiernan wrote:
> Merge UDP fastboot support from AOSP:
>
>
> https://android.googlesource.com/platform/external/u-boot/+/android-o-mr1-iot-preview-8
>
> Signed-off-by: Alex Kiernan
> Signed-off-by: Alex
Hi Tuomas,
On 14 May 2018 at 10:38, Tuomas Tynkkynen wrote:
> Currently, if we happen to allocate an address requiring 64 bits to a
> device only supporting 32-bit BARs, the address eventually gets silently
> truncated to 32 bits. Avoid this by adding a new flag to
>
On 14 May 2018 at 03:09, Alex Kiernan wrote:
> Overriding fastboot_set_reboot_flag() in arch/arm/mach-omap2/boot-common.c
> leaves it applying all boards that derive from this, not just the ones which
> have support for Android bootloader flow. Move the weak function
On 14 May 2018 at 03:09, Alex Kiernan wrote:
> Compiling on a 64 bit target the arguments to _fb_nand_write are
> incompatible:
>
> drivers/fastboot/fb_nand.c: In function ‘_fb_nand_write’:
> drivers/fastboot/fb_nand.c:101:42: warning: passing argument 3 of
>
On 14 May 2018 at 09:47, Tuomas Tynkkynen wrote:
> Now that U-Boot works fine with highmem enabled, there is no need to
> tell users to disable highmem.
>
> Signed-off-by: Tuomas Tynkkynen
> ---
> doc/README.qemu-arm | 7 +++
> 1 file
On 14 May 2018 at 03:09, Alex Kiernan wrote:
> Rename fb_set_reboot_flag to fastboot_set_reboot_flag so it matches
> all other fastboot code in the global name space. Fix the guards around
> them so that they're dependent on FASTBOOT, not just USB_FUNCTION_FASTBOOT.
>
>
Hi,
On 13 May 2018 at 16:45, Eugeniu Rosca wrote:
> Hi Simon,
>
> On Mon, May 14, 2018 at 08:00:40AM +1000, Simon Glass wrote:
>> Hi,
>>
>> On 13 May 2018 at 03:13, Eugeniu Rosca wrote:
>> > From: Rob Herring
>> >
>> > This adds
On 14 May 2018 at 03:09, Alex Kiernan wrote:
> CONFIG_FASTBOOT_GPT_NAME and CONFIG_FASTBOOT_MBR_NAME are always defined
> by Kconfig if you're compiling this code, so remove these redundant
> defaults.
>
> Signed-off-by: Alex Kiernan
> ---
>
>
Hi Duncan,
On 14 May 2018 at 09:26, Duncan Hare wrote:
> From: Simon Glass
>
>
> To: Duncan Hare
> Cc: "joe.hershber...@ni.com" ; U-Boot Mailing List
>
> Sent: Sunday, May 13, 2018 3:00 PM
>
On 14 May 2018 at 09:47, Tuomas Tynkkynen wrote:
> Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with
> the 'highmem=off' parameter passed to QEMU's virt machine. The reason is
> that when 'highmem' is not disabled, QEMU appends 64-bit a memory
>
On 14 May 2018 at 09:47, Tuomas Tynkkynen wrote:
> Now that PCI devices work with highmem-enabled QEMU emulation, bump up
> the RAM size in the MMU tables to gain access to the full 255 GB of RAM
> potential instead of the puny 3 GB.
>
> Signed-off-by: Tuomas Tynkkynen
Hi Marek,
On 13 May 2018 at 16:22, Marek Vasut wrote:
> On 05/14/2018 12:02 AM, Simon Glass wrote:
>> On 13 May 2018 at 08:23, Marek Vasut wrote:
>>> Add support for loading U-Boot and optionally FDT from a fitImage
>>> in SPL by using the full fitImage support
Hi Ramon,
On 14 May 2018 at 01:10, Ramon Fried wrote:
> On Mon, May 14, 2018 at 1:00 AM, Simon Glass wrote:
>> Hi Ramon,
>>
>> On 12 May 2018 at 20:15, Ramon Fried wrote:
>>> This patch adds pinmux and pinctrl driver for TLMM
>>>
Hi Michal,
> -Original Message-
> From: Michal Simek [mailto:michal.si...@xilinx.com]
> Sent: 10 May 2018 09:21
> To: Ibai Erkiaga Elorza ; u-boot@lists.denx.de
> Cc: michal.si...@xilinx.com
> Subject: Re: [PATCH v2] arm: zynq: Add initial support for Avnet MiniZed
>
>
On 14.05.2018 17:51, Stefan Roese wrote:
On 14.05.2018 11:06, Marek Vasut wrote:
On 05/14/2018 11:01 AM, Simon Goldschmidt wrote:
On 14.05.2018 10:17, Marek Vasut wrote:
On 05/14/2018 10:03 AM, Simon Goldschmidt wrote:
On 12.05.2018 22:27, Marek Vasut wrote:
The global data are in the
On Mon, May 14, 2018 at 08:01:57PM +0200, Miquel Raynal wrote:
> Hi Simon,
>
> On Wed, 2 May 2018 20:31:48 -0600, Simon Glass wrote:
>
> > Hi Miquel,
> >
> > On 2 May 2018 at 02:59, Miquel Raynal wrote:
> > > There are no changes in this commit
Hi Eugeniu, Masahiro,
> > So, it seems like all the trailing white-space from above files
> > disappeared on your branch, after applying the patches from the
> > email client (who did this?...).
> > I didn't expect that trailing white-space to be of any value for the
> > test results, but it
Hi Simon,
On Wed, 2 May 2018 20:31:48 -0600, Simon Glass wrote:
> Hi Miquel,
>
> On 2 May 2018 at 02:59, Miquel Raynal wrote:
> > There are no changes in this commit unless:
> > 1/ a new organization of the code as follow.
> > 2/ some *very* basic
Hello List,
i am new here and in embedded development (more a Javascript/Java developer)
currently i have to port android to an raspberry pi cm3 and like to use
u-boot.
what works already:
* boot into u-boot
* boot into android
* boot into u-boot into android
so far so good. now i have to
Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.
Signed-off-by: Tuomas Tynkkynen
All of the debug output from this file is squished to one line. Fix
it.
Signed-off-by: Tuomas Tynkkynen
---
drivers/pci/pci_auto_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci_auto_common.c
On Mon, May 14, 2018 at 3:47 PM Tom Rini wrote:
> On Mon, May 14, 2018 at 06:42:41PM +0530, Jassi Brar wrote:
> > Hi Tom,
> >
> > On Tue, May 8, 2018 at 10:45 PM, Tom Rini wrote:
> > > On Fri, Apr 06, 2018 at 12:05:24PM +0530, jassisinghb...@gmail.com
I had a bit more time to look into this and it looks as if we have two
problem-spots...
First, there's a type-mismatch between ram_info.size (a size_t) and gd.ram_size
(phys_size_t).
While we can increase the size of a phys_size_t to 64bit (by defining
CONFIG_PHYS_64BIT),
the size_t will
On 14.05.2018 11:06, Marek Vasut wrote:
On 05/14/2018 11:01 AM, Simon Goldschmidt wrote:
On 14.05.2018 10:17, Marek Vasut wrote:
On 05/14/2018 10:03 AM, Simon Goldschmidt wrote:
On 12.05.2018 22:27, Marek Vasut wrote:
The global data are in the .data section, so there's no point in
Now that U-Boot works fine with highmem enabled, there is no need to
tell users to disable highmem.
Signed-off-by: Tuomas Tynkkynen
---
doc/README.qemu-arm | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/doc/README.qemu-arm
Now that PCI devices work with highmem-enabled QEMU emulation, bump up
the RAM size in the MMU tables to gain access to the full 255 GB of RAM
potential instead of the puny 3 GB.
Signed-off-by: Tuomas Tynkkynen
---
board/emulation/qemu-arm/qemu-arm.c | 2 +-
1 file
Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with
the 'highmem=off' parameter passed to QEMU's virt machine. The reason is
that when 'highmem' is not disabled, QEMU appends 64-bit a memory
resource to the PCI controller's regions property in DT in addition to
the 32-bit PCI
That can happen if duplicate UDP packet arrived, and that's not uncommon.
Anyway, we ignore packets with rpc_id lower than last we sent for other
requests, so it makes sense to do that for read request as well.
Signed-off-by: Vasily Khoruzhick
---
net/nfs.c | 2 ++
1 file
Travis report (prior to a final rebase onto your latest master) is at
https://travis-ci.org/ptomsich/u-boot-rockchip/builds/378666041
> On 14 May 2018, at 17:32, Dr. Philipp Tomsich
> wrote:
>
> Tom,
>
> I have two fixes for regressions (that
Tom,
I have two fixes for regressions (that unfortunately ended up in the last
release) in my tree,
ready for a merge onto master.
Thanks,
Philipp.
The following changes since commit ca70cbabdcd19bf157ae4fa984559b126071ccff:
Merge git://git.denx.de/u-boot-marvell (2018-05-14 08:52:48
Along with using new mode it fixes eMMC instability on Pinebook
Signed-off-by: Vasily Khoruzhick
---
arch/arm/include/asm/arch-sunxi/mmc.h | 6 +-
drivers/mmc/sunxi_mmc.c | 11 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git
That is necessary for using automatic calibration on A64 eMMC.
Signed-off-by: Vasily khoruzhick
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/mmc/sunxi_mmc.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/Kconfig
eMMC seems to require new clocking mode and calibration on A64,
otherwise it is pretty unstable on some boards (e.g. Pinebook)
with some eMMCs.
v2: - improve comment about calibration for eMMC on A64
- simplify ifdef-s around configuring delays
Vasily Khoruzhick (2):
sunxi-mmc: use new
From: Simon Glass
To: Duncan Hare
Cc: "joe.hershber...@ni.com" ; U-Boot Mailing List
Sent: Sunday, May 13, 2018 3:00 PM
Subject: Re: net: [U-Boot] [PATCH v10 3/3] Adding wget
Please setup a
On Mon, May 14, 2018 at 05:21:38PM +0200, Marek Vasut wrote:
> On 05/14/2018 05:14 PM, Evan Thompson wrote:
> > On Sun, May 13, 2018 at 12:03 PM, Marek Vasut wrote:
> >>
> >> btw doesn't CONFIG_BLOCK_CACHE offer similar service, but for everyone
> >> and on block level ? I
On 05/14/2018 05:14 PM, Evan Thompson wrote:
> On Sun, May 13, 2018 at 12:03 PM, Marek Vasut wrote:
>>
>> btw doesn't CONFIG_BLOCK_CACHE offer similar service, but for everyone
>> and on block level ? I recall looking for ext4 fs speed up , but then
>> ultimately used
Add PWM definition to sun50i-a64.dtsi
Signed-off-by: Vasily Khoruzhick
---
arch/arm/dts/sun50i-a64.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 65a344d9ce..a82a3d89af 100644
---
Hi Tom,
(Cc'ing Chris)
On 14.05.2018 17:11, Tom Rini wrote:
On Mon, May 14, 2018 at 01:58:59PM +0200, Stefan Roese wrote:
Hi Tom,
please pull the following MVEBU related patches from Marek and
Chris.
Thanks,
Stefan
The following changes since commit
This commit adds basic support for PWM found on Allwinner A64.
It can be used for pwm_backlight driver (e.g. for Pinebook)
Signed-off-by: Vasily Khoruzhick
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/include/asm/arch-sunxi/pwm.h | 12 ++
This series introduces a PWM driver for Allwinner A64.
This driver can be used to control backlight on Pinebook
v4: use the same binding as in Linux
Vasily Khoruzhick (2):
pwm: sunxi: add support for PWM found on Allwinner A64
dts: sunxi: add PWM node for sun50i
On Sun, May 13, 2018 at 12:03 PM, Marek Vasut wrote:
>
> btw doesn't CONFIG_BLOCK_CACHE offer similar service, but for everyone
> and on block level ? I recall looking for ext4 fs speed up , but then
> ultimately used CONFIG_BLOCK_CACHE which did it for me.
I was unaware
On Mon, May 14, 2018 at 01:58:59PM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following MVEBU related patches from Marek and
> Chris.
>
> Thanks,
> Stefan
>
> The following changes since commit 62d77cea31216cad526e5f45c88e8377efc6fcae:
>
> mmc: Improve tinification (2018-05-13
> On 14 May 2018, at 16:53, Mark Kettenis wrote:
>
>> From: Philipp Tomsich
>> Date: Mon, 14 May 2018 15:22:06 +0200
>>
>> Following the conversion of the SPDX license tags, a number of files
>> compiled with -pedantic now
On Mon, May 14, 2018 at 04:53:49PM +0200, Mark Kettenis wrote:
> > From: Philipp Tomsich
> > Date: Mon, 14 May 2018 15:22:06 +0200
> >
> > Following the conversion of the SPDX license tags, a number of files
> > compiled with -pedantic now generate warnings
> From: Philipp Tomsich
> Date: Mon, 14 May 2018 15:22:06 +0200
>
> Following the conversion of the SPDX license tags, a number of files
> compiled with -pedantic now generate warnings similar to the following
> for using C99-style '//' comments in ISO C90
On Mon, May 14, 2018 at 03:22:06PM +0200, Philipp Tomsich wrote:
> Following the conversion of the SPDX license tags, a number of files
> compiled with -pedantic now generate warnings similar to the following
> for using C99-style '//' comments in ISO C90 code:
>
> tools/gen_eth_addr.c:1:1:
On Mon, May 14, 2018 at 03:31:03PM +0200, Michal Simek wrote:
> On 11.5.2018 21:22, Tom Rini wrote:
> > On Fri, May 11, 2018 at 03:16:56PM +0200, Michal Simek wrote:
> >
> >> Hi Tom,
> >>
> >> please pull these changes to your tree.
> >> Buildman looks good and travis build is not showing any
On Mon, May 14, 2018 at 06:42:41PM +0530, Jassi Brar wrote:
> Hi Tom,
>
> On Tue, May 8, 2018 at 10:45 PM, Tom Rini wrote:
> > On Fri, Apr 06, 2018 at 12:05:24PM +0530, jassisinghb...@gmail.com wrote:
> >
> >> From: Jassi Brar
> >>
> >> Provide an
This reverts commit 819f1e081c527d2d02cdaeec0027384688cf5de0.
This check was introduced in order to cope with the size limitation we had
when we were still using the raw environment in MMC. However, this
introduces padding as well, which can result in an overly huge binary if
one wants to flash
> Since b0ba1e7e9d9b9441a18048ec67a3b3100c096975
> (rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC)
> Ethernet no longer probes on RK3288.
>
> Add no-ops for GMAC clocks observed to be requested which match the
> clk_enable cases in RK3368 and RK3399.
>
>
Add missing reset property in quadspi node.
Signed-off-by: Patrice Chotard
---
Changes in v2: None
arch/arm/dts/stm32f746.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 8581df9a2778..4845279ccfca
Use dev_read_xxx() instead of old manner fdt_xxx() API
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c
From: Christophe Kerello
Quad-SPI interface is able to manage 2 spi nor devices.
FSEL bit selects the flash memory to be addressed in single flash mode.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
In some situation, QSPI controller is already configured by an early
boot stage, adding reset support will insure that QSPI controller is
started from a pristine state.
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 15 +++
From: Christophe Kerello
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.12-rc1.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.17-rc1.
Signed-off-by: Patrice Chotard
---
Changes in v2:
_ remove "update mode management" patch, will be reworked and
submitted separately
From: Christophe Kerello
Add "st,stm32f469-qspi" compatible which is used on kernel side.
This will be necessary when DT will be synchronised from kernel.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
As all platforms which uses this driver have CONFIG_CLK flag
enable in their defconfig, we can remove it from driver code.
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff
Sort include files by alphabetical order
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index
From: Patrick Delaunay
Fix parameters function alingemnt
Fix variable declaration
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 31
This series :
_ removes useless CONFIG_CLK flag
_ fixes checkpatch warnings
_ sorts include files in alphabetical order
_ align DT bindings with kernel in DT and in driver code
_ add chip select management
_ uses dev_read_xxx API
_ add reset support
Changes in v2:
_ remove "update
From: Rajan Vaja
Existing EEMI version is to as 1.0 (available from xilinx v2018.1
version). Update required API version to match with EEMI API version.
New PMUFW version is required for operations with programmable logic.
Signed-off-by: Rajan Vaja
ZynqMP emulation platforms are no longer tested and supported that's why
remove macros and code around.
Signed-off-by: Michal Simek
---
arch/arm/cpu/armv8/zynqmp/clk.c | 4
arch/arm/cpu/armv8/zynqmp/cpu.c | 4
On 11.5.2018 21:22, Tom Rini wrote:
> On Fri, May 11, 2018 at 03:16:56PM +0200, Michal Simek wrote:
>
>> Hi Tom,
>>
>> please pull these changes to your tree.
>> Buildman looks good and travis build is not showing any issue too.
>> https://travis-ci.org/michalsimek/u-boot/builds/377645974
>>
>>
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