Simon Goldschmidt schrieb am Mo., 29.
Okt. 2018, 21:47:
> Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM")
> broke those socfpga boards that keep the bootcounter at the
> end of the internal SRAM as the bootcounter needs 8 bytes
> by default and thus the very first SPL call to
Auer, Lukas 於 2018年10月29日 週一 下午8:13寫道：
>
> Hi Rick,
>
> On Mon, 2018-10-29 at 11:16 +0800, Rick Chen wrote:
> > Auer, Lukas 於 2018年10月27日 週六
> > 上午12:32寫道：
> > >
> > > Hi Rick,
> > >
> > > On Mon, 2018-10-22 at 16:16 +0800, Andes wrote:
> > > > From: Rick Chen
> > > >
> > > > AndeStar V5
Auer, Lukas 於 2018年10月30日 週二 上午12:43寫道：
>
> Hi Rick,
>
> On Thu, 2018-10-25 at 15:56 +, Auer, Lukas wrote:
> > Hi Rick,
> >
> > On Thu, 2018-10-25 at 09:16 +0800, Rick Chen wrote:
> > > Auer, Lukas 於 2018年10月24日 週三
> > > 下午10:14寫道：
> > > >
> > > > Hi Rick,
> > > >
> > > > On Wed, 2018-10-24
> > > > Introduce a new Makefile variable for passing LDFLAGS to standalone
> > > > programs. Currently the variable CONFIG_STANDALONE_LOAD_ADDR is
> > > > misued on some archs to pass a specific linker script.
> > >
> > > are there any objections or can I apply this to u-boot-mips/next? Thanks.
>
Hi,
I'm working on custome am33xx based HW which have no external 32KHz
crystal. Anyway I want to use bootcount feature. I was trying to use
internal PRCM CLK_32KHZ clock as source for RTCSS but still when want
to read RTC registers I get data abort.
I adapted this method :
static void
Print information about Aquantia firmware loaded on the phy
Signed-off-by: Valentin Catalin Neacsu
---
drivers/net/phy/aquantia.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 57eede14ce..f4060499c3 100644
If System interface protocol is USXGMII then enable USXGMII autoneg
Signed-off-by: Valentin Catalin Neacsu
---
drivers/net/phy/aquantia.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 6678147545..57eede14ce
On Mon, Oct 29, 2018 at 08:13:37PM +, Joe Hershberger wrote:
> On Mon, Oct 22, 2018 at 2:40 PM Simon Goldschmidt
> wrote:
> >
> > On 22.10.2018 20:53, Joe Hershberger wrote:
> > > Hi Christian,
> > >
> > > On Mon, Oct 1, 2018 at 8:57 AM Christian Gmeiner
> > > wrote:
> > >> Hi Wolfgang
> >
Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM")
broke those socfpga boards that keep the bootcounter at the
end of the internal SRAM as the bootcounter needs 8 bytes
by default and thus the very first SPL call to
board_init_f_alloc_reserve overwrites the bootcounter.
This patch
On Mon, Oct 22, 2018 at 2:40 PM Simon Goldschmidt
wrote:
>
> On 22.10.2018 20:53, Joe Hershberger wrote:
> > Hi Christian,
> >
> > On Mon, Oct 1, 2018 at 8:57 AM Christian Gmeiner
> > wrote:
> >> Hi Wolfgang
> >>
> >>> In message <20181001094646.11539-1-christian.gmei...@gmail.com> you wrote:
>
Hey all,
It's two weeks until v2018.11 release and today I've put out rc3. The
delta is pretty reasonable and at this point I can really hold things to
either obviously correct fixes or bugfixes/regression fixes/Kconfig
migrations that can be proven out.
Thanks all!
--
Tom
signature.asc
On Mon, Oct 29, 2018 at 08:50:24PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> Changes for v2:
> - Fix "sunxi: disable Pine A64 model detection code on other boards"
> changes.
>
> thanks,
> Jagan.
>
> The following changes since commit
On Thu, Oct 25, 2018 at 10:41 PM Grygorii Strashko
wrote:
>
> Update TI Keystone 2 driver to re-use common mdio lib.
>
> Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
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On Thu, Oct 25, 2018 at 10:38 PM Grygorii Strashko
wrote:
>
> Update TI CPSW driver to re-use common mdio lib
>
> Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
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On Thu, Oct 25, 2018 at 10:39 PM Grygorii Strashko
wrote:
>
> All existing TI SoCs network HW have similar MDIO implementation, so
> introduce common mdio support library which can be reused by TI networking
> drivers.
>
> Signed-off-by: Grygorii Strashko
> ---
> drivers/net/ti/Makefile|
On Mon, Oct 29, 2018 at 8:04 AM Hannes Schmelzer wrote:
>
>
> On 10/26/18 5:38 AM, Grygorii Strashko wrote:
> > All existing TI SoCs network HW have similar MDIO implementation, so
> > introduce common mdio support library which can be reused by TI networking
> > drivers.
> >
> > Signed-off-by:
On Thu, Oct 25, 2018 at 10:43 PM Grygorii Strashko
wrote:
>
> Update to use SPDX license identifier.
>
> Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
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On Thu, Oct 25, 2018 at 10:42 PM Grygorii Strashko
wrote:
>
> Networking support for all TI K2 boards converted to use DM model and
> CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop
> unused non DM K2 networking code.
>
> Signed-off-by: Grygorii Strashko
Acked-by: Joe
On Thu, Oct 25, 2018 at 10:41 PM Grygorii Strashko
wrote:
>
> Convert DRIVER_TI_KEYSTONE_NET to Kconfig.
>
> Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
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On Thu, Oct 25, 2018 at 10:40 PM Grygorii Strashko
wrote:
>
> Add drivers/net/ti/ folder and move all TI's code in this folder for better
> maintenance.
>
> Signed-off-by: Grygorii Strashko
Acked-by: Joe Hershberger
___
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On Mon, Oct 29, 2018 at 1:04 AM Cédric Le Goater wrote:
>
> Hello Joe,
>
> On 10/22/18 9:55 PM, Joe Hershberger wrote:
> > Hi Cedric,
> >
> > On Tue, Oct 16, 2018 at 4:32 AM Cédric Le Goater wrote:
> >>
> >> Signed-off-by: Cédric Le Goater
> >> Reviewed-by: Joel Stanley
> >> ---
> >>
> >>
As a preparation for merging the socfpga gen5 devicetree files
from Linux, this patch makes the dwapb gpio driver work correctly
without the 'bank-name' property on the gpio-controller nodes.
This property is not present in the Linux drivers and thus is not
present in the Linux devicetrees. It is
Add -u-boot.dtsi files to keep the current U-Boot behaviour:
- add u-boot,dm-pre-reloc where required
- disable watchdog
- set uart clock frequency
- add gpio bank-name properties
where appropriate:
- make qspi work (add alias for spi0, fix compatible for flash)
- enable usb (status okay, add
Linux uses "cdns,qspi-nor" as compatible string for the cadence
qspi driver. To support Linux device trees, add this compatible
to the U-Boot driver while keeping the old "cadence,qspi" for
backwards compatibility for U-Boot device trees until all are
fixed.
Also update the binding docs
This series merges socfpga gen5 dts and dtsi files from linux
while keeping U-Boot behaviour. Changes in those files that need
fixing (mostly in -u-boot.dtsi board files) are:
- watchdog is now enabled
- ethernet, spi and i2c aliases removed from socfpga.dtsi
- gpio bank names not available
- mmc
On Mon, Oct 29, 2018 at 1:17 AM Cédric Le Goater wrote:
>
> Signed-off-by: Cédric Le Goater
Acked-by: Joe Hershberger
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While migrating individual status led usages to Kconfig stuff,
a (random) value was introduced for this board which does not
work but produces the following error message during boot:
__led_init: failed requesting GPIO59!
Since Kconfig does not seem to accept a define as this point,
but the mxs
CONFIG_CMD_BOOTEFI is enabled by Kconfig default, but rarely
used on this board/platform.
So let's disable it for the boards default config.
This also saves around 16 KiB in the final u-boot.sb.
Signed-off-by: Michael Heimpold
---
configs/mx23_olinuxino_defconfig | 1 +
1 file changed, 1
This prevents the warning message
"No arch specific invalidate_icache_all available!"
during boot.
Signed-off-by: Michael Heimpold
---
configs/mx23_olinuxino_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index
Testing of v2018.11-rc2 on this board uncovered three small "issues"
I would like to see fixed. See individual patch descriptions for details.
Michael Heimpold (3):
configs: drop CMD_CACHE from mx23_olinuxino_defconfig
configs: mx23_olinuxino_defconfig: fix status led definition
configs:
On Fri, Oct 26, 2018 at 7:53 AM Stefan Roese wrote:
>
> This patch adds ethernet support for the MIPS based Mediatek MT76xx SoCs
> (e.g. MT7628 and MT7688), including a minimum setup of the integrated
> switch. This driver is loosly based on the driver version included in
> this MediaTek github
On Thu, Oct 25, 2018 at 2:34 PM Hannes Schmelzer wrote:
>
>
> On 10/25/2018 08:41 PM, Joe Hershberger wrote:
> > On Thu, Oct 25, 2018 at 9:26 AM Hannes Schmelzer
> > wrote:
> Hi Joe,
> >
> >> +* reading the current address failed
> >> +*/
> >> + if (!ret_val &&
> From: U-Boot On Behalf Of Bin Meng
> Sent: mercredi 24 octobre 2018 15:37
> Subject: [U-Boot] [PATCH 03/13] gpio: Remove DM_FLAG_PRE_RELOC flag in
> various drivers
>
> When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before
> relocation. However due to a bug in the DM
> From: U-Boot On Behalf Of Bin Meng
> Sent: mercredi 24 octobre 2018 15:36
>
> When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before
> relocation. However due to a bug in the DM core, the flag only takes effect
> when devices are statically declared via U_BOOT_DEVICE().
Hi Miquel,
thank you for review.
On 10/29/2018 11:34 AM, Miquel Raynal wrote:
> Hi Vladimir,
>
> Vladimir Zapolskiy wrote on Fri, 19 Oct 2018 03:21:18
> +0300:
>
>> Testing and analysis shows that at the moment LPC32xx NAND SLC driver
>> can not get PL080 DMA backbone support in SPL build,
On Mon, 29 Oct 2018 16:29:43 +0100
Loic Devulder wrote:
> Hi!
>
> On 10/28/18 10:19 PM, Vasily Khoruzhick wrote:
> > Pinebook is a laptop produced by Pine64, with USB-connected
> > keyboard, USB-connected touchpad and an eDP LCD panel connected via
> > a RGB-eDP bridge from Analogix.
> >
> >
Hi Miquel,
On 10/29/2018 11:29 AM, Miquel Raynal wrote:
> Hi Vladimir,
>
> Vladimir Zapolskiy wrote on Fri, 19 Oct 2018 03:21:05
> +0300:
>
>> Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC
>> driver only, as a preparation for potential removal or replacement of
>> the
Hi Rick,
On Thu, 2018-10-25 at 15:56 +, Auer, Lukas wrote:
> Hi Rick,
>
> On Thu, 2018-10-25 at 09:16 +0800, Rick Chen wrote:
> > Auer, Lukas 於 2018年10月24日 週三
> > 下午10:14寫道：
> > >
> > > Hi Rick,
> > >
> > > On Wed, 2018-10-24 at 13:47 +0800, Rick Chen wrote:
> > > > Rick Chen 於
Hi!
On 10/28/18 10:19 PM, Vasily Khoruzhick wrote:
> Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
> USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
> bridge from Analogix.
>
> Signed-off-by: Vasily Khoruzhick
> Acked-by: Maxime Ripard
> Tested-by:
Hi Tom,
Please pull this PR.
Changes for v2:
- Fix "sunxi: disable Pine A64 model detection code on other boards"
changes.
thanks,
Jagan.
The following changes since commit 1ed3c0954bd160dafcad8847a51c3ddd5f992f51:
Merge branch 'master' of git://git.denx.de/u-boot-samsung (2018-10-23
On Sat, Oct 27, 2018 at 10:39 AM Icenowy Zheng wrote:
>
> The previous commit which disables Pine64 detection logic on non-Pine64
> board has an error and prevents non-ARM64 boards from building.
>
> Fix the build error on non-ARM64 boards by adjusting the position of a
> '}'.
I would have run
On 10/28/18 06:01, Bin Meng wrote:
> On Thu, Oct 25, 2018 at 2:46 PM Poonam Aggrwal wrote:
>
> Thanks Poonam!
>
> York, I believe these 2 patches need be included in the v2018.11 release.
>
They are in my queue.
York
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Hi Andy,
On Fri, Oct 26, 2018 at 8:41 PM Andy Shevchenko
wrote:
>
> On Fri, Oct 26, 2018 at 3:23 PM Bin Meng wrote:
> > On Thu, Oct 25, 2018 at 10:55 PM Bin Meng wrote:
> > > On Thu, Oct 11, 2018 at 5:36 PM Andy Shevchenko
> > > wrote:
>
> > > > That's what I was suspecting after looking how
Change static array to const when it is useful to save memory
(move stm32f7_setup=0x18 from .data to .rodata section)
Signed-off-by: Patrick Delaunay
---
drivers/i2c/stm32f7_i2c.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/stm32f7_i2c.c
Solve alignments issues in the driver to avoid
checkpatch error.
Signed-off-by: Patrick Delaunay
---
drivers/i2c/stm32f7_i2c.c | 31 ---
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index
On Sun, Oct 28, 2018 at 09:13:04PM +0100, Daniel Schwierzeck wrote:
>
>
> Am 23.09.18 um 19:15 schrieb Daniel Schwierzeck:
> > Currently the OBJCOPYFLAGS are cleared when assigning "-O srec"
> > or "-O binary" for standalone programs. All flags set by arch-specific
> > Makefiles are lost. This
On Sun, Oct 28, 2018 at 09:12:22PM +0100, Daniel Schwierzeck wrote:
>
>
> Am 23.09.18 um 19:15 schrieb Daniel Schwierzeck:
> > Introduce a new Makefile variable for passing LDFLAGS to standalone
> > programs. Currently the variable CONFIG_STANDALONE_LOAD_ADDR is
> > misued on some archs to pass
On 10/26/18 5:38 AM, Grygorii Strashko wrote:
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
drivers.
Signed-off-by: Grygorii Strashko
---
drivers/net/ti/Makefile| 2 +-
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Priyanka
> Jain
> Sent: Monday, October 29, 2018 3:01 PM
> To: u-boot@lists.denx.de; York Sun
> Cc: Priyanka Jain ; Pankit Garg
> ; Wasim Khan ; Sriram Dash
>
> Subject: [U-Boot] [PATCH][v2] armv8:
Hi Rick,
On Mon, 2018-10-29 at 11:16 +0800, Rick Chen wrote:
> Auer, Lukas 於 2018年10月27日 週六
> 上午12:32寫道：
> >
> > Hi Rick,
> >
> > On Mon, 2018-10-22 at 16:16 +0800, Andes wrote:
> > > From: Rick Chen
> > >
> > > AndeStar V5 provide mcache_ctl register which can configure
> > > I/D cache as
LX2160AQDS is a development board that supports LX2160A
family SoCs. This patch add base support for this board.
Signed-off-by: Wasim Khan
Signed-off-by: Sriram Dash
Signed-off-by: Pankaj Bansal
---
Notes:
This patch depends on following patches:
[1]
some dpmacs in armv8a based freescale layerscape SOCs can be
configured via both serdes(sgmii, xfi, xlaui etc) bits and via
EC*_PMUX(rgmii) bits in RCW.
e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits
Now if a dpmac is enabled by
The terminal escape sequence ESC [ ; H is used to set the cursor
position. According to the ECMA 48 standard the upper left corner in the
escape sequences is [1, 1]. The video uclass uses [0, 0] as upper left
corner.
Signed-off-by: Heinrich Schuchardt
---
drivers/video/vidconsole-uclass.c | 8
Fixes possible resource leak in dm_test_tee() reported by Coverity.
Reported-by: Coverity (CID: 184175)
Signed-off-by: Jens Wiklander
---
test/dm/tee.c | 35 ++-
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git a/test/dm/tee.c b/test/dm/tee.c
index
fsl_ddr_board_options is generally defined in board
board's ddr.c, but some boards like lx2160ardb board
does not need this function.
Defining fsl_ddr_board_options as weak function to
resolve compilation errors for such boards.
Signed-off-by: Priyanka Jain
---
drivers/ddr/fsl/options.c | 7
Hi Vladimir,
Vladimir Zapolskiy wrote on Fri, 19 Oct 2018 03:21:18
+0300:
> Testing and analysis shows that at the moment LPC32xx NAND SLC driver
> can not get PL080 DMA backbone support in SPL build, because SPL NAND
> loaders operate with subpage (ECC step to be precisely) reads, and
> this
LX2160ARDB is an evaluation board that supports LX2160A
family SoCs. This patch add base support for this board.
Signed-off-by: Wasim Khan
Signed-off-by: Yogesh Gaur
Signed-off-by: Meenakshi Aggarwal
Signed-off-by: Vabhav Sharma
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
Hi Vladimir,
Vladimir Zapolskiy wrote on Fri, 19 Oct 2018 03:21:05
+0300:
> Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC
> driver only, as a preparation for potential removal or replacement of
> the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same
>
LX2160ARDB is an evaluation board that supports LX2160A
family SoCs. This patch add base support for this board.
Signed-off-by: Wasim Khan
Signed-off-by: Yogesh Gaur
Signed-off-by: Meenakshi Aggarwal
Signed-off-by: Vabhav Sharma
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
LX2160A Soc is based on Layerscape Chassis Generation 3.2 Architecture.
Features:
16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
two 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
4 TZASC instances, etc.
SoC personalites:
NXP layerscape architecture Chassis 3.2 builds upon chassis3
architecture with changes like DDR Memory map change,
removal of IFC and support of upto 8 I2C controller.
Patch add README.lsch3_2 and the above changes under
macro CONFIG_NXP_LSCH3_2.
Signed-off-by: Sriram Dash
Signed-off-by:
Hi Jagan,
Jagan Teki wrote on Tue, 23 Oct 2018
16:40:05 +0530:
> On Thu, Oct 11, 2018 at 3:05 PM Miquel Raynal
> wrote:
> >
> > Today way is to rely on CMD_NAND to be selected and from the root
> > Makefile compile what is in drivers/mtd/nand/raw.
> >
> > While this will work most of the time
On Mon, Oct 29, 2018 at 12:56:46AM +, Andre Przywara wrote:
> This updates the .dts and .dtsi files used in U-Boot to what will become
> the new DTs in Linux 4.20 (anytime soon).
> Those updates are not too useful for U-Boot itself, but keep the DTs
> consistent and allow to directly pass
On Sun, Oct 28, 2018 at 02:26:12PM -0700, Vasily Khoruzhick wrote:
> From: Icenowy Zheng
>
> DE2 SoCs can support LCDs up to 1080p (e.g. A64), and 3MHz step won't
> let PLL_VIDEO be high enough for them.
>
> Use 6MHz step for PLL_VIDEO when using DE2, to satisfy 1080p LCD.
>
> Signed-off-by:
Hi Rick,
On Mon, Oct 29, 2018 at 11:22 AM Rick Chen wrote:
>
> Bin Meng 於 2018年10月25日 週四 下午9:36寫道：
> >
> > Hi Rick,
> >
> > On Thu, Oct 25, 2018 at 11:27 AM Rick Chen wrote:
> > >
> > > Bin Meng 於 2018年10月25日 週四 上午11:16寫道：
> > > >
> > > > Hi Rick,
> > > >
> > > > On Thu, Oct 25, 2018 at 11:11
On Sun, Oct 28, 2018 at 12:26:18AM +0800, Icenowy Zheng wrote:
> 在 2017-10-31二的 09:09 +0100，Maxime Ripard写道：
> > On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
> > > When I use Orange Pi Prime to do some heavy compliation tasks, the
> > > gcc
> > > compiler sometimes mysteriously
On Sat, Oct 27, 2018 at 01:11:00PM +0800, Icenowy Zheng wrote:
> From: Jun Nie
>
> Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit
> 512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one
> powering-only) and a miniHDMI port.
>
> Signed-off-by: Icenowy
On Sat, Oct 27, 2018 at 01:08:56PM +0800, Icenowy Zheng wrote:
> The previous commit which disables Pine64 detection logic on non-Pine64
> board has an error and prevents non-ARM64 boards from building.
>
> Fix the build error on non-ARM64 boards by adjusting the position of a
> '}'.
>
> Fixes:
Hi Simon
On Fri, 14 Sep 2018 at 19:18, Simon Shields wrote:
>
> Hi Anand,
>
> On Fri, Sep 14, 2018 at 05:31:38PM +0530, Anand Moon wrote:
> > Hi Simon,
> > On Fri, 14 Sep 2018 at 08:00, Simon Shields wrote:
> > >
> > > Hi Anand,
> > >
> > > On Thu, Sep 13, 2018 at 08:39:52PM +0530, Anand Moon
The algorithm in the ast2500_calc_clock_config() routine suffers from
integer rounding and the requested rate does not get the appropriate
set of Numerator, Denumerator, Post Divider parameters.
This is the case for the D2-PLL clock used by the MAC controllers in
RGMII mode. The requested rated
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
arch/arm/dts/ast2500-evb.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index
Signed-off-by: Cédric Le Goater
---
Changes since v4 :
- defined a custom wait_for_bit_*() macro
drivers/net/ftgmac100.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index bf8600814690..ec46add1d35c 100644
This is a large update of the AST2500 SoC DTS file bringing it to the
level of commit 927c2fc2db19 :
Author: Joel Stanley
Date:Sat Jun 2 01:18:53 2018 -0700
ARM: dts: aspeed: Fix hwrng register address
There are some differences on the compatibility property names. scu,
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index ec46add1d35c..798977616756 100644
---
Implement the MDIO bus read/write functions using the readl_poll_timeout()
routine, initialize the bus and scan for the PHY. RGMII and RMII mode
are supported.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 380
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Simon Glass
Acked-by: Joe Hershberger
---
drivers/clk/aspeed/clk_ast2500.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 31
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 67a7c73503c5..78cd9df62986 100644
---
Use simple arrays under the device priv structure to hold the RX and
TX descriptors and handle memory coherency by invalidating or flushing
the d-cache when required.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 141
The driver is based on the previous one and the code is only adapted
to fit the driver model. The support for the Faraday ftgmac100
controller is the same with MAC and MDIO bus support for RGMII/RMII
modes.
Configuration is updated to enable compile again. At this stage, the
driver compiles but
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h
index 439b14d71e4b..9a789e4d5bee 100644
---
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.h | 154
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h
index
Hello,
This series re-enables the Faraday ftgmac100 controller driver and its
Aspeed variant as as one can find on the OpenPOWER platforms. The
driver is largely reworked to support the driver model and also adds
the MDIO bus and phylib support. It was tested on the AST2500 evb.
Git tree
Hello Joe,
On 10/22/18 9:55 PM, Joe Hershberger wrote:
> Hi Cedric,
>
> On Tue, Oct 16, 2018 at 4:32 AM Cédric Le Goater wrote:
>>
>> Signed-off-by: Cédric Le Goater
>> Reviewed-by: Joel Stanley
>> ---
>>
>> Changes since v3 :
>>
>> - introduced a ftgmac100_wait_for_txdone() function
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