slre_match() checks if caps == NULL. In this case it does not try to
update it. So there is no need to create a buffer caps which we do not
evaluate.
Signed-off-by: Heinrich Schuchardt
---
Tested successfully on Travis CI:
https://travis-ci.org/xypron2/u-boot/builds/483161121
---
lib/hashtable.c
Hi Tom,
> On Tue, Jan 22, 2019 at 11:43:33PM +0100, Lukasz Majewski wrote:
> > On Thu, 17 Jan 2019 13:43:04 -0600
> > "Andrew F. Davis" wrote:
> >
> > > CLI support with the HUSH parser is not currently SPL safe due to
> > > it's use of realloc. That function is not defined for SPLs that
> > >
On Wed, Jan 23, 2019 at 7:20 AM wrote:
>
> From: Tien Fong Chee
>
> Most of the time SPL only needs very simple FAT reading, so having
> CONFIG_IS_ENABLED(FAT_WRITE) to exclude it from SPL build would help
> to save 64KiB default max clustersize from memory.
>
> Signed-off-by: Tien Fong Chee
Re
On Wed, Jan 23, 2019 at 7:20 AM wrote:
>
> From: Tien Fong Chee
>
> Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
> obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
> SPL and U-Boot.
>
> Signed-off-by: Tien Fong Chee
Reviewed-by: Simon Goldschmidt
> ---
> arch/
> Am 23.01.2019 um 06:11 schrieb AKASHI Takahiro :
>
> Heinrich,
>
>> On Tue, Jan 22, 2019 at 10:13:52PM +0100, Heinrich Schuchardt wrote:
>>> On 1/22/19 10:48 AM, Alexander Graf wrote:
>>>
>>>
On 21.01.19 04:12, AKASHI Takahiro wrote:
HII database protocol is the last missing (majo
From: Tien Fong Chee
CONFIG_SPL_FS_EXT4 can be used to include/exclude the FS EXT4 from
SPL build. Excluding the FS EXT4 from SPL build can help to save 20KiB
memory.
Signed-off-by: Tien Fong Chee
---
changes in v2:
- Changed both config checking SPL_BUILD and FS_EXT4 to
CONFIG_IS_ENABLED(F
From: Tien Fong Chee
Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPLY_FS_EXT4 so both
obj-$(CONFIG_$(SPL_)FS_EXT4) and CONFIG_IS_ENABLED(FS_EXT4) can be
used to control the build in both SPL and U-Boot.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-k3/am6_init.c| 2 +-
arch/arm/
From: Tien Fong Chee
Most of the time SPL only needs very simple FAT reading, so having
CONFIG_IS_ENABLED(FAT_WRITE) to exclude it from SPL build would help
to save 64KiB default max clustersize from memory.
Signed-off-by: Tien Fong Chee
---
Changes in v2:
- Changed to CONFIG_IS_ENABLED(FAT_W
From: Tien Fong Chee
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
SPL and U-Boot.
Signed-off-by: Tien Fong Chee
---
arch/arm/cpu/armv8/zynqmp/Kconfig| 2 +-
arch/arm/mach-imx/spl.c
Heinrich,
On Tue, Jan 22, 2019 at 10:13:52PM +0100, Heinrich Schuchardt wrote:
> On 1/22/19 10:48 AM, Alexander Graf wrote:
> >
> >
> > On 21.01.19 04:12, AKASHI Takahiro wrote:
> >> HII database protocol is the last missing (major?) piece of code so that
> >> we can run unmodified EDKII's shell
On Tue, Jan 22, 2019 at 10:19:35AM +0100, Alexander Graf wrote:
>
>
> On 22.01.19 02:38, AKASHI Takahiro wrote:
> > Alex,
> >
> > On Mon, Jan 21, 2019 at 02:34:43PM +0100, Alexander Graf wrote:
> >> On 01/21/2019 08:49 AM, AKASHI Takahiro wrote:
> >>> "devices" command prints all the uefi variab
On Tue, Jan 22, 2019 at 10:18:58AM +0100, Alexander Graf wrote:
>
>
> On 22.01.19 02:02, AKASHI Takahiro wrote:
> > Alex,
> >
> > On Mon, Jan 21, 2019 at 02:07:31PM +0100, Alexander Graf wrote:
> >> On 01/21/2019 08:49 AM, AKASHI Takahiro wrote:
> >>> Currently, there is no easy way to add or mo
From: Atish Patra
Compute the baud rate multipler with more precision.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
drivers/serial/serial_sifive.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions
From: Atish Patra
The readme guide describes the procedure to build, flash and boot Linux
using U-boot on HiFive Unleashed. It also explains the current state of
U-boot support and future action items.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
doc/README.sifive-fu540 | 302
From: Atish Patra
Currently, timer driver is bound only for hart0.
There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.
The timer driver should be bound for boot hart.
Signed-off-by: Atish Pat
From: Atish Patra
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
In this case, instead of failing we should just skip baudrate
config by returning zero.
Signed-off-by: Atish Patra
Signed-off-by: Anu
This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Atish Patra
Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.
Based on code written by Wesley Terpstra
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
https://g
This patch does following fixes in MACB ethernet driver
for using it on RISC-V systems (particularly QEMU sifive_u
machine):
1. asm/arch/clk.h is not available on RISC-V port so include
it only for non-RISC-V systems.
2. Don't fail in macb_enable_clk() if clk_enable() returns
-ENOSYS because
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
drivers/clk/Makefile | 4 +-
drivers/clk/clk_fixed_factor.c | 72 +
From: Atish Patra
Fix MID bit field check to correctly identify all GEM hardwares.
The check is updated as per macb driver in Linux location:
/drivers/net/ethernet/cadence/macb_main.c:259
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
This patch adds asm/dma-mapping.h for Linux-like DMA mappings
APIs required by some of the drivers (such as, Cadance MACB
Ethernet driver).
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
arch/riscv/include/asm/dma-mapping.h | 38 +++
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot
DMA mapping APIs will generate DMA addresses beyond 4GB. This
breaks DMA programming in 32bit DMA capable devices (such as
Cadence MACB ethernet). For example, If DRAM is more then 2GB
on QEMU sifive_u machine then Cadence MACB ethe
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.
This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errat
From: Anup Patel
This patchset adds SiFive Freedom Unleashed (FU540) support
to RISC-V U-Boot.
The patches are based upon latest RISC-V U-Boot tree
(git://git.denx.de/u-boot-riscv.git) at commit id
91882c472d8c0aef4db699d3f2de55bf43d4ae4b
All drivers namely: SiFive PRCI, SiFive Serial, and Cada
Hi Tom,
Please pull some nds32 updates:
1. Support nds32 prebuilt toolchain.
2. Fix some compile issues.
3. Fix dts mmc node compatible string.
https://travis-ci.org/rickchen36/u-boot-nds32/builds/482800645
Thanks
Rick
The following changes since commit e8ddbefccd0193340ebbe6fe53c5490624b7c11
Hi Philipp, Simon,
Is it possible for this patch to be merged?
Right now, two board owner does not like this patch but both of you
says this patch do not affect your board, and most of other boards are
maintained by me, and I have share why I need this patch and why this patch
not affect so
On 21/01/2019 10:31, Jagan Teki wrote:
> Enable DM_MMC for all Allwinner SoCs, this will eventually
> enable BLK.
>
> Also removed DM_MMC enablement in few parts of sunxi
> configurations.
>
> Signed-off-by: Jagan Teki
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> arch/arm/Kconfig
On 21/01/2019 10:31, Jagan Teki wrote:
> Unlike other Allwinner SoC's, A80 comes with different ahb
> gate clock offset values and also has mmc common controller.
> So support them via driver data.
As mentioned in the fix I sent, this requires the clock and reset
support for CCU devices themselves
Some Allwinner clock devices have parent clocks and reset gates
themselves, which need to be activated for them to work.
Add some code to just assert all resets and enable all clocks given.
This should enable the A80 MMC config clock, which requires both to be
activated. The full CCU devices typic
Hi,
there were two issues mentioned on the ML with the MMC gates series
(many thanks to the diligent testers!):
1) When booting from SPI or via USB FEL, any MMC device (SD or eMMC) is
not working, as we miss the pinmux setup. Fix this is patch 1 in a
slightly hackish, but working way.
2) The odd
Enabling DM_MMC skips the call to mmc_pinmux_setup() in board.c, as this
is supposed to be handled by the MMC driver, using DT information.
However we don't have a pinctrl driver yet, but would still like to keep
the working pinmux setup for our MMC devices. So bring this particular
call back to t
On 21/01/2019 10:31, Jagan Teki wrote:
> Unlike other Allwinner SoC's, H6 comes with different
> clock and reset control offset values. So support them
> via driver data.
Nit: It's just the mod clock offset we care about here, the rest is
already handled by the new clock driver.
>
> Cc: Jaehoon
arch/x86/lib/string.c contains assembler implementations of memcpy(),
memmove(), and memset() written for i386. Don't use it on x86_64.
Signed-off-by: Heinrich Schuchardt
---
arch/x86/include/asm/string.h | 31 +++
arch/x86/lib/Makefile | 2 +-
2 files change
On 21/01/2019 10:31, Jagan Teki wrote:
> Added H5, A64 compatible for mmc and emmc.
As mentioned, could be merged with the previous patch.
> Cc: Jaehoon Chung
> Signed-off-by: Jagan Teki
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/mmc/sunxi_mmc.c | 8
> 1 file change
On 21/01/2019 10:31, Jagan Teki wrote:
> Add emmc compatible for A83T SoC.
You could merge this one with the next patch.
> Cc: Jaehoon Chung
> Signed-off-by: Jagan Teki
Reviewed-by: Andre Przywara
Cheers,
Andre.
> ---
> drivers/mmc/sunxi_mmc.c | 4
> 1 file changed, 4 insertions(+)
>
Hello Simon, hello Bin,
on qemu-x86_64 (and not any other architecture) we received an error in
a unit test.
Once I undefined __HAVE_ARCH_MEMMOVE the error disappeared. Same happens
if I use my own memmove() code in lib/slre.c.
The memmove() that fails is in function relocate() in lib/slre.c.
S
On 21/01/2019 10:31, Jagan Teki wrote:
> From: Andre Przywara
>
> Add the MMC clock gates and reset bits for all the Allwinner SoCs.
> This allows them to be used by the MMC driver.
>
> We don't advertise the mod clock yet, as this is still handled by the
> MMC driver.
>
> Signed-off-by: Andre
On Tue, Jan 22, 2019 at 4:54 PM Carlo Caione wrote:
>
> On 22/01/19 22:21, Joe Hershberger wrote:
> >On Wed, Jan 16, 2019 at 12:06 PM Carlo Caione wrote:
> >>
> >> Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
> >> to allow access to the MMD PHY registers.
> >>
> >> The
On Mon, Nov 26, 2018 at 11:59 PM Simon Goldschmidt
wrote:
>
> On Tue, Nov 27, 2018 at 4:15 AM Chris Packham wrote:
> >
> > On Mon, Nov 26, 2018 at 9:15 PM Simon Goldschmidt
> > wrote:
> > >
> > > On Mon, Nov 26, 2018 at 9:00 AM Chris Packham
> > > wrote:
> > > >
> > > > No mainline board enabl
On Tue, Jan 22, 2019 at 11:43:33PM +0100, Lukasz Majewski wrote:
> On Thu, 17 Jan 2019 13:43:04 -0600
> "Andrew F. Davis" wrote:
>
> > CLI support with the HUSH parser is not currently SPL safe due to it's
> > use of realloc. That function is not defined for SPLs that use
> > SYS_MALLOC_SIMPLE. C
On Tue, Nov 27, 2018 at 12:10 AM Simon Goldschmidt
wrote:
>
> On Tue, Nov 27, 2018 at 4:19 AM Chris Packham wrote:
> >
> > On Mon, Nov 26, 2018 at 9:12 PM Simon Goldschmidt
> > wrote:
> > >
> > > On Mon, Nov 26, 2018 at 9:00 AM Chris Packham
> > > wrote:
> > > >
> > > > ether_crc was added to
On 21/01/2019 10:31, Jagan Teki wrote:
> Now CLK and RESET driver for Allwinner SoC are available,
> so add the relevant operations on mmc sunxi driver.
>
> Cc: Jaehoon Chung
> Signed-off-by: Jagan Teki
> ---
> Changes for v3:
> - Grab changes for ML
>
> drivers/mmc/sunxi_mmc.c | 52 ++
On Tue, Jan 22, 2019 at 5:14 PM Joe Hershberger
wrote:
>
> On Tue, Nov 6, 2018 at 6:17 AM Valentin-catalin Neacsu
> wrote:
> >
> > Print information about Aquantia firmware loaded on the phy.
> >
> > Signed-off-by: Valentin Catalin Neacsu
> > ---
> > V2:
> > - Fix typo in title. (Clement Peron)
On Tue, Nov 6, 2018 at 6:17 AM Valentin-catalin Neacsu
wrote:
>
> Print information about Aquantia firmware loaded on the phy.
>
> Signed-off-by: Valentin Catalin Neacsu
> ---
> V2:
> - Fix typo in title. (Clement Peron)
>
> drivers/net/phy/aquantia.c | 21 +
> 1 file change
On 22/01/19 22:21, Joe Hershberger wrote:
On Wed, Jan 16, 2019 at 12:06 PM Carlo Caione wrote:
Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.
The MMD PHY registers can be accessed by two means:
1. Using two new MMD access fun
On Thu, 17 Jan 2019 13:43:04 -0600
"Andrew F. Davis" wrote:
> CLI support with the HUSH parser is not currently SPL safe due to it's
> use of realloc. That function is not defined for SPLs that use
> SYS_MALLOC_SIMPLE. CLI support can be built in to SPL and some
> functions do work, but use of so
On Thu, 17 Jan 2019 13:43:03 -0600
"Andrew F. Davis" wrote:
> Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
> This ensures the files and features are only built into the right
> build for which they are enabled. Using the macros to simplify this
> patch was made possible
On Thu, 17 Jan 2019 13:43:02 -0600
"Andrew F. Davis" wrote:
> The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
> meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
> to allow for cleaner use in code.
>
Acked-by: Lukasz Majewski
> Signed-off-by: Andrew F. Davis
> Reviewed-b
On Mon, 21 Jan 2019 17:55:51 +
Jack Mitchell wrote:
> Hi,
>
> Has anyone successfully used DFU on an rk3288 or dwc2_otg based board?
> When trying to download a binary to the board over DFU it currently
> seems to timeout and the transfer fails. I have tested the
> firefly-rk3288 and also th
Hi Jean-Jacques,
> If the host does not respond in time, the initialization fails.
> However the usb ether driver will still be registered. This will make
> usb_gadget_probe_driver() fail the next time the initialization is
> attempted because it cannot find an available UDC.
>
> Fixing this by c
On Tue, 2019-01-22 at 12:31 +, Anup Patel wrote:
> > -Original Message-
> > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Tuesday, January 22, 2019 5:21 PM
> > To: s...@chromium.org; bmeng...@gmail.com; r...@andestech.com; Anup
> > Patel ; joe.hershber...@ni.com;
>
On Wed, Jan 16, 2019 at 12:06 PM Carlo Caione wrote:
>
> Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
> to allow access to the MMD PHY registers.
>
> The MMD PHY registers can be accessed by two means:
>
> 1. Using two new MMD access function hooks in the PHY driver. The
On Wed, Jan 16, 2019 at 8:07 AM Carlo Caione wrote:
>
> According to the datasheet to access the extended registers we have to:
>
> 1. Write Register 31 Data = 0x0XYZ (Page 0xXYZ)
> 2. Read/Write the target Register Data
> 3. Write Register 31 Data = 0x or 0xa42 (switch back to IEEE
>Stand
On Tue, Dec 18, 2018 at 7:22 PM Vladimir Oltean wrote:
>
> * According to the AR8031 and AR8035 datasheets, smartEEE mode
> (active by default) makes the PHY enter sleep after a configurable
> idle time. It does this autonomously, without LPI (Low Power Idle)
> signals coming from MAC. AR802
Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the
same script for both SPL and TPL. Add logic to scripts/Makefile.spl to
pass in the right value when preprocessing the script.
Cc: Stefano Babic
Cc: Fabio Estevam
Per Kever Yang, 32768 is a reasonable max size for TPL on RK3288.
Cc: Kever Yang
Cc: Philipp Tomsich
Signed-off-by: Tom Rini
---
arch/arm/mach-rockchip/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 6dc8e3a01
Rather than checking for CONFIG_TPL_BUILD and then re-defining
CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly.
Cc: York Sun
Cc: Po Liu
Cc: Qiang Zhao
Cc: Timur Tabi
Signed-off-by: Tom Rini
---
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 4
include/configs/C29XPCIE.h
On Tue, Dec 18, 2018 at 7:22 PM Vladimir Oltean wrote:
>
> * These are convenience functions for accessing PHY MMD registers
> through clause 22 (indirectly through registers 0xD and 0xE),
> and are exported in the Linux phylib as well.
>
> Signed-off-by: Vladimir Oltean
Acked-by: Joe Hershb
On Tue, Dec 4, 2018 at 12:55 AM Chris Packham wrote:
>
> Some existing device trees don't specify a phy-mode so fallback to GMII
> when a phy-mode is not provided.
>
> Signed-off-by: Chris Packham
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Bo
On Tue, Dec 4, 2018 at 10:39 AM Aditya Prayoga wrote:
>
> This patch add GPIO configuration support in mvneta driver.
> Driver will handle PHY reset. GPIO pins should be set in device tree.
>
> Ported from mvpp2x
> [https://patchwork.ozlabs.org/patch/799654/]
>
> Initial discussion to port the cha
On Thu, Dec 27, 2018 at 11:59 AM Ramon Fried wrote:
>
> Some architectures (MIPS) needs mapping to access IOMEM.
> Fix that.
>
> Fixes: f1dcc19b213d ("net: macb: Convert to driver model")
>
> Signed-off-by: Ramon Fried
Acked-by: Joe Hershberger
___
U-
On Thu, Nov 29, 2018 at 1:05 PM Andreas Pretzsch wrote:
>
> For KSZ9021, all skew register fields are 4-bit wide.
> For KSZ9031, the clock skew register fields are 5-bit wide.
>
> The common code in ksz90x1_of_config_group calculating the combined
> register value checks if the requested value is
On Wed, Nov 21, 2018 at 5:09 AM Baruch Siach wrote:
>
> Current code forces all ports on a given Ethernet device to use the same
> mdio device. In practice different ports might be wired to separate mdio
> devices. Move the mdio device from the container struct mvpp2 to the per
> port struct mvpp2
On Tue, Oct 30, 2018 at 5:44 AM Valentin-catalin Neacsu
wrote:
>
> If System interface protocol is USXGMII then enable USXGMII autoneg
> Signed-off-by: Valentin Catalin Neacsu
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Boot@lists.denx.de
http
On Tue, Nov 6, 2018 at 6:17 AM Valentin-catalin Neacsu
wrote:
>
> Print information about Aquantia firmware loaded on the phy.
>
> Signed-off-by: Valentin Catalin Neacsu
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Boot@lists.denx.de
https://li
On Wed, Nov 21, 2018 at 5:08 AM Baruch Siach wrote:
>
> Current mdio base lookup code relies on a 'reg' property at the upper CP
> node. There is no 'reg' property there in current DT files of Armada
> CP110. Use ofnode_get_addr() instead since it provides proper DT address
> translation.
>
> Cc:
On Wed, Nov 21, 2018 at 8:57 AM Thomas RIENOESSL
wrote:
>
> When dealing with two ethernet ports and having "netretry" set
> to "once", it could occur that the connection (e.g. an ARP
> request) failed, hence the status of the netloop was
> "NETLOOP_FAIL". Due to the setting of "netretry", the net
On 1/22/19 10:48 AM, Alexander Graf wrote:
>
>
> On 21.01.19 04:12, AKASHI Takahiro wrote:
>> HII database protocol is the last missing (major?) piece of code so that
>> we can run unmodified EDKII's shell and UEFI SCT on EFI-enabled u-boot.
>>
>> The original code was initially written by Leif a
On 1/22/19 8:39 PM, Simon Glass wrote:
> Hi Alex,
>
> On Tue, 22 Jan 2019 at 22:08, Alexander Graf wrote:
>>
>>
>>
>> On 22.01.19 09:29, AKASHI Takahiro wrote:
>>> Alex, Simon,
>>>
>>> Apologies for my slow response on this matter,
>>>
>>> On Fri, Jan 11, 2019 at 08:57:05AM +0100, Alexander Graf
Our implementation of GetNextVariableName() relies on
CONFIG_REGEX=y. So EFI_LOADER has to select it.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index b921ea8821..f5de005ff8 100
Hi Alex,
On Tue, 22 Jan 2019 at 22:08, Alexander Graf wrote:
>
>
>
> On 22.01.19 09:29, AKASHI Takahiro wrote:
> > Alex, Simon,
> >
> > Apologies for my slow response on this matter,
> >
> > On Fri, Jan 11, 2019 at 08:57:05AM +0100, Alexander Graf wrote:
> >>
> >>
> >> On 11.01.19 05:29, AKASHI T
On 1/22/19 10:24 AM, Alexander Graf wrote:
>
>
> On 21.01.19 12:43, Heinrich Schuchardt wrote:
>> From: AKASHI Takahiro
>>
>> There is a bug in efi variables test.
>> Fix it with some cosmetic improvements.
>>
>> Please note that efi variables test still fails at QueryVariableInfo()
>> and GetVa
Our current implementation of GetNextVariableName() first collects all EFI
variables. If none is found at all hexport_r() returns a zero length string
terminated by \0 and the value 1 as number of bytes in the returned buffer.
In this case GetNextVariableName() has to return EFI_NOT_FOUND.
Signed
Am 22.01.2019 um 18:31 schrieb Joe Hershberger:
On Tue, Jan 22, 2019 at 1:26 AM Simon Goldschmidt
wrote:
Hi Joe,
On Tue, Jan 15, 2019 at 10:00 AM Joe Hershberger wrote:
On Thu, Nov 22, 2018 at 9:58 AM Simon Goldschmidt
wrote:
ETHADDR_WILDCARD is defined as the same value in both env_fla
On Tue, Jan 22, 2019 at 08:33:59PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Enable TI K3 AM65x PSI-L, Ring Accelerator and UDMA drivers
>
> Signed-off-by: Grygorii Strashko
Reviewed-by: Tom Rini
--
Tom
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On Tue, Jan 22, 2019 at 08:33:57PM +0530, Vignesh R wrote:
> The UDMA-P is intended to perform similar (but significantly upgraded)
> functions
> as the packet-oriented DMA used on previous SoC devices. The UDMA-P module
> supports the transmission and reception of various packet types.
> The UDM
On Tue, Jan 22, 2019 at 08:33:56PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Add TI Communications Port Programming Interface (CPPI) 5
> interface description and helpers
>
> Signed-off-by: Grygorii Strashko
> Signed-off-by: Vignesh R
Reviewed-by: Tom Rini
--
Tom
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On Tue, Jan 22, 2019 at 08:33:58PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Add DT node for MCU NAVSS its components to get DMA working on AM654
> SoC.
>
> Signed-off-by: Grygorii Strashko
Reviewed-by: Tom Rini
--
Tom
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Hi Philipp,
On Wed, 23 Jan 2019 at 05:51, Stephen Warren wrote:
>
> Simon,
>
> In the latest u-boot-dm.git, sandbox fails as follows:
>
> => ut dm bootcount
> Test: dm_test_bootcount: bootcount.c
> /var/lib/jenkins/workspace/u-boot-denx_uboot_dm-master-build/src/u-boot/test/dm/bootcount.c:18,
> d
On Tue, Jan 22, 2019 at 08:33:54PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> Texas Instruments' System Control Interface (TI-SCI) Message Protocol
> abstracts management of NAVSS resources, like PSI-L pairing and
> unpairing, UDMAP tx/rx/flow configuration and Rings.
>
> This patch
On Tue, Jan 22, 2019 at 08:33:55PM +0530, Vignesh R wrote:
> From: Grygorii Strashko
>
> The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
> enable straightforward passing of work between a producer and a consumer.
> There is one RINGACC module per NAVSS on TI AM65x SoCs.
>
On Tue, Jan 22, 2019 at 1:26 AM Simon Goldschmidt
wrote:
>
> Hi Joe,
>
> On Tue, Jan 15, 2019 at 10:00 AM Joe Hershberger
> wrote:
> >
> > On Thu, Nov 22, 2018 at 9:58 AM Simon Goldschmidt
> > wrote:
> > >
> > > ETHADDR_WILDCARD is defined as the same value in both env_flags.h
> > > and env_cal
On Tue, Jan 22, 2019 at 04:48:19PM +0100, Jean-Jacques Hiblot wrote:
> This feature is now supported by the main config for am335x_evm:
> am335x_evm_defconfig
>
> Signed-off-by: Jean-Jacques Hiblot
>
Reviewed-by: Tom Rini
--
Tom
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___
On Tue, Jan 22, 2019 at 04:48:17PM +0100, Jean-Jacques Hiblot wrote:
> This USB port is mainly used for RNDIS and DFU. To be able to use it with
> DM_USB and DM_USB_GADGET, we need to provide a dr_mode value in the DTS.
>
> Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
--
Tom
si
On Tue, Jan 22, 2019 at 04:48:18PM +0100, Jean-Jacques Hiblot wrote:
> The AM335x ROM boot is able to download the SPL from a RNDIS connection
> on USB0. To enable a full RNDIS boot flow (romboot -> SPL -> u-boot -> ..),
> we can use USB_ETHER in SPL and u-boot.
> However this increase the size of
Simon,
In the latest u-boot-dm.git, sandbox fails as follows:
=> ut dm bootcount
Test: dm_test_bootcount: bootcount.c
/var/lib/jenkins/workspace/u-boot-denx_uboot_dm-master-build/src/u-boot/test/dm/bootcount.c:18,
dm_test_bootcount(): 0 == uclass_get_device(UCLASS_BOOTCOUNT, 0, &dev):
Expected
On Tue, Jan 22, 2019 at 04:40:19PM +, Andre Przywara wrote:
> On Tue, 22 Jan 2019 17:32:27 +0100
> Alexander Graf wrote:
>
> > On 31.12.18 17:59, Jagan Teki wrote:
> > > Sopine has Winbond SPI flash, so enable the same to use
> > > flash on Sopine board.
> > >
> > > Cc: TL Lim
> > > Signed-
On Tue, 22 Jan 2019 17:32:27 +0100
Alexander Graf wrote:
> On 31.12.18 17:59, Jagan Teki wrote:
> > Sopine has Winbond SPI flash, so enable the same to use
> > flash on Sopine board.
> >
> > Cc: TL Lim
> > Signed-off-by: Jagan Teki
> > ---
> > .../dts/sun50i-a64-sopine-baseboard-u-boot.dtsi
On 22.01.19 17:28, Alexander Graf wrote:
>
>
> On 22.01.19 17:17, Oskari Lemmelä wrote:
>> Hi,
>>
>> On 22.1.2019 16.54, Alexander Graf wrote:
>>>
>>> On 05.01.19 18:52, Oskari Lemmela wrote:
Minimal changes to support sun6i based Allwinner SOCs
Changes are based to SPL driver arch/ar
Even though we don't use CONFIG_SYS_CACHELINE_SIZE in ARC-specific code
it is used a lot in different drivers for alignment purposes.
So we define it and make much more drivers at least compilable for ARC.
Signed-off-by: Alexey Brodkin
---
arch/arc/include/asm/cache.h | 3 +++
1 file changed, 3
"i" gets incremented before we're entering loop body
and effectively we iterate from 1 to 8 instead of 0 to 7.
This way we:
a) Skip the first line of struct hs_versions
b) Go over it and access memory beyond the structure
Signed-off-by: Alexey Brodkin
---
arch/arc/lib/cpu.c | 4 ++--
1 file c
On 31.12.18 17:59, Jagan Teki wrote:
> Sopine has Winbond SPI flash, so enable the same to use
> flash on Sopine board.
>
> Cc: TL Lim
> Signed-off-by: Jagan Teki
> ---
> .../dts/sun50i-a64-sopine-baseboard-u-boot.dtsi | 16
> configs/sopine_baseboard_defconfig
On 22.01.19 17:17, Oskari Lemmelä wrote:
> Hi,
>
> On 22.1.2019 16.54, Alexander Graf wrote:
>>
>> On 05.01.19 18:52, Oskari Lemmela wrote:
>>> Minimal changes to support sun6i based Allwinner SOCs
>>> Changes are based to SPL driver arch/arm/mach-sunxi/spl_spi_sunxi.c
>>>
>>> Signed-off-by: Osk
Hi,
On 22.1.2019 16.54, Alexander Graf wrote:
>
> On 05.01.19 18:52, Oskari Lemmela wrote:
>> Minimal changes to support sun6i based Allwinner SOCs
>> Changes are based to SPL driver arch/arm/mach-sunxi/spl_spi_sunxi.c
>>
>> Signed-off-by: Oskari Lemmela
> I just tried to see if this patch gives
On 1/21/19 12:19 AM, Mario Six wrote:
> Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options.
>
> Signed-off-by: Mario Six
>
> ---
I browse through the entire patch set. The patches look good. Since NXP
doesn't make new mpc83xx SoCs and I have no board to verify, I don't
comme
This feature is now supported by the main config for am335x_evm:
am335x_evm_defconfig
Signed-off-by: Jean-Jacques Hiblot
---
configs/am335x_evm_usbspl_defconfig | 55 -
1 file changed, 55 deletions(-)
delete mode 100644 configs/am335x_evm_usbspl_defconfig
diff --g
The AM335x is able to get its SPL using a RNDIS connection. The goal of
this series is to make this feature available out of the box for the
am335x-evm
There is already a defconfig to handle this use case, but with DM USB
it becomes easy to activate the feature in the main defconfig. So the last
p
The AM335x ROM boot is able to download the SPL from a RNDIS connection
on USB0. To enable a full RNDIS boot flow (romboot -> SPL -> u-boot -> ..),
we can use USB_ETHER in SPL and u-boot.
However this increase the size of the SPL past its limit. So removing the
unused SPL_EXT_SUPPORT.
Signed-off-b
This USB port is mainly used for RNDIS and DFU. To be able to use it with
DM_USB and DM_USB_GADGET, we need to provide a dr_mode value in the DTS.
Signed-off-by: Jean-Jacques Hiblot
---
arch/arm/dts/am335x-evm-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/am33
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