On 2/9/19 1:17 AM, Tom Rini wrote:
> On Fri, Feb 08, 2019 at 11:19:46AM +0100, Marek Vasut wrote:
>
>> SD/MMC and filesystem fixes below ...
>>
>> The following changes since commit e5fd39c886485e3dec77f4438a6e364c2987cf5f:
>>
>> Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockch
On 2/8/19 11:51 PM, Dalon L Westergreen wrote:
> On Fri, 2019-02-08 at 21:36 +0100, Simon Goldschmidt wrote:
>>
>>
>> Am Fr., 8. Feb. 2019, 21:28 hat Dalon L Westergreen <
>> dalon.westergr...@linux.intel.com> geschrieben:
>>> On Thu, 2019-02-07 at 22:23 +0100, Simon Goldschmidt wrote:
To clea
On Sat, Feb 9, 2019 at 11:25 AM Marek Vasut wrote:
>
> On 2/7/19 10:23 PM, Simon Goldschmidt wrote:
> > To clean up reset handling for socfpga gen5, let's move the code snippet
> > taking the DDR controller out of reset from SPL to the DDR driver.
> >
> > While at it, port the ddr driver to UCLASS
Hello Simon, hello Philipp,
since patch
Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchip
e5fd39c886485e3dec77f4438a6e364c2987cf5f
booting on the Tinker Board (tinker-rk3288_defconfig) is broken.
There is not even any UART output from SPL.
Best regards
Heinrich
DM_SPI_FLASH should require spi flash interface code for dm
version, so select SPI_FLASH core by default if any board
enabled DM_SPI_FLASH.
This overcome the explicit enablement of CONFIG_SPI_FLASH on
respective boards when DM_SPI_FLASH being used.
Cc: Vignesh R
Signed-off-by: Jagan Teki
---
d
1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
core code which handle both dm and non-dm spi flash code. So
fix the info text to make it clear globally.
2) Since it's flash core it shouldn't depends on legacy SPI,
so remove the 'depends on SPI'
Cc: Vignesh R
Signed-off
CONFIG_SPI is mandatory for SPI support even if the given board
has dm or non-dm versions, so mark CONFIG_SPI as non-dm config
option and move the respective non-dm drivers below to that.
This eventually reduce the explicit CONFIG_SPI enablement for
dm version spi drivers.
Cc: Vignesh R
Signed-o
On Sat, Feb 09, 2019 at 11:04:15AM +0100, Marek Vasut wrote:
> On 2/9/19 1:17 AM, Tom Rini wrote:
> > On Fri, Feb 08, 2019 at 11:19:46AM +0100, Marek Vasut wrote:
> >
> >> SD/MMC and filesystem fixes below ...
> >>
> >> The following changes since commit
> >> e5fd39c886485e3dec77f4438a6e364c2987c
On Sun, Jan 27, 2019 at 04:34:05PM +0200, Igor Opaniuk wrote:
> AVB version 1.1 introduces support for named persistent values
> that must be tamper evident and allows AVB to store arbitrary key-value
> pairs [1].
>
> Introduce implementation of two additional AVB operations
> read_persistent_val
This series add support for Allwinner A31 SPI controller driver.
Compared to previous version[1] separate driver for A31, this patchset
is trying to tune the existing sun4i_spi code by adding register set,
register bits to support both A10, A31 SPI controllers.
Any inputs?
Jagan.
Jagan Teki (1
To drain rx fifo the fifo need to poll till the fifo
count become empty.
The current code is using wait_for_bit logic on control
register with exchange burst mode mask, which is not a
proper way of waiting for draining fifo.
So, add code for polling fifo status register till rxfifo
count become e
- Implement SPI AHB, MOD clocks via ccu_clk_gate for all
supported Allwinner SoCs
- Implement SPI resets via ccu_reset for all supported
Allwinner SoCs.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/clk_a10.c | 10 ++
drivers/clk/sunxi/clk_a10s.c | 7 +++
drivers/clk/sunxi/cl
Allwinner support two different SPI controllers one for A10 and
another for A31 with minimal changes in register offsets and
respective register bits, but the logic for accessing the SPI
master via SPI slave remains nearly similar.
Add enum offsets for register set and register bits, so-that
it ca
Sopine has Winbond SPI flash, so enable the same to use
flash on Sopine board.
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi | 12
configs/sopine_baseboard_defconfig | 4
2 files changed, 16 insertions(+)
create mode 1006
Update the existing register writes using setbits_le32 and
clrbits_le32 in required places.
Signed-off-by: Jagan Teki
---
drivers/spi/sun4i_spi.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c
index 87b
Support fifo_depth via drvdata instead of macro definition, this would
eventually reduce another macro definition for new SPI controller fifo
depth support addition.
Signed-off-by: Jagan Teki
---
drivers/spi/sun4i_spi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/dr
Enable SUN4I_SPI by default for ARCH_SUNXI, so that board
that would require to enable DM_SPI that eventually enable
the SUN4I_SPI driver.
Signed-off-by: Jagan Teki
---
drivers/spi/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 15207d2
Add CLK support to enable AHB and MOD SPI clocks on sun4i_spi driver.
Note, that the code will enable and disable clock in claim and release
calls to make proper clock and reset handling between claiming and
releasing SPI bus.
Signed-off-by: Jagan Teki
---
drivers/spi/sun4i_spi.c | 56 +
Add A31 spi controller support for existing sun4i_spi driver via driver
data, this would simply add A31 register along with proper register bits
via enum sets.
Signed-off-by: Jagan Teki
---
drivers/spi/Kconfig | 4 +-
drivers/spi/sun4i_spi.c | 84 -
2
- drop unused macros.
- use base instead of base_addr, for better code readability
- move .probe and .ofdata_to_platdata functions in required
places to add platdata support in future.
- use sentinel sun4i_spi_ids.
Signed-off-by: Jagan Teki
---
drivers/spi/sun4i_spi.c | 224 +--
On 2/9/19 1:46 PM, Tom Rini wrote:
> On Sat, Feb 09, 2019 at 11:04:15AM +0100, Marek Vasut wrote:
>> On 2/9/19 1:17 AM, Tom Rini wrote:
>>> On Fri, Feb 08, 2019 at 11:19:46AM +0100, Marek Vasut wrote:
>>>
SD/MMC and filesystem fixes below ...
The following changes since commit
After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.
Signed-off-by: Fabio Estevam
---
board/warp7/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/warp7/README b/board/warp7/README
index 60339da543..dcad61fd3d
After the conversion to DM the U-Boot binary is called u-boot-dtb.imx,
so fix the README file accordingly.
Signed-off-by: Fabio Estevam
---
Changes since v1:
- Fix all occurrances
board/warp7/README | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/board/warp7/REA
From: Ondrej Jirman
Patch 1 and 2 are fixes for compilation failures with disabled network
support on sunxi platform.
Patch 3 is a fix for error path bug in decode_timing_property(), I've
found while debugging a missing LCD panel output.
Patch 4 is typo fix.
regards,
Ondřej Jirman
Ondrej Ji
From: Ondrej Jirman
Length may be unitialized when fdt_getprop fails.
Signed-off-by: Ondřej Jirman
---
lib/fdtdec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 18663ce6bd..3510de78e1 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -980,
From: Ondrej Jirman
Signed-off-by: Ondřej Jirman
---
drivers/power/axp818.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c
index c737da1180..834919ddd4 100644
--- a/drivers/power/axp818.c
+++ b/drivers/power/axp818.c
@@ -161,7
From: Ondrej Jirman
Signed-off-by: Ondřej Jirman
---
include/configs/sunxi-common.h | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index b01d1c3c84..d421b93509 100644
--- a/include/configs/sun
From: Ondrej Jirman
Signed-off-by: Ondřej Jirman
---
board/sunxi/board.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 98bc3cd0c1..e918bdf36b 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -774,9 +774,12
Heinrich,
My guess is that this is fallout from David Wu’s new pinctrl driver
(which has really been the bulk of changes in this cycle). I can’t
test or debug on the rk3288 due to a lack of hardware.
I did add fix some issues for the RK3399 (and have more to submit).
The expectation is that I'll
On Thu, Jan 10, 2019 at 3:00 PM Priit Laes wrote:
>
> From: Priit Laes
>
> Starting from revision K the Olimex-Lime2-eMMC boards include
> eMMC 5.x chip. Unfortunately, the internal brom in the A20
> cannot reliably initialize those chips resulting in random
> boot failures on those boards.
>
> T
> On 09.02.2019, at 16:08, Philipp Tomsich
> wrote:
>
> Heinrich,
>
> My guess is that this is fallout from David Wu’s new pinctrl driver
> (which has really been the bulk of changes in this cycle). I can’t
> test or debug on the rk3288 due to a lack of hardware.
If you want to start diggin
On Wed, Dec 19, 2018 at 1:28 AM Vladimir Vid wrote:
>
> Add ID for Macronix mx25u12835f flash.
>
> Signed-off-by: Vladimir Vid
> ---
> drivers/mtd/spi/spi_flash_ids.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
> inde
On Fri, Feb 8, 2019 at 3:33 PM Heiko Schocher wrote:
>
> Add support for SPANSION s25fl064l
>
> Signed-off-by: Heiko Schocher
> ---
>
> Changes in v2:
> - s/s25f064l/s25fl064l
> as Vignesh R suggested
Reviewed-by: Jagan Teki
___
U-Boot mailing list
On Thu, Jan 31, 2019 at 12:51 AM Oskari Lemmela wrote:
>
> Add a boot command to distro boot to support load FIT image
> from SPI flash.
Add some info about why default offsets being used below.
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists
On Tue, Feb 5, 2019 at 7:27 PM Tomas Novotny wrote:
>
> The dram chip on the tablet was changed. The new one requires a lower
> frequency, so change it.
>
> Frequency 564 was also stable in the tests, but use slightly lower one
> to be on a safe side.
New rate? How does it compatible with legacy
On 1/23/19 2:01 PM, Alexander Graf wrote:
>> From: Leif Lindholm
>>
>> This patch provides enough implementation of the following protocols to
>> run EDKII's Shell.efi and UEFI SCT:
>>
>> * EfiHiiDatabaseProtocol
>> * EfiHiiStringProtocol
>>
>> Not implemented are:
>> * ExportPackageLists()
On Mon, Jan 28, 2019 at 2:37 PM Patrick Delaunay
wrote:
>
> This patch update the behavior introduced by
> commit 96907c0fe50a ("dm: spi: Read default speed and mode values from DT")
>
> In case of DT boot, don't read default speed and mode for SPI from
> CONFIG_* but instead read from DT node. Th
On 2/9/19 4:24 PM, Philipp Tomsich wrote:
>
>
>> On 09.02.2019, at 16:08, Philipp Tomsich
>> wrote:
>>
>> Heinrich,
>>
>> My guess is that this is fallout from David Wu’s new pinctrl driver
>> (which has really been the bulk of changes in this cycle). I can’t
>> test or debug on the rk3288 due
On 2/8/19 1:47 PM, Oleksandr wrote:
>
> On 05.02.19 20:56, Marek Vasut wrote:
>
> Hi Marek
Hi,
>> On 1/31/19 6:38 PM, Oleksandr Tyshchenko wrote:
>>> From: Oleksandr Tyshchenko
>>>
>>> Also take care of the fact that Lager and Stout boards use
>>> different serial interface for console.
>> Thi
On 2/8/19 11:52 AM, Oleksandr wrote:
>
> On 05.02.19 20:55, Marek Vasut wrote:
>
> Hi Marek
Hi,
>> On 1/31/19 6:38 PM, Oleksandr Tyshchenko wrote:
>>> From: Oleksandr Tyshchenko
>>>
>>> Also enable PSCI support for Stout and Lager boards where
>>> actually the r8a7790 SoC is installed.
>>>
>>>
On 2/8/19 12:40 PM, Oleksandr wrote:
>
> On 07.02.19 19:19, Oleksandr wrote:
>>
>> On 07.02.19 17:49, Marek Vasut wrote:
>>> On 2/7/19 4:28 PM, Oleksandr wrote:
On 05.02.19 20:48, Marek Vasut wrote:
Hi Marek
>>> Hi,
>>
>> Hi,
>>
>>>
> On 1/31/19 6:38 PM, Oleksandr Tyshchenko wro
On 2/7/19 6:19 PM, Oleksandr wrote:
[...]
> + /* Update registers with correct frequency */
> + writel(freq, TIMER_BASE + TIMER_CNTFID0);
> + asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
> +
> + /* Make sure arch timer is started by se
On Mon, Jan 7, 2019 at 2:24 PM Ye Li wrote:
>
> From: Han Xu
>
> Support to read the flag status in driver to avoid the spi-nor framework
> wait_for_ready hang issue.
>
> Signed-off-by: Han Xu
> ---
> drivers/spi/fsl_qspi.c | 47 +++
> 1 file changed,
On Mon, Jan 7, 2019 at 2:15 PM Ye Li wrote:
>
> When booting from QSPI NOR with DDR mode enabled on i.MX7D/6UL, the
> FLSHCR TDH bit is set to 1 by ROM along with MCR DDR_EN bit set. But
> the read/write/readid/erase operations in the driver will overwrite
> the MCR register, and cause the bits li
On Fri, Jan 25, 2019 at 4:08 PM Chen-Yu Tsai wrote:
>
> As of commit aa8fee415f46 ("ARM: dts: sun8i: h3: Split out
> non-SoC-specific parts of Bananapi M2 Plus") in the Linux kernel, the
> device tree for the Bananapi M2+ has been split into a common dtsi file,
> and an SoC-specific board device t
> On 09.02.2019, at 17:39, Heinrich Schuchardt wrote:
>
> On 2/9/19 4:24 PM, Philipp Tomsich wrote:
>>
>>
>>> On 09.02.2019, at 16:08, Philipp Tomsich
>>> wrote:
>>>
>>> Heinrich,
>>>
>>> My guess is that this is fallout from David Wu’s new pinctrl driver
>>> (which has really been the bu
Hi,
On Fri, 8 Feb 2019 at 01:14, AKASHI Takahiro wrote:
>
> # bootefi doesn't work with this patch set yet
>
> This patch set came from the past discussion[1] on my "removable device
> support" patch and is intended to be an attempt to integrate efi objects
> into u-boot's Driver Model as much s
We check the existence of files with fs_exist(). This function calls
fs_close(). If we do not set the active block device again fs_opendir()
fails and we do not set the flag EFI_FILE_DIRECTORY. Due to this error the
`cd` command in the EFI shell fails.
So let's add the missing set_blk_dev(fh) call
On Fri, Feb 8, 2019 at 10:20 PM Tom Rini wrote:
>
> On Fri, Feb 08, 2019 at 10:05:41PM +0100, Simon Goldschmidt wrote:
> > On Fri, Feb 8, 2019 at 8:46 PM Tom Rini wrote:
> > >
> > > On Wed, Nov 28, 2018 at 09:52:45PM +0100, Simon Goldschmidt wrote:
> > >
> > > > SPL currently does not check uImag
On 19-02-04 08:19:23, Tom Rini wrote:
> On Mon, Feb 04, 2019 at 09:03:43AM -0200, Fabio Estevam wrote:
> > On Mon, Feb 4, 2019 at 7:55 AM Abel Vesa wrote:
> >
> > > If the SPL size (without the dtb appended) is larger then yes, the build
> > > fails.
> > > Trouble is if the SPL (without the dtb
Hi,
Odroid HC1 does not reboot properly (at least from SD card but
I do not expect difference on eMMC), if LDO4/VDD_ADC was turned
off by Linux kernel. This condition is so far always, because
Linux kernel did not enable ADC on ODroid HC1, therefore the
VDD_ADC regulator was turned off as unused.
Detection of board type is done early - before power setup. In case of
Odroid XU3/XU4/HC1 family, the detection is done using ADC which
is supplied by LDO4/VDD_ADC regulator. This regulator could be turned
off (e.g. by kernel before reboot); If ADC is used early, the
regulators are not yet avail
When stopping the ADC_V2_CON1_STC_EN should be cleared.
Signed-off-by: Krzysztof Kozlowski
---
drivers/adc/exynos-adc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c
index d33e3d632afc..12c49fc8cefb 100644
--- a/drivers/ad
Fix detection of Odroid HC1 (Exynos5422) after reboot if kernel disabled
the LDO4/VDD_ADC regulator.
The LDO4 supplies both ADC block and the ADC input AIN9. Voltage on
AIN9 will rise slowly, so be patient and wait for it to stabilize.
First reads on Odroid HC1 return 305, 1207, 1297 and finally
The ADC block requires VDD supply to be on so provide one.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/dts/exynos5422-odroidxu3.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts
b/arch/arm/dts/exynos5422-odroidxu3.dts
index e859dd1b981a..9dfae9066
According to datasheet, the output on LDO regulators will start
appearing after 10-15 us.
Signed-off-by: Krzysztof Kozlowski
---
drivers/power/regulator/s2mps11_regulator.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/power/regulator/s2mps11_regulator.c
b/
LDO27 and LDO35 have 25 mV step, not 50 mV.
Signed-off-by: Krzysztof Kozlowski
---
drivers/power/regulator/s2mps11_regulator.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/power/regulator/s2mps11_regulator.c
b/drivers/power/regulator/s2mps11_regulator.c
index ced504eb1476..72
Changing voltage and enabling regulator might require delays so the
regulator stabilizes at expected level.
Add support for "regulator-ramp-delay" binding which can introduce
required time to both enabling the regulator and to changing the
voltage.
Signed-off-by: Krzysztof Kozlowski
---
drivers
Add startup time to LDO regulators of S2MPS11 PMIC on Odroid XU3/XU4/HC1
family of boards to be sure the voltage is proper before relying on the
regulator.
The datasheet for all the S2MPS1x family is inconsistent here and does
not specify unambiguously the value of ramp delay for LDO. It mentions
On Sat, Feb 9, 2019 at 8:48 PM Abel Vesa wrote:
> So, do I need to resend this with all the R-bs ?
Just realized that you missed to Cc Stefano Babic on
this series.
Stefano,
Should Abel resend this series with you on Cc or can you get review it
from patchwork?
Thanks
Hi Heinrich,
On Fri, 8 Feb 2019 at 03:36, Heinrich Schuchardt wrote:
>
>
>
> On 2/8/19 9:15 AM, AKASHI Takahiro wrote:
> > # bootefi doesn't work with this patch set yet
> >
> > This patch set came from the past discussion[1] on my "removable device
> > support" patch and is intended to be an att
Hi Takahiro,
On Fri, 8 Feb 2019 at 02:14, AKASHI Takahiro wrote:
>
> # bootefi doesn't work with this patch set yet
>
> This patch set came from the past discussion[1] on my "removable device
> support" patch and is intended to be an attempt to integrate efi objects
> into u-boot's Driver Model
Here are the four fixes which do not trigger the sunxi breakage.
The following changes since commit 97276a91db8e98f081a40ddf9dc8f81d4032a756:
Prepare v2019.04-rc1 (2019-02-07 21:32:19 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-sh.git master
for you to fetch cha
We have to ensure while printing UTF16 strings that we do not exceed the
end of the print buffer.
Signed-off-by: Heinrich Schuchardt
---
lib/vsprintf.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 4213441fbf..48304607b7 1006
`bootefi selftest` fails on qemu-x86_defconfig if efi_selftest() is not
invoked using EFI_CALL().
Likewise we call the entry point of EFI payloads with
EFI_CALL(efi_start_image()).
entry_count indicates if we are in U-Boot (1) or in EFI payload code (0).
As we start in U-Boot code the initial val
On Sat, Feb 09, 2019 at 10:56:40PM +0100, Simon Goldschmidt wrote:
> On Fri, Feb 8, 2019 at 10:20 PM Tom Rini wrote:
> >
> > On Fri, Feb 08, 2019 at 10:05:41PM +0100, Simon Goldschmidt wrote:
> > > On Fri, Feb 8, 2019 at 8:46 PM Tom Rini wrote:
> > > >
> > > > On Wed, Nov 28, 2018 at 09:52:45PM +
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