On 11.02.2019 09:22, Eugen Hristev - M18282 wrote:
> From: Eugen Hristev
>
> SPL_GENERATE_ATMEL_PMECC_HEADER will generate a header for the SPL for NAND
> information. The initial stage 1 bootloader will use this header in case the
> NAND flash doesn't support commands to retrieve sector size,
Hi Heiko.
On Mon, Feb 18, 2019 at 7:06 AM Heiko Schocher wrote:
>
> Hello Eran,
>
> Am 13.02.2019 um 19:55 schrieb Eran Matityahu:
> > Add a new definition for ubi_assert and keep
> > the original one in an ifndef __UBOOT__.
> >
> > Signed-off-by: Eran Matityahu
> > ---
> >
On 17.02.2019 06:58, Derald D. Woods wrote:
> This commit guards against applying the PMECC header in a non-NAND_BOOT
> scenario. This a modified version of a previous patch found here:
>
> https://patchwork.ozlabs.org/patch/1009885/
>
> Now that SPL_GENERATE_ATMEL_PMECC_HEADER has been
Hi Chris,
On 15.02.19 23:49, Chris Packham wrote:
For the time being the Armada MSYS SoCs need to use the bin_hdr from the
Marvell U-Boot. Because of this the binary.0 does not contain the image
header that a proper u-boot SPL would so the adjustment introduced by
commit 94084eea3bd3 ("tools:
Hello Eran,
Am 13.02.2019 um 19:55 schrieb Eran Matityahu:
Add a new definition for ubi_assert and keep
the original one in an ifndef __UBOOT__.
Signed-off-by: Eran Matityahu
---
drivers/mtd/ubi/debug.h | 10 ++
1 file changed, 10 insertions(+)
Is there any reason for this
Hello Hannes,
Am 14.02.2019 um 08:54 schrieb Hannes Schmelzer:
The commit 'f48ef0d81aa837a33020f8d61abb3929ba613774' did break I2C
support because requesting the clock for the I2C ip-block isn't
supported during SPL.
To fixup this we add support requesting clocks for:
- i2c0
- i2c1
On Tue, Feb 12, 2019 at 3:44 AM Lukas Auer
wrote:
>
> Harts on RISC-V boot independently and U-Boot is responsible for
> managing them. Functions are called on other harts with
> smp_call_function(), which sends inter-processor interrupts (IPIs) to
> all other harts. Functions are specified with
On 15/02/19 3:21 AM, Andrew F. Davis wrote:
> On 2/13/19 9:32 PM, Lokesh Vutla wrote:
>>
>>
>> On 14/02/19 12:07 AM, Andrew F. Davis wrote:
>>> On HS devices the 512b region of reset isolated memory called
>>> MCU_PSRAM0 is firewalled by default. Until SYSFW is loaded we
>>> cannot use this
From: "Ang, Chee Hong"
'SET_BLOCKLEN' may occasionally fail on first attempt.
This patch enable a small delay in dwmci_send_cmd() on
busy, I/O or CRC error to allow the MMC controller recovers
from the failure/error on subsequent retries.
Signed-off-by: Ang, Chee Hong
---
drivers/mmc/dw_mmc.c
From: "Ang, Chee Hong"
This patch prevent the Stratix 10 FPGA driver incorrectly return the
transaction ID as the mailbox error code. It should always return the
actual mailbox error code from SDM firmware.
Signed-off-by: Ang, Chee Hong
---
drivers/fpga/stratix10.c | 17 ++---
1
On Mon, Feb 18, 2019 at 03:48:58AM +0100, Marek Vasut wrote:
> On 2/13/19 9:36 PM, Tom Rini wrote:
> > On Thu, Feb 14, 2019 at 02:01:02AM +0530, Jagan Teki wrote:
> >> On Mon, Feb 11, 2019 at 10:28 PM Tom Rini wrote:
> >>>
> >>> Hey all,
> >>>
> >>> So as I mentioned back in December[1], I was
The 'phy' reset of gmac device in kernel device tree is not generic
enough for u-boot to use, so we need to overwrite the 'resets' property
as needed. With this device tree fixup and poplar_defconfig changes,
Ethernet starts working on Poplar board.
Signed-off-by: Shawn Guo
Reviewed-by: Igor
On Mon, Feb 18, 2019 at 8:53 AM Rick Chen wrote:
>
> 於 2019年2月18日 週一 上午11:00寫道：
> >
> >
> >
> > > -Original Message-
> > > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de]
> > > Sent: Monday, February 18, 2019 5:55 AM
> > > To: u-boot@lists.denx.de; anup.pa...@wdc.com
> > > Cc:
It adds the driver for HIGMACV300 Ethernet controller found on HiSilicon
SoCs like Hi3798CV200. It's based on a downstream U-Boot driver, but
quite a lot of code gets rewritten and cleaned up to adopt driver model
and PHY API.
Signed-off-by: Shawn Guo
---
drivers/net/Kconfig | 9 +
It adds a Driver Model compatible reset driver for HiSlicon platform.
The driver implements a custom .of_xlate function, and uses .data field
as reset register offset and .id field as bit shift.
Signed-off-by: Shawn Guo
Reviewed-by: Igor Opaniuk
---
drivers/reset/Kconfig | 6 +++
The series adds Ethernet support for Poplar board. It firstly creates
a reset driver for HiSilicon platform, then introduces higmacv300
Ethernet driver, and finally enables Ethernet support for Poplar board.
Changes for v2:
- Rename driver symbol to HIGMACV300_ETH.
- Remove the use of temp
於 2019年2月18日 週一 上午11:00寫道：
>
>
>
> > -Original Message-
> > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Monday, February 18, 2019 5:55 AM
> > To: u-boot@lists.denx.de; anup.pa...@wdc.com
> > Cc: a...@brainfault.org; bmeng...@gmail.com; sch...@suse.de; Rick Jian-Zhi
On 2/13/19 9:36 PM, Tom Rini wrote:
> On Thu, Feb 14, 2019 at 02:01:02AM +0530, Jagan Teki wrote:
>> On Mon, Feb 11, 2019 at 10:28 PM Tom Rini wrote:
>>>
>>> Hey all,
>>>
>>> So as I mentioned back in December[1], I was thinking of doing a
>>> recurring community conference call. I've gone ahead
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年2月14日 14:17
> To: Z.q. Hou
> Cc: u-boot@lists.denx.de; albert.u.b...@aribaud.net; Priyanka Jain
> ; York Sun ;
> sriram.d...@nxp.com; yamada.masah...@socionext.com; Prabhakar
> Kushwaha ; Mingkai
Hi Heinrich and Michael,
Another thing i see is that I missed a patch, for the 3288 gpio0, its
iomux is special, there is no high 16-bit write-enabled bit. For Tinker
board, it uses I2C0, the current driver will overwrite the I2C0 iomux,
while request the GPIO0A4. It requires a patch:
Heinrich,
On Sat, Feb 16, 2019 at 08:50:43PM +0100, Heinrich Schuchardt wrote:
> All code and data sections of PE images are already in the correct relative
> location when loaded into memory. There is not need to copy them once
> again.
While I'm not very familiar with how PE image is created
Heinrich,
# Did you intentionally remove ML from CC?
On Sat, Feb 16, 2019 at 01:00:07AM +0100, Heinrich Schuchardt wrote:
> On 2/14/19 8:56 AM, AKASHI Takahiro wrote:
> > In this patch, do_bootefi() will be reworked, without any functional
> > change, as it is a bit sloppy after Heinrich's
Hi Marcel, Stefan,
> This series addresses some shortcomings, enables/introduces device
> tree support and converts all except video to using the driver model.
> This is fully tested both running our latest downstream BSP as well
> as the mainline Linux kernel.
>
> This series is based on
On Fri, 15 Feb 2019 23:20:23 +0100
Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> While commit 3e020f03e94f ("driver: misc: add MXC_OCOTP Kconfig
> entry") introduced a Kconfig entry it did not actually migrate all
> configurations to using it.
>
> As CONFIG_MXC_OCOTP was in
On Mon, Feb 18, 2019 at 10:41 AM Chris Packham wrote:
>
> On Mon, Feb 18, 2019 at 10:31 AM Chris Packham
> wrote:
> >
> > The generic wdt_start API expects to be called with the timeout in
> > milliseconds. Update the orion_wdt driver to accept a timeout in
> > milliseconds and use the clock
On Fri, 15 Feb 2019 09:00:14 +0100
Hannes Schmelzer wrote:
> Add this spba-bus@0200 sub-bus to the aips-bus@0200, because
> below there are essential boot-devices (ecspi1-4) which are needed in
> SPL for booting from SPI.
>
> Signed-off-by: Hannes Schmelzer
>
> ---
>
>
Dear "Y.b. Lu",
> The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
> initially. The later QoriQ series processors (which were evolutions
> of MPC83XX/MPC85XX) and i.MX series processors were using this
> driver for their eSDHCs too.
>
> So there are two evolution directions for
Hi Jeroen van der Laan,
> Hi there,
>
> I'm working on a board that is based on a i.Mx6soloX it has a
> PFUZE3000 PMIC the u-boot version we're using is 2016-03. The PMIC is
> by default configured with a voltage for our DRAM that is too low.
> We've discovered that this is an issue with some
On Sat, 16 Feb 2019 10:45:42 +0100
Krzysztof Kozlowski wrote:
> Detection of board revision is done early - before power setup. In
> case of Odroid XU3/XU4/HC1 family, the detection is done using ADC
> which is supplied by LDO4/VDD_ADC regulator. This regulator could be
> turned off (e.g. by
Hi Krzysztof,
> On Fri, Feb 15, 2019 at 08:15:45AM +0100, Lukasz Majewski wrote:
> > On Wed, 13 Feb 2019 17:46:44 +0100
> > Krzysztof Kozlowski wrote:
> >
> > > Fix detection of Odroid HC1 (Exynos5422) after reboot if kernel
> > > disabled the LDO4/VDD_ADC regulator.
> > >
> > > The LDO4
On Tue, 2019-02-12 at 05:05 +, Anup Patel wrote:
> > -Original Message-
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Tuesday, February 12, 2019 4:12 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra ; Anup Patel
> > ; Bin Meng ; Andreas
> > Schwab ; Palmer
Hi Rick,
On Fri, 2019-02-15 at 14:51 +0800, Rick Chen wrote:
> Hi Lukas
>
> > > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > > Sent: Tuesday, February 12, 2019 6:14 AM
> > > To: u-boot@lists.denx.de
> > > Cc: Atish Patra; Anup Patel; Bin Meng; Andreas Schwab; Palmer
> > >
On Tue, 2019-02-12 at 01:48 +, Anup Patel wrote:
> > -Original Message-
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Tuesday, February 12, 2019 3:44 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra ; Anup Patel
> > ; Bin Meng ; Andreas
> > Schwab ; Palmer
Hi Bin,
On Tue, 2019-02-12 at 11:03 +0800, Bin Meng wrote:
> Hi Lukas,
>
> On Tue, Feb 12, 2019 at 6:14 AM Lukas Auer
> wrote:
> > Harts on RISC-V boot independently and U-Boot is responsible for
> > managing them. Functions are called on other harts with
> > smp_call_function(), which sends
On Tue, 2019-02-12 at 01:44 +, Anup Patel wrote:
> > -Original Message-
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Tuesday, February 12, 2019 3:44 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra ; Anup Patel
> > ; Bin Meng ; Andreas
> > Schwab ; Palmer
On Mon, Feb 18, 2019 at 10:31 AM Chris Packham wrote:
>
> The generic wdt_start API expects to be called with the timeout in
> milliseconds. Update the orion_wdt driver to accept a timeout in
> milliseconds and use the clock rate specified in the dts to convert the
> timeout to an appropriate
The generic wdt_start API expects to be called with the timeout in
milliseconds. Update the orion_wdt driver to accept a timeout in
milliseconds and use the clock rate specified in the dts to convert the
timeout to an appropriate value for the timer reload register.
Signed-off-by: Chris Packham
We've seen some issues with the x530 under extreme conditions where the
DDR gets into a bad state. Generally this results in an application
crash followed by a lock-up in u-boot.
Enabling the watchdog prevents the lock up and will let the DDR training
have another go. Sometimes this recovers but
When run from the SPL the mvebu targets are using the hardware default
offset for the SoC peripherals. devfdt_get_addr_size_index() understands
how to deal with this via dm_get_translation_offset() so use this
instead of fdtdec_get_addr_size_auto_noparent().
Signed-off-by: Chris Packham
Enable the hardware watchdog to guard against system lock ups when
running in the SPL or U-Boot. Stop the watchdog just before booting so
that the OS can re-enable it if needed.
Signed-off-by: Chris Packham
---
Changes in v4: None
Changes in v3:
- specify timeout in milliseconds
Changes in v2:
Signed-off-by: Chris Packham
---
include/dm/uclass-id.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index f3bafb3c6353..86e59781b058 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -106,7 +106,7 @@ enum
This patch supports enabling MTD, and the corresponding CMD_MTD
along with enabling the MXS NAND Controller with device tree
support.
Signed-off-by: Adam Ford
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index 5017e5831b..8a875a8716 100644
---
On 2/17/19 1:18 PM, Michael Nazzareno Trimarchi wrote:
> Hi
>
> [U-Boot] [PATCH 3/5] rockchip: rk3288-vyasa: increase heap space after
> relocation
>
> Can you check it if you have the same problem?
Applying all the changes causes SPL not to start.
CONFIG_SYS_MALLOC_F_LEN=0x4000
does not solve
Hi
[U-Boot] [PATCH 3/5] rockchip: rk3288-vyasa: increase heap space after
relocation
Can you check it if you have the same problem?
Michael
On Sun., 17 Feb. 2019, 1:11 pm Heinrich Schuchardt On 2/17/19 9:19 AM, David Wu wrote:
> > Hi Henrich,
> >
> > 在 2019/2/16 下午5:53, Heinrich Schuchardt
On 2/17/19 9:19 AM, David Wu wrote:
> Hi Henrich,
>
> 在 2019/2/16 下午5:53, Heinrich Schuchardt 写道:
>> On 2/13/19 11:56 AM, Philipp Tomsich wrote:
>>
>> Hello David, hello Philipp,
>>
>> what are your ideas to reduce the SPL size to under 0x7800 again?
>> Or will you move all rk3288 boards to TPL
The generic wdt_start API expects to be called with the timeout in
milliseconds. Update the orion_wdt driver to accept a timeout in
milliseconds and use the clock rate specified in the dts to convert the
timeout to an appropriate value for the timer reload register.
Signed-off-by: Chris Packham
Enable the hardware watchdog to guard against system lock ups when
running in the SPL or U-Boot. Stop the watchdog just before booting so
that the OS can re-enable it if needed.
Signed-off-by: Chris Packham
---
Changes in v3:
- specify timeout in milliseconds
Changes in v2:
- update commit
When run from the SPL the mvebu targets are using the hardware default
offset for the SoC peripherals. devfdt_get_addr_size_index() understands
how to deal with this via dm_get_translation_offset() so use this
instead of fdtdec_get_addr_size_auto_noparent().
Signed-off-by: Chris Packham
We've seen some issues with the x530 under extreme conditions where the
DDR gets into a bad state. Generally this results in an application
crash followed by a lock-up in u-boot.
Enabling the watchdog prevents the lock up and will let the DDR training
have another go. Sometimes this recovers but
Hi Henrich,
在 2019/2/16 下午5:53, Heinrich Schuchardt 写道:
On 2/13/19 11:56 AM, Philipp Tomsich wrote:
On 13.02.2019, at 11:52, David Wu wrote:
Hi philipp,
在 2019/2/13 下午6:47, Philipp Tomsich 写道:
On 13.02.2019, at 11:33, David Wu wrote:
在 2019/2/13 下午6:13, Philipp Tomsich 写道:
On
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