> -Original Message-
> From: U-Boot On Behalf Of Meenakshi
> Aggarwal
> Sent: Wednesday, February 20, 2019 3:36 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH v1] mc : Add support to run MC in 128 MB DDR size
Ashish: Rephrase to "Reduce MC memory size to 128M" from the above it
In order to fully support SPL_OF_CONTROL, we need BSS to be a bit
larger. This patch relocates BSS to SDRAM instead of SRAM which
is similar to how ARMv7 boards (like OMAP2+) do it.
This means two new variables are required:
CONFIG_SPL_BSS_START_ADDR set to DAVINCI_DDR_EMIF_DATA_BASE
With the memory mapping giving us some more avialable RAM, this
updates the da850-evm-u-boot.dtsi to include the serial port, SPI
and Flash nodes along with some dependent nodes in the SPL dtb.
This also removes the platform data initialization code for the
serial port and SPI Flash.
[...]
> > >
> > > My current patch-set is also to cleaning up the driver waiting for
> > > splitting them someday on the other hand. After you check
> > > CONFIG_FSL_ESDHC in u-boot source, if you think it's better we
> > > should split them right now, I could work on the driver splitting.
> >
> >
Hi Bin,
> -Original Message-
> From: Bin Meng
> Sent: 2019年2月26日 10:48
> To: Z.q. Hou
> Cc: u-boot@lists.denx.de; albert.u.b...@aribaud.net; Priyanka Jain
> ; York Sun ;
> sriram.d...@nxp.com; yamada.masah...@socionext.com; Prabhakar
> Kushwaha ; Mingkai Hu
> ; M.h. Lian
> Subject: Re:
On 22.02.19 18:52, Martyn Welch wrote:
> From: Sjoerd Simons
>
> Add support for the Bosch Guardian board.
>
> CPU : AM335X-GP rev 2.1
> Model: Bosch AM335x Guardian
> I2C: ready
> DRAM: 256 MiB
> NAND: 512 MiB
> MMC: OMAP SD/MMC: 0
>
> Signed-off-by: Sjoerd Simons
> Signed-off-by:
Hi,
I've encountered occasional glitches while writing to the sd card
via u-boot(2018.07) on a Pi 3 B+. The goal is to write the bootcount
in the boot partition. As a test, this is the loop I used to read, display
contents, write to the same file over and over again.
```
mw 20 0
while itest
HVC call makes use of 6 mandatory arguments rather than 7 in the same way
as SMC calls. The 7th argument is optional (Client ID) for both HVC and
SMC but is implemented as 16-bit parameter and register R7 or W7. The aim
of this patch is just fix compilation error due to an invalid asm code in
the
Hi Zhiqiang,
On Tue, Feb 26, 2019 at 10:40 AM Z.q. Hou wrote:
>
> Hi Bin,
>
> Thanks a lot for your comments!
>
> > -Original Message-
> > From: Bin Meng
> > Sent: 2019年2月21日 18:26
> > To: Z.q. Hou
> > Cc: u-boot@lists.denx.de; albert.u.b...@aribaud.net; Priyanka Jain
> > ; York Sun ;
Hi Bin,
Thanks a lot for your comments!
> -Original Message-
> From: Bin Meng
> Sent: 2019年2月21日 18:26
> To: Z.q. Hou
> Cc: u-boot@lists.denx.de; albert.u.b...@aribaud.net; Priyanka Jain
> ; York Sun ;
> sriram.d...@nxp.com; yamada.masah...@socionext.com; Prabhakar
> Kushwaha ; Mingkai
On 2/21/19 4:45 PM, Stephen Warren wrote:
With the latest push to u-boot.git master branch, I'm seeing the
following failures running test/py on sandbox:
=> ut dm pch_base
Test: dm_test_pch_base: pch.c
/var/lib/jenkins/workspace/u-boot-denx_uboot-master-build/src/u-boot/test/dm/pch.c:20,
Hi Alex,
On 2/22/19 2:13 AM, Alexander Graf wrote:
On 21.02.19 02:30, Andre Przywara wrote:
At the moment we build the SPL and U-Boot proper for the 64-bit AArch64
instruction set. But since the cores provide an AArch32 compatibility mode
and in fact the BootROM runs in 32-bit mode, it can
On Mon, Feb 25, 2019 at 3:45 PM Murali Karicheri wrote:
>
> Hello Maintainer,
>
> On 02/25/2019 03:27 PM, Murali Karicheri wrote:
> > This patch series add networking capability to K2G ICE EVM
> > based on netcp driver. Networking function has been tested
> > using the latest master branch from
On Mon, Feb 25, 2019 at 2:28 PM Murali Karicheri wrote:
>
> This patch updates pinmux configuration for K2G GP EVM based on
> data generated by the pinmux tool at
> https://dev.ti.com/pinmux/app.html#/default
>
> Signed-off-by: Murali Karicheri
> Reviewed-by: Lokesh Vutla
Acked-by: Joe
Hello Maintainer,
On 02/25/2019 03:27 PM, Murali Karicheri wrote:
This patch series add networking capability to K2G ICE EVM
based on netcp driver. Networking function has been tested
using the latest master branch from u-boot repo. Following
boot mode has been tested for networking.
Net boot
Enable ti phy dp83867 for k2g
Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
---
configs/k2g_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 838b6f14b6..4c5e344d3a 100644
--- a/configs/k2g_evm_defconfig
This patch updates pinmux configuration for K2G GP EVM based on
data generated by the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
Signed-off-by: Murali Karicheri
Reviewed-by: Lokesh Vutla
---
board/ti/ks2_evm/mux-k2g.h | 32 +---
1 file changed, 17
Enhance the netcp driver to support phys that can be configured
for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
---
drivers/net/ti/keystone_net.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff
This patch adds dt node for DP83867 phy used on K2G ICE board and
also enable netcp device nodes for the board.
EVM hardware spec recommends to add 0.25 nsec delay in the tx
direction and 2.25 nsec delay in the rx direction for internal
delay in the clock path to be on the safer side.
The board
This patch adds a workaround to reset the phy one time during boot
using GPIO0 pin 10 to make sure, the Phy latches the configuration
from the input pins correctly.
Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
---
.../arm/mach-keystone/include/mach/hardware-k2g.h | 3 +++
This add pinmux configuration for rgmii interface so that network
driver can be supported on K2G ICE boards. The pinmux configurations
for this are generated using the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default
As this required some BUFFER_CLASS definitions, same is re-used
from
This patch series add networking capability to K2G ICE EVM
based on netcp driver. Networking function has been tested
using the latest master branch from u-boot repo. Following
boot mode has been tested for networking.
Net boot (tftp images over ethernet interface and boot kernel)
log
This patch removes the unused phy-mode property from the phy dt node. On
K2G, currently link-interface determines if phy is used or not and is
already set to use rgmii. So this is not needed. Besides phy-mode should
be added to slave interface configuration of the cpsw driver, not in the
phy node.
When compiling with DEBUG=1 an error
fs/fat/fat_write.c:831: undefined reference to `__aeabi_ldivmod'
occurred.
We should use do_div() instead of the modulus operator.
filesize and cur_pos cannot be negative. So let's use u64 to avoid
warnings.
Fixes: cb8af8af5ba0 ("fs: fat: support write with
On Thu, Feb 21, 2019 at 11:01 AM Murali Karicheri wrote:
>
> This patch removes the unused phy-mode property from the phy dt node. On
> K2G, currently link-interface determines if phy is used or not and is
> already set to use rgmii. So this is not needed. Besides phy-mode should
> be added to
On Thu, Feb 21, 2019 at 11:03 AM Murali Karicheri wrote:
>
> Enable ti phy dp83867 for k2g
>
> Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
The following changes since commit afd46c5f13d0c93c44008bd7040227d0b84e31b9:
Merge branch '2019-02-22-master-imports' (2019-02-22 22:40:24 -0500)
are available in the Git repository at:
https://github.com/xypron2/u-boot tag efi-2019-04-rc3
for you to fetch changes up to
On Thu, Feb 21, 2019 at 11:03 AM Murali Karicheri wrote:
>
> This patch adds dt node for DP83867 phy used on K2G ICE board and
> also enable netcp device nodes for the board.
>
> EVM hardware spec recommends to add 0.25 nsec delay in the tx
> direction and 2.25 nsec delay in the rx direction for
On Thu, Feb 21, 2019 at 11:03 AM Murali Karicheri wrote:
>
> This add pinmux configuration for rgmii interface so that network
> driver can be supported on K2G ICE boards. The pinmux configurations
> for this are generated using the pinmux tool at
> https://dev.ti.com/pinmux/app.html#/default
>
>
On Thu, Feb 21, 2019 at 11:02 AM Murali Karicheri wrote:
>
> This patch adds a workaround to reset the phy one time during boot
> using GPIO0 pin 10 to make sure, the Phy latches the configuration
> from the input pins correctly.
>
> Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
On Thu, Feb 21, 2019 at 11:01 AM Murali Karicheri wrote:
>
> Enhance the netcp driver to support phys that can be configured
> for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)
>
> Signed-off-by: Murali Karicheri
Acked-by: Joe Hershberger
___
On Thu, Feb 21, 2019 at 11:03 AM Murali Karicheri wrote:
>
> This add pinmux configuration for rgmii interface so that network
> driver can be supported on K2G ICE boards. The pinmux configurations
> for this are generated using the pinmux tool at
> https://dev.ti.com/pinmux/app.html#/default
>
>
On Thu, Feb 21, 2019 at 11:00 AM Murali Karicheri wrote:
>
> This patch updates pinmux configuration for K2G GP EVM based on
> data generated by the pinmux tool at
> https://dev.ti.com/pinmux/app.html#/default
>
> Signed-off-by: Murali Karicheri
> Reviewed-by: Lokesh Vutla
> ---
>
On 9/11/18 8:59 AM, Akashi, Takahiro wrote:
> From: AKASHI Takahiro
>
> In this patch, all the necessary code for allowing for a file offset
> at write is implemented. What plays a major roll here is get_set_cluster(),
> which, in contrast to its counterpart, set_cluster(), only operates on
>
On 2/18/19 6:43 PM, Marek Vasut wrote:
> The loop implemented in the code is supposed to check whether the
> PL310 operation register has any bit from the mask set. Currently,
> the code checks whether the PL310 operation register has any bit
> set AND whether the mask is non-zero, which is
Hello Maintainer,
On 02/21/2019 12:02 PM, Murali Karicheri wrote:
This patch series add networking capability to K2G ICE EVM
based on netcp driver. Networking function has been tested
using the latest master branch from u-boot repo. Following
boot mode has been tested for networking.
Net boot
On 25.02.19 16:33, Martyn Welch wrote:
> From: Sjoerd Simons
>
> Add support for the Bosch Guardian board.
>
> CPU : AM335X-GP rev 2.1
> Model: Bosch AM335x Guardian
> I2C: ready
> DRAM: 256 MiB
> NAND: 512 MiB
> MMC: OMAP SD/MMC: 0
>
> Signed-off-by: Sjoerd Simons
> Signed-off-by:
Fix the order of include files according to U-Boot coding style.
Signed-off-by: Felix Brack
---
board/eets/pdu001/mux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/eets/pdu001/mux.c b/board/eets/pdu001/mux.c
index f1d38e9b74..f0f9e262eb 100644
---
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/axs10x_mb.dtsi| 28
board/synopsys/axs10x/axs10x.c | 29 -
configs/axs103_defconfig | 2 ++
3 files changed, 30 insertions(+), 29 deletions(-)
diff --git
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 26 ++
board/synopsys/hsdk/hsdk.c | 41 ++---
configs/hsdk_defconfig | 2 ++
3 files changed, 34 insertions(+), 35 deletions(-)
diff --git a/arch/arc/dts/hsdk.dts
Add the DM_MMC-compatible DesignWare MMC driver support for Synopsys
ARC devboards. It is created to switch ARC devboards to use DM_MMC.
It required information such as clocks (Bus Interface Unit clock,
Card Interface Unit clock) and SDIO bus width.
Signed-off-by: Eugeniy Paltsev
---
Introduce DesignWare MMC driver extension and migrate several ARC
devboard to DM_MMC
Eugeniy Paltsev (3):
ARC: dwmmc: Adding DesignWare MMC driver support for ARC devboards
ARC: [plat-hsdk]: migrate to DM_MMC
ARC: [plat-axs10x]: migrate to DM_MMC
MAINTAINERS
From: Sjoerd Simons
Add support for the Bosch Guardian board.
CPU : AM335X-GP rev 2.1
Model: Bosch AM335x Guardian
I2C: ready
DRAM: 256 MiB
NAND: 512 MiB
MMC: OMAP SD/MMC: 0
Signed-off-by: Sjoerd Simons
Signed-off-by: Martyn Welch
Reviewed-by: Tom Rini
---
Changes in v3:
- Removed
From: Sjoerd Simons
Add configuration for the MT41K128M16JT125K memory modules as used on the
Bosch Guardian device.
Based on a patch by:
Govindaraji Sivanantham
Signed-off-by: Sjoerd Simons
[checkpatch.pl cleanup by Martyn Welch]
Signed-off-by: Martyn Welch
---
Changes in v3: None
When booting using an SPL on am335x, if we want to support booting with
the boot ROM loader via USB (which uses RNDIS, making bootp and tftp
calls) we need to enable gadget eth in the SPL to load the main U-Boot
image. To enable CONFIG_SPL_ETH_SUPPORT, we must enable
CONFIG_SPL_ENV_SUPPORT as the
On 22.02.19 18:52, Martyn Welch wrote:
Same post as some minutes ago but with correct sender, sorry.
> From: Sjoerd Simons
>
> Add support for the Bosch Guardian board.
>
> CPU : AM335X-GP rev 2.1
> Model: Bosch AM335x Guardian
> I2C: ready
> DRAM: 256 MiB
> NAND: 512 MiB
> MMC: OMAP
Hi Adam,
On Mon, Feb 25, 2019 at 10:09 AM Adam Ford wrote:
>
> I am looking into the SPL code to boot the imx6_logic board and
> comparing its board file to other i.MX6 boards.
>
> Nearly every board has a virtually identical board_init_f function.
> Some of the entries are done is slightly
> Am 25.02.2019 um 02:11 schrieb Ibai Erkiaga :
>
> HVC call makes use of 6 mandatory arguments rather than 7 in the same way
> as SMC calls. The 7th argument is optional (Client ID) for both HVC and
> SMC but is implemented as 16-bit parameter and register R7 or W7. The aim
> of this patch is
I am looking into the SPL code to boot the imx6_logic board and
comparing its board file to other i.MX6 boards.
Nearly every board has a virtually identical board_init_f function.
Some of the entries are done is slightly different orders, but what
happens appears to be the same. I don't know if
Hi Lokesh,
On 22/02/19 6:01 PM, Lokesh Vutla wrote:
>
>
> On 22/02/19 5:46 PM, Faiz Abbas wrote:
>> Lokesh,
>>
>> On 22/02/19 5:33 PM, Lokesh Vutla wrote:
>>>
>>>
>>> On 22/02/19 5:21 PM, Faiz Abbas wrote:
Tom,
On 22/02/19 5:00 AM, Tom Rini wrote:
> On Wed, Feb 20, 2019 at
From: Patrick Delaunay
Some binding define child node gpio-controller without compatible property.
This patch avoid to bind the pinconfig uclass to these node.
For example, the binding for st,stm32-pinctrl
(./device-tree-bindings/pinctrl/st,stm32-pinctrl.txt) defines the GPIO
controller/bank
In case of system with several pin-controller device, probe the first
UCLASS_PINCTRL by seq number (defined by alias) to avoid race condition
with I2C PINCONTROL driver for GPIO expander (GPIO expander need I2C bus,
I2C driver need PINCONFIG).
Signed-off-by: Patrick DELAUNAY
Signed-off-by:
This series adds:
- For system with multiple pincontroller device, insure
probe order to avoid race condition using sequence number (alias)
- Avoid to bind child node with gpio-controller properties.
Changes in v2:
- Update commit message with explanaition
Patrice Chotard (1):
On 2/21/19 5:05 PM, David Rivshin wrote:
From: David Rivshin
am335x-fb overrides the default lcd_get_size() to add an extra 32 bytes
compared to the normal calculation. While the gd->fb_base is an extra 32
bytes larger than the logical framebuffer size, the first 32 bytes is
always skipped.
On Tue, 2019-02-19 at 13:46 +0530, Anup Patel wrote:
> On Mon, Feb 18, 2019 at 5:11 PM Auer, Lukas
> wrote:
> > On Mon, 2019-02-18 at 10:01 +, Auer, Lukas wrote:
> > > On Mon, 2019-02-18 at 10:28 +0530, Anup Patel wrote:
> > > > On Tue, Feb 12, 2019 at 3:44 AM Lukas Auer
> > > > wrote:
> > >
With current order of include files, the file designware_spi.c
can't see that the struct global_data has the member
board_type when CONFIG_BOARD_TYPES is defined. By not seeing this
then all the members are shifted in the struct global_data.
So when the driver is trying to read from device tree
On 08.02.19 18:12, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> Migrate MMC and SATA to using driver model.
>
> While at it also enable SCSI driver model.
>
> Signed-off-by: Marcel Ziswiler
[also reply to v2 of this series to avoid that this gets lost in patchwork]
Hi Marcel,
Thank you
On 01.02.19 17:29, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> Migrate MMC and SATA to using driver model.
>
> While at it also enable SCSI driver model.
>
> Signed-off-by: Marcel Ziswiler
Hi Marcel,
Thank you for providing this solution to keep SATA working on i.MX6
under DM_SCSI.
I
By moving to DM_I2C there is no need to specify any eeprom configuration
because it is read from DT.
Reported-by: Sreeja Vadakattu
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/include/configs/xilinx_zynqmp.h
On Sun, 24 Feb 2019 at 13:41, Anand Moon wrote:
>
> This commit enables support for I2C S3C424X0 driver.
>
> Signed-off-by: Anand Moon
> ---
>
> ODROID-XU3 # i2c bus
> Bus 0: i2c@12C6
> Bus 1: i2c@12C7
> Bus 2: i2c@12C8
> Bus 3: i2c@12C9
> Bus 4: i2c@12CA (active 4)
>
This patch enables CONFIG_SYS_BOOT_RAMDISK_HIGH for RISC-V
because bootm will update initrd location in DTB only if
CONFIG_SYS_BOOT_RAMDISK_HIGH is enabled. If we don't enable
this option then bootm assumes DTB already has initrd details
which is not the case most of the time.
Signed-off-by:
From: Atish Patra
The readme guide describes the procedure to build, flash and boot Linux
using U-Boot on HiFive Unleashed. It also explains the current state of
U-boot support and future action items.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Lukas Auer
---
This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Atish
From: Atish Patra
Currently, timer driver is bound only for hart0.
There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.
The timer driver should be bound for boot hart.
Signed-off-by: Atish
From: Atish Patra
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
In this case, instead of failing we should just skip baudrate
config by returning zero.
Signed-off-by: Atish Patra
Signed-off-by:
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Simon Glass
---
arch/sandbox/dts/test.dts | 8 ++
From: Atish Patra
Compute the baud rate multipler with more precision.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
drivers/serial/serial_sifive.c | 28 ++--
1 file changed, 26 insertions(+), 2
Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.
Based on code written by Wesley Terpstra
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
From: Atish Patra
Fix MID bit field check to correctly identify all GEM hardwares.
The check is updated as per macb driver in Linux location:
/drivers/net/ethernet/cadence/macb_main.c:259
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas
Don't fail in macb_enable_clk() if clk_enable() returns
-ENOSYS because we get -ENOSYS for fixed-rate clocks.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
---
drivers/net/macb.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/net/macb.c
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot
DMA mapping APIs will generate DMA addresses beyond 4GB. This
breaks DMA programming in 32bit DMA capable devices (such as
Cadence MACB ethernet). For example, If DRAM is more then 2GB
on QEMU sifive_u machine then Cadence MACB
Some of the drivers (such as Cadence MACB ethernet driver) expect
asm/arch/clk.h to be provided by arch support so we add place-holder
asm/arch-generic/clk.h for RISC-V generic CPU.
Signed-off-by: Anup Patel
Reviewed-by: Lukas Auer
---
arch/riscv/include/asm/arch-generic/clk.h | 14
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.
This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific
This patch adds asm/dma-mapping.h for Linux-like DMA mappings
APIs required by some of the drivers (such as, Cadance MACB
Ethernet driver).
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
arch/riscv/include/asm/dma-mapping.h | 38
This patchset adds SiFive Freedom Unleashed (FU540) support
to RISC-V U-Boot.
The patches are based upon latest U-Boot source tree
(git://git.denx.de/u-boot.git) at v2019.04-rc2 commit id
f14de0014c56093feecf42ca38b8ae5b3878f176
All drivers namely: SiFive PRCI, SiFive Serial, and Cadance
MACB
We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/Kconfig b/arch/Kconfig
index 35e2712fce..4ebc66227e 100644
---
> -Original Message-
> From: U-Boot On Behalf Of Rick Chen
> Sent: Monday, February 25, 2019 12:51 PM
> To: Anup Patel
> Cc: Tom Rini ; U-Boot Mailing List b...@lists.denx.de>; Greentime Hu
> Subject: Re: [U-Boot] SiFive FU540 U-Boot patches,
>
> Hi Anup
>
> Anup Patel 於
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