Import i.MX8MM composite clk from Linux Kernel
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-composite-8m.c | 170 +
include/linux/clk-provider.h | 3 +
2 files changed, 173 insertions(+)
create mode 100644 drivers/clk/imx/clk-composite-8m.c
diff
Some archs defined PAGE_SIZE, such as ARMv8, to avoid build warning,
guard PAGE_SIZE.
Signed-off-by: Peng Fan
---
include/linux/compat.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/compat.h b/include/linux/compat.h
index d0f51baab4..c1f8bdf8f2 100644
---
Differnet board has different controller used, it is
hard to use one layout for them all.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/spl.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 9f1e0f6a72..a6d7b69ad8 100644
---
Add pre reloc flag to use this driver before relocation
Signed-off-by: Peng Fan
---
drivers/clk/clk_fixed_rate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 069e643fbc..debada1463 100644
--- a/drivers/clk/clk_fixed_rate.c
Add IMX8MM kconfig entry
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 9c487870a6..35c978e863 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++
Add i.MX8MM clock binding header for i.MX8MM
Signed-off-by: Peng Fan
---
include/dt-bindings/clock/imx8mm-clock.h | 244 +++
1 file changed, 244 insertions(+)
create mode 100644 include/dt-bindings/clock/imx8mm-clock.h
diff --git
Export the structure for others to use.
Signed-off-by: Peng Fan
---
drivers/clk/clk_fixed_rate.c | 8 +---
include/linux/clk-provider.h | 7 +++
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index
Import some clk helpers from Linux Kernel for i.MX8MM usage
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk.h | 81 +++
1 file changed, 81 insertions(+)
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 864a215a22..aa6e81ff13
Add set rate for imx clk-gate2
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-gate2.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index 83589b9206..75b6b85e07 100644
--- a/drivers/clk/imx/clk-gate2.c
+++
Add set parent support for clk mux
Signed-off-by: Peng Fan
---
drivers/clk/clk-mux.c| 70 ++--
include/linux/clk-provider.h | 2 ++
2 files changed, 70 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
Signed-off-by: Peng Fan
---
drivers/clk/clk-divider.c | 88 +++
1 file changed, 88 insertions(+)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 2f09e0bb58..8615f9815d 100644
--- a/drivers/clk/clk-divider.c
+++
Print err value when clk_get_rate failed
Signed-off-by: Peng Fan
---
cmd/clk.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/cmd/clk.c b/cmd/clk.c
index 2ea82176aa..73d963184d 100644
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -41,6 +41,8 @@ int __weak soc_clk_dump(void)
rate =
Import clk-gate support from Linux Kernel 5.1-rc5
Signed-off-by: Peng Fan
---
drivers/clk/Makefile | 2 +-
drivers/clk/clk-gate.c | 151 +++
include/linux/clk-provider.h | 18 ++
3 files changed, 170 insertions(+), 1 deletion(-)
Export mux/divider ops for composite usage
Signed-off-by: Peng Fan
---
include/linux/clk-provider.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 216095d28c..a60cf6e833 100644
--- a/include/linux/clk-provider.h
+++
Preparing to support composite clk.
Signed-off-by: Peng Fan
---
drivers/clk/clk-divider.c | 4 ++--
drivers/clk/clk-mux.c | 6 --
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 1d2c1b1ec4..2f09e0bb58 100644
---
When support Clock Common Framework, U-Boot use dev for
clk tree information, there is no clk->parent. When
support composite clk, it contains mux/gate/divider,
but the mux/gate/divider is not binded with device.
So we could not use dev_get_driver_data to get the correct
clk_mux/gate/divider. So
Sync more clk flags that might be used in U-Boot CCF.
Signed-off-by: Peng Fan
---
include/linux/clk-provider.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index eac045c5f8..3458746a60 100644
---
driver data is not clk, not clk_fixed_factor, fix it.
Signed-off-by: Peng Fan
---
drivers/clk/clk-fixed-factor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index acbc0909b4..c535aadc48 100644
---
Directly use driver data is wrong, need to the helper to get
the correct clk_divider and etc
Signed-off-by: Peng Fan
---
drivers/clk/clk-divider.c | 2 +-
drivers/clk/imx/clk-gate2.c | 4 ++--
drivers/clk/imx/clk-pfd.c | 2 +-
drivers/clk/imx/clk-pllv3.c | 2 +-
4 files changed, 5
This patch set is based Lukasz V3 CCF patchset,
[PATCH v3 00/11] clk: Port Linux common clock framework [CCF] to U-boot (tag:
5.0-rc3)
https://github.com/lmajewski/u-boot-dfu/commits/CCF-v3
Added a few fixes to Lukasz's v3 patchset.
Introduced clk-gate/composite
Added set rate support
Per my
From: Marcel Ziswiler
This commit adds initial support for the Toradex Apalis iMX8QM 4GB WB IT
V1.0B module. Unlike the V1.0A early access samples exclusively booting
from SD card, they are now strapped to boot from eFuses which are
factory fused to properly boot from their on-module eMMC.
From: Marcel Ziswiler
Add support for lpuart1, lpuart2, lpuart3 and lpuart4.
Signed-off-by: Marcel Ziswiler
---
arch/arm/dts/fsl-imx8qm.dtsi | 80
1 file changed, 80 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm.dtsi b/arch/arm/dts/fsl-imx8qm.dtsi
Trying to bring up uSDHC2 the following error message was observed:
MMC: imx8_clk_set_rate(Invalid clk ID #60)
imx8_clk_set_rate(Invalid clk ID #60)
usdhc@5b03 - probe failed: -22
This commit fixes this by properly setting resp. clocks.
Signed-off-by: Marcel Ziswiler
---
This series adds support for more lpuart instances, support for i2c0,
i2c1, i2c2, i2c3, i2c4, fixes support for uSDHC2, fixes CPU frequency
reporting, fixes fuse driver and last but not least introduces support
for the Toradex Apalis iMX8QM 4GB WB IT V1.0B module.
This series is available
CPU frequency reporting failed with the following error message being
printed:
sc_pm_get_clock_rate: resource:507 clk:2: res:3
Could not read CPU frequency: -22
CPU: NXP i.MX8QM RevB A53 at 0 MHz
Fix this by differentiating between the A35 as found on the i.MX 8QXP
and the A53 as found on the
This fixes the i.MX 8 fuse driver to actually build for i.MX 8QM as
well.
Signed-off-by: Marcel Ziswiler
---
drivers/misc/imx8/fuse.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/misc/imx8/fuse.c b/drivers/misc/imx8/fuse.c
index 29d2256a22..2f2fad2c17 100644
---
From: Marcel Ziswiler
Add support for i2c0, i2c1, i2c2, i2c3 and i2c4.
Signed-off-by: Marcel Ziswiler
---
arch/arm/dts/fsl-imx8qm.dtsi | 75
1 file changed, 75 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm.dtsi b/arch/arm/dts/fsl-imx8qm.dtsi
index
On 4/30/19 9:40 AM, Ley Foon Tan wrote:
[...]
> +static int altera_sdram_probe(struct udevice *dev)
> +{
> + int ret;
> + struct reset_ctl_bulk resets;
> +
> + ret = reset_get_bulk(dev, );
> + if (ret) {
> + dev_err(dev, "Can't get reset:
On 4/30/19 3:27 AM, Atish Patra wrote:
[...]
>>> Yes. FIT image parsing can be done in that way. However, the idea was
>>> here to load Image.gz directly. Image.gz is default compressed Linux
>>> kernel image format in RISC-V.
>>
>> Sigh, and the image header is compressed as well, so there's no
On 4/30/19 11:20 AM, Ley Foon Tan wrote:
> Add SDRAM device tree node to support SDRAM DM driver.
DT is a hardware description, so you're adding the node to describe the
hardware that's present, not to enable software feature.
> Signed-off-by: Ley Foon Tan
> ---
>
On 4/30/19 11:19 AM, Ley Foon Tan wrote:
> Compile ALTERA_SDRAM driver in SPL only.
> Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.
>
> Signed-off-by: Ley Foon Tan
> ---
> Makefile | 2 +-
> arch/arm/mach-socfpga/Kconfig | 4 ++--
> drivers/Makefile
On 4/30/19 11:24 AM, Adam Ford wrote:
> On Mon, Apr 29, 2019 at 4:54 AM Marek Vasut wrote:
>>
>> On 4/28/19 11:45 PM, Adam Ford wrote:
>>> This patch reuses some former code for the hawkboard, combines it
>>> with some some similar DM_USB compatible code for the OHCI driver,
>>> and enables the
On Mon, Apr 29, 2019 at 4:54 AM Marek Vasut wrote:
>
> On 4/28/19 11:45 PM, Adam Ford wrote:
> > This patch reuses some former code for the hawkboard, combines it
> > with some some similar DM_USB compatible code for the OHCI driver,
> > and enables the use of the da850's OHCI controller with
Convert Stratix 10 SDRAM driver to device model.
Get rid of call to socfpga_per_reset() and use reset
framework.
SPL is changed from calling function in SDRAM driver
directly to just probing UCLASS_RAM.
Move sdram_s10.h from arch to driver/ddr/altera directory.
Signed-off-by: Ley Foon Tan
---
Add SDRAM device tree node to support SDRAM DM driver.
Signed-off-by: Ley Foon Tan
---
arch/arm/dts/socfpga_stratix10.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi
b/arch/arm/dts/socfpga_stratix10.dtsi
index d1ae2fabae..bd68a78a37 100755
Compile ALTERA_SDRAM driver in SPL only.
Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.
Signed-off-by: Ley Foon Tan
---
Makefile | 2 +-
arch/arm/mach-socfpga/Kconfig | 4 ++--
drivers/Makefile | 2 +-
drivers/ddr/altera/Kconfig
Compile ALTERA_SDRAM driver in SPL only and move Stratix 10 SDRAM driver to DM.
v2->v3:
---
- Compile ALTERA_SDRAM driver in SPL only
- Separate dts change to new patch
- Change to use #if CONFIG_IS_ENABLED(ALTERA_SDRAM)
- Add _remove()
- Remove #ifdef CONFIG_SPL_BUILD checking in sdram_s10.c
wt., 30 kwi 2019 o 11:08 Adam Ford napisał(a):
>
> On Tue, Apr 30, 2019 at 2:39 AM Bartosz Golaszewski wrote:
> >
> > From: Bartosz Golaszewski
> >
> > The DM* family of SOCs is no longer supported. We now support the
> > omap-l138 lcdk board and Lego EV3 platform. Reflect those changes
>
>
On Tue, Apr 30, 2019 at 2:39 AM Bartosz Golaszewski wrote:
>
> From: Bartosz Golaszewski
>
> The DM* family of SOCs is no longer supported. We now support the
> omap-l138 lcdk board and Lego EV3 platform. Reflect those changes
Don't forget about the da850 EVM
> in the README.
>
>
On Mon, Apr 29, 2019 at 10:29 PM Marek Vasut wrote:
>
> On 4/29/19 9:50 PM, Simon Goldschmidt wrote:
> > Am 29.04.2019 um 21:23 schrieb Marek Vasut:
> >> On 4/29/19 8:53 PM, Simon Goldschmidt wrote:
> >>> Am 29.04.2019 um 20:33 schrieb Marek Vasut:
> On 4/29/19 8:32 PM, Simon Goldschmidt
On 30/04/2019 02:28, Bryan O'Donoghue wrote:
On 25/04/2019 04:24, Breno Matheus Lima wrote:
I couldn't get encrypted boot working in my first attempt, doing the
exact same procedure with commit 22191ac35344 ("drivers/crypto/fsl:
assign job-rings to non-TrustZone") reverted works fine.
Hi
On Tue, Apr 30, 2019 at 1:55 PM Andes wrote:
>
> From: Rick Chen
>
> When AE350 boots from flash, use CONFIG_OF_SEPARATE instead of
> CONFIG_OF_BOARD.
>
> Also remove unused code about prior_stage_fdt_address.
> And modify CONFIG_SYS_FDT_BASE as flash address.
>
> Signed-off-by: Rick Chen
> Cc:
On Tue, Apr 30, 2019 at 1:54 PM Andes wrote:
>
> From: Rick Chen
>
> This patch will fix prior_stage_fdt_address write failure problem, when
> AE350 boots from flash.
>
> When AE350 boots from flash, prior_stage_fdt_address will be flash
> address, we shall avoid it to be written.
>
>
On Tue, Apr 30, 2019 at 1:54 PM Andes wrote:
>
> From: Rick Chen
>
> When U-Boot boots from flash, during the boot process,
> hart_lottery and available_harts_lock variable addresses
> point to flash which is not writable. This causes boot
> failures on AE350. Introduce a config option
On 30/04/19 1:13 PM, Schrempf Frieder wrote:
> Hi,
>
> On 26.04.19 06:58, Vignesh Raghavendra wrote:
>>
>>
>> On 25/04/19 5:20 PM, Rajat Srivastava wrote:
>>>
>>>
-Original Message-
From: Vignesh Raghavendra
Sent: Wednesday, April 24, 2019 10:17 PM
To: Rajat
Hi,
On 26.04.19 06:58, Vignesh Raghavendra wrote:
>
>
> On 25/04/19 5:20 PM, Rajat Srivastava wrote:
>>
>>
>>> -Original Message-
>>> From: Vignesh Raghavendra
>>> Sent: Wednesday, April 24, 2019 10:17 PM
>>> To: Rajat Srivastava ; u-boot@lists.denx.de;
>>> ja...@openedev.com
>>> Cc:
On Mon, Apr 29, 2019 at 5:55 PM Marek Vasut wrote:
>
> On 4/26/19 10:23 AM, Ley Foon Tan wrote:
> > On Wed, Apr 24, 2019 at 11:01 PM Marek Vasut wrote:
> >>
> >> On 4/24/19 8:21 AM, Ley Foon Tan wrote:
> >>> Convert Stratix 10 SDRAM driver to device model.
> >>>
> >>> Get rid of call to
From: Bartosz Golaszewski
The DM* family of SOCs is no longer supported. We now support the
omap-l138 lcdk board and Lego EV3 platform. Reflect those changes
in the README.
Signed-off-by: Bartosz Golaszewski
---
doc/README.davinci | 125 -
1 file
Hello Marek,
Am 30.04.2019 um 09:01 schrieb Marek Behun:
You mean tha patch series
"[U-Boot] [PATCH u-boot-marvell v2 00/15] Fixes for Turris Omnia"
So we can ignore this patch?
bye,
Heiko
Yes :)
Ok, fine. I set Patchwork state for this patch to superseded
Hello Trent,
Am 30.04.2019 um 06:24 schrieb Heiko Schocher:
Hello Trent,
Am 12.04.2019 um 21:19 schrieb Trent Piepho:
These options only apply when not using DM_I2C. When using device
trees, the dt will enable and control the speeds of the I2C
controller(s) and these configuration options
> You mean tha patch series
>
> "[U-Boot] [PATCH u-boot-marvell v2 00/15] Fixes for Turris Omnia"
>
> So we can ignore this patch?
>
> bye,
> Heiko
Yes :)
___
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U-Boot@lists.denx.de
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On 30/04/19 11:54 AM, Keerthy wrote:
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports and provides Ethernet packet communication for the
device and can be configured as an Ethernet switch. CPSW NUSS features: the
Reduced Gigabit Media
From: Grygorii Strashko
Enable TI K3 AM65x CPSW NUSS driver.
Signed-off-by: Grygorii Strashko
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
configs/am65x_evm_a53_defconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig
From: Grygorii Strashko
Add mcu cpsw nuss pinmux and phy defs required by cpsw.
Signed-off-by: Grygorii Strashko
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 59
1 file changed, 59 insertions(+)
diff --git
From: Grygorii Strashko
Add mcu cpsw and its components along with scm_conf node
to have ethernet functional.
Signed-off-by: Grygorii Strashko
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
arch/arm/dts/k3-am65.dtsi| 2 +
arch/arm/dts/k3-am654-base-board-u-boot.dtsi
From: Grygorii Strashko
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports and provides Ethernet packet communication for the
device and can be configured as an Ethernet switch. CPSW NUSS features: the
Reduced Gigabit Media Independent Interface
Use phys_addr_t for mdio_base address to avoid build
warnings on arm64 and dra7. Cast it to uintprt_t before
assigning to regs.
Signed-off-by: Grygorii Strashko
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
Changes in v4:
* Fixed the compiler warning.
drivers/net/ti/cpsw_mdio.c | 4
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports and provides Ethernet packet communication for the
device and can be configured as an Ethernet switch. CPSW NUSS features: the
Reduced Gigabit Media Independent Interface (RGMII), Reduced Media
The field boot OptionalData in structure _EFI_LOAD_OPTIONS is for binary
data.
When we use `efidebug boot add` we should convert the 5th argument from
UTF-8 to UTF-16 before putting it into the Boot variable.
When printing boot variables with `efidebug boot dump` we should support
the
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