On STM32 family, the IPCC peripheral allows the communication
between 2 processors offering doorbells mechanism.
Signed-off-by: Fabien Dessenne
Signed-off-by: Loic Pallardy
---
drivers/mailbox/Kconfig | 7 ++
drivers/mailbox/Makefile | 1 +
drivers/mailbox/stm32-ipcc.c | 167
Add IPCC mailbox support on stm32mp157 eval and disco boards.
Signed-off-by: Fabien Dessenne
---
arch/arm/dts/stm32mp157a-dk1.dts | 4
arch/arm/dts/stm32mp157c-ed1.dts | 4
arch/arm/dts/stm32mp157c.dtsi| 13 +
3 files changed, 21 insertions(+)
diff --git
Activate the ipcc mailbox for stm32mp15 configs.
Signed-off-by: Fabien Dessenne
---
configs/stm32mp15_basic_defconfig | 2 ++
configs/stm32mp15_trusted_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/stm32mp15_basic_defconfig
b/configs/stm32mp15_basic_defconfig
index
This patchset adds the mailbox ipcc driver for the stm32mp1 SOC
and enables it for the stm32mp157 boards.
Fabien Dessenne (4):
mailbox: introduce stm32-ipcc driver
MAINTAINERS: Add stm32 mailbox IPPC driver
configs: stm32mp15: enable IPCC mailbox
ARM: dts: stm32: Add ipcc mailbox support
Signed-off-by: Fabien Dessenne
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 33fd465..5523c4a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -301,6 +301,7 @@ S: Maintained
F: arch/arm/mach-stm32mp/
F: drivers/clk/clk_stm32mp1.c
F:
Add micron mt25qu512a flash description.
Signed-off-by: Ashish Kumar
Signed-off-by: Pramod Kumar
Signed-off-by: Vabhav Sharma
---
Changes for v2:
- Use INFO6
- Removed SPI_NOR_4B_OPCODES
drivers/mtd/spi/spi-nor-ids.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
Dear Meenakshi,
> -Original Message-
> From: Meenakshi Aggarwal
> Sent: Friday, April 5, 2019 7:57 PM
> To: u-boot@lists.denx.de; Prabhakar Kushwaha
>
> Cc: Meenakshi Aggarwal
> Subject: [PATCH] drivers: net: mc: Report extra memory to Linux
>
> MC firmware need to be aligned to 512M,
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d27_som1_ek_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v3: fix the following:
./tools/genboardscfg.py
WARNING: no status info for 'sama5d27_som1_ek_qspiflash'
WARNING: no maintainers for
From: Eugen Hristev
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS
and CONFIG_BOOTCOMMAND accordingly.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev
[tudor.amba...@microchip.com: amend the commit message.]
Signed-off-by: Tudor Ambarus
---
v3: no
From: Tudor Ambarus
Use the qspi memory layout defined in at91-sama5_common - it aligns
with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: new patch
include/configs/sama5d27_som1_ek.h | 7 ---
1 file changed, 7
From: Tudor Ambarus
We have a macronix spi-nor flash on sama5d2_xplained RevB and
a sst spi-nor flash on RevC. Select the rest for testing purposes.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: new patch
configs/sama5d2_xplained_emmc_defconfig | 5 +
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d2_xplained_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v3: fix the following:
./tools/genboardscfg.py
WARNING: no status info for 'sama5d2_xplained_qspiflash'
WARNING: no maintainers for
From: Cyrille Pitchen
Fix the following:
- use "jedec,spi-nor" binding, we use jedec compatible flashes
- set bus width to 4, we use quad capable flashes
- differentiate bewteen data and clk and cs pins
- drop partions as we don't use them in u-boot.
Signed-off-by: Cyrille Pitchen
From: Tudor Ambarus
We use a sst spi-nor flash memory on sama5d27_som1_ek. Select
the others for testing purposes.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: new patch
configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++
configs/sama5d27_som1_ek_mmc_defconfig | 2 ++
2 files changed, 4
From: Cyrille Pitchen
Use the same memory layout as we use for the NAND boot on the other boards.
QSPI flashes are present on the following boards:
sama5d2_xplained RevB: 32 Mbyte flash (mx25l3273fm2i-08g)
sama5d2_xplained RevC: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d27_som1_ek:8
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: no change
drivers/spi/Kconfig | 7 +
drivers/spi/Makefile| 1 +
From: Tudor Ambarus
Describe the DT bindings for the driver of the Atmel QSPI
controller. Taken form linux v5.1-rc5.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: no change
doc/device-tree-bindings/spi/atmel-quadspi.txt | 37 ++
1 file changed, 37 insertions(+)
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash,
and on sama5d27_som1_ek with sst26vf064b spi-nor flash.
v3: fix following config warnings reported by travis:
./tools/genboardscfg.py
WARNING: no
вт, 14 мая 2019 г. в 02:13, Vagrant Cascadian :
>
> On 2019-05-13, Vagrant Cascadian wrote:
> > On 2019-05-13, Vagrant Cascadian wrote:
> >> On 2019-05-08, Matwey V. Kornilov wrote:
> >>> Signed-off-by: Matwey V. Kornilov
> >>> ---
> >>> configs/rock64-rk3328_defconfig | 91
> >>>
From: Yinbo Zhu
Rx Compliance tests may fail intermittently at high jitter
frequencies using default register values.
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Yinbo Zhu
Signed-off-by: Ran Wang
---
Change in v3:
-
This is supplement for patch which would handle A-008997
Compared to other Layerscape SoCs, ls1028a has moved register
PCSTXSWINGFULL from SCFG to DSCR.
Signed-off-by: Ran Wang
---
Change in v3:
- Add more explaination to commit message.
Change in v2:
- Update commit subject to
Hi Peng,
Seems this is a glitch, I was working with the local forked tree (a
copy of the latest U-boot mainline master) + manually applied patch
series for Toradex Colibri iMX8QXP [1]/Apalis iMX8QM [2] support on
top of it (that are still pending in the U-boot ML),
but seems that some of your
Hi Oliver
> -Original Message-
> From: Oliver Graute [mailto:oliver.gra...@gmail.com]
> Sent: 2019年5月14日 16:11
> To: Peng Fan
> Cc: u-boot@lists.denx.de
> Subject: Support for i.MX8QM Boards with SCFW and ATF
>
> Hello,
>
> I have a new i.MX8QM based board here and I'am interested to
On Mon, May 13, 2019 at 5:56 PM Igor Opaniuk wrote:
>
> cpu_imx_get_temp() definition is wrapped with a ifdef macro, which leads
> to warnings if CONFIG_IMX_SCU_THERMAL isn't defined and there are still
> references to this function, as, for example, in cpu_imx_get_desc().
> Drop ifdef as linker
Add SD and EMMC environments to faciliate the boot.
Signed-off-by: Yuantian Tang
---
include/configs/ls1028a_common.h | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index
On Tue, May 14, 2019 at 7:42 AM Ley Foon Tan wrote:
>
> On Fri, May 10, 2019 at 8:17 PM Marek Vasut wrote:
> >
> > On 5/10/19 7:54 AM, Ley Foon Tan wrote:
> > > Add clock manager support for Agilex.
> > >
> > > Signed-off-by: Chee Hong Ang
> > > Signed-off-by: Ley Foon Tan
> > > ---
> > >
On Tue, May 14, 2019 at 7:53 AM Ley Foon Tan wrote:
>
> On Sat, May 11, 2019 at 2:11 AM Simon Goldschmidt
> wrote:
> >
> > Am 10.05.2019 um 16:59 schrieb Dinh Nguyen:
> > >
> > >
> > > On 5/10/19 12:54 AM, Ley Foon Tan wrote:
> > >> Add base address for Intel Agilex SoC.
> > >>
> > >>
On Tue, May 14, 2019 at 8:08 AM Ley Foon Tan wrote:
>
> On Sat, May 11, 2019 at 2:28 AM Simon Goldschmidt
> wrote:
> >
> > Am 10.05.2019 um 07:54 schrieb Ley Foon Tan:
> > > Add reset manager support for Agilex.
> > >
> > > Signed-off-by: Ley Foon Tan
> > > ---
> > >
Also get rid of ahci_setup_port(..).
Signed-off-by: Christian Gmeiner
---
drivers/ata/ahci.c | 12
include/ahci.h | 2 --
2 files changed, 14 deletions(-)
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 188d843197..e3135bb75f 100644
--- a/drivers/ata/ahci.c
+++
Hello,
I have a new i.MX8QM based board here and I'am interested to get it work
with u-boot. Now its starting with NXP flavored u-boot-imx.
CPU: Freescale i.MX8QM revB A53 at 1200 MHz at 48C
Model: Advantech iMX8QM Qseven series
Board: ROM-7720 A1
These boards needs some ARM trusted Firmware
On Tue, May 14, 2019 at 08:21:55AM +0200, Heinrich Schuchardt wrote:
> On 5/14/19 6:58 AM, AKASHI Takahiro wrote:
> >Error message will alert a user that setting/deleting a variable failed.
> >
> >Signed-off-by: AKASHI Takahiro
> >---
> > cmd/nvedit_efi.c | 10 +-
> > 1 file changed, 9
On Tue, May 14, 2019 at 08:27:13AM +0200, Heinrich Schuchardt wrote:
> On 5/14/19 6:58 AM, AKASHI Takahiro wrote:
> >If a user defines BootNext but not BootOrder and loading from BootNext
> >fails, you will see only a message like this:
> > BootOrder not defined
> >
> >This may confuse a user.
From: Yinbo Zhu
This patch is to make usb erratum A-009007 applies to ls1028a
Rx Compliance tests may fail intermittently at high jitter
frequencies using default register values.
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by:
This is suplement for patch which would handle A-008997
Signed-off-by: Ran Wang
---
Change in v2:
- Update commit subject to make it clearer
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
arch/arm/cpu/armv8/fsl-layerscape/soc.c| 4
On 5/14/19 6:57 AM, AKASHI Takahiro wrote:
If a variable already exists, efi_set_variable() should not change
the variable's attributes. This patch enforces it.
This behavior is mandated by UEFI spec 2.7.
Reviewed-by: Heinrich Schuchardt
Signed-off-by: AKASHI Takahiro
---
On 5/14/19 6:58 AM, AKASHI Takahiro wrote:
If a user defines BootNext but not BootOrder and loading from BootNext
fails, you will see only a message like this:
BootOrder not defined
This may confuse a user. Adding an error message will be helpful.
Signed-off-by: AKASHI Takahiro
---
On 5/14/19 6:58 AM, AKASHI Takahiro wrote:
Error message will alert a user that setting/deleting a variable failed.
Signed-off-by: AKASHI Takahiro
---
cmd/nvedit_efi.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c
index
On Sat, May 11, 2019 at 2:28 AM Simon Goldschmidt
wrote:
>
> Am 10.05.2019 um 07:54 schrieb Ley Foon Tan:
> > Add reset manager support for Agilex.
> >
> > Signed-off-by: Ley Foon Tan
> > ---
> > .../mach-socfpga/include/mach/reset_manager.h | 5 ++-
> >
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