On Tue 24 Dec 2019 at 14:25, Anand Moon wrote:
> As per mainline line kernel fix the clk tunnig phase for
> mmc, set Core=180, Tx=0, Rx=0 clk phase for mmc initialization.
>
> Signed-off-by: Anand Moon
> ---
> Changes from previous
> use the mainline kernel tuning for clk tuning.
> Fixed the c
Hi Jerome,
On Thu, 26 Dec 2019 at 14:40, Jerome Brunet wrote:
>
>
> On Tue 24 Dec 2019 at 14:25, Anand Moon wrote:
>
> > As per mainline line kernel fix the clk tunnig phase for
> > mmc, set Core=180, Tx=0, Rx=0 clk phase for mmc initialization.
> >
> > Signed-off-by: Anand Moon
> > ---
> > Cha
Program register bit of SCFG_SNPCNFGCR_USBRDSNP and
SCFG_SNPCNFGCR_USBWRSNP to drive USB read/write
snoop signal on LS1012A.
Signed-off-by: Ran Wang
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arc
>-Original Message-
>From: Wasim Khan
>Sent: Friday, November 15, 2019 2:54 PM
>To: Priyanka Jain ; Z.q. Hou
>
>Cc: u-boot@lists.denx.de; Wasim Khan
>Subject: [PATCH v3 6/9] pci: layerscape: Common device tree fixup for NXP
>SoCs
>
>Add Common device tree fixup for NXP SoCs. Based on SoC
Here are some small changes to fix booting of Odroid N2 using eMMC.
Fixed the clk tunnig during mmc initialization.
Build and tested on top of below patches
[0] https://patchwork.ozlabs.org/patch/1213648/
[1] https://patchwork.ozlabs.org/patch/1213650/
Tested on below eMMC module on Odroid N2 and
As per mainline line kernel fix the clk tunnig phase for
mmc, set Core=180, Tx=0, Rx=0 clk phase for mmc initialization.
Signed-off-by: Anand Moon
---
Changes from previous
v2: Fix the clk phase macro to support PHASE_180
drop the wrong CLK_CORE_PHASE_MASK macro.
v1: use the mainline kernel
Enable GIC support for G12A/G12B platform.
Signed-off-by: Anand Moon
Reviewed-by: Neil Armstrong
---
include/configs/meson64.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index 736081277d..50707a3197 100644
--- a/incl
commit a10388dc6982 ("mmc: meson-gx: add support for mmc-pwrseq-emmc")
introduce CONFIG_PWESEQ for power sequence for eMMC module on
amlogic platform, so enable this to all amlogic boards.
Signed-off-by: Anand Moon
Reviewed-by: Neil Armstrong
---
arch/arm/mach-meson/Kconfig | 1 +
1 file change
Hi Thomas,
On 2019/12/21 上午10:05, Thomas Hebb wrote:
SPL_ROCKCHIP_COMMON_BOARD, an almost identical option, has a title but
this one doesn't for some reason. Add a description to make the menu
easier to read.
Signed-off-by: Thomas Hebb
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/ar
On 2019/12/26 下午3:20, Andy Yan wrote:
The defconfig file for ROC-CC-RK3308 is roc-cc-rk3308_defconfig.
Fixes: 7f08bfb74f04 ("doc: rockchip: Add documentation for rk3308 based
boards")
Signed-off-by: Andy Yan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
doc/README.rockchip | 4 ++--
1
On 2019/12/26 下午3:20, Andy Yan wrote:
When compile the curren mainline linux kernel(Linux 5.5-rc3)
with defconfig, the final Image is 29M, it's much
larger than Linux 5.4.
On the current u-boot side on rk3308, the gap between
kernel and fdt is 25M, the fdt will overwrite kernel
Image, so move
Since v2019.06 DesingWare nSIM supports DesignWare UART simulation
and so we may switch from pretty unusual ARC UART to much more standard
DesignWare UART (which in case of U-Boot is just an ordinary 16650 UART).
This among other things makes built dinaries compatible with our other
platforms to n
We don't have yet any brc700 or big-enadian platforms with networking
support to run this particular configuration.
Whenever QEMU for ARC supports arc700 or big-endian targets we may revisit
this one.
Signed-off-by: Alexey Brodkin
---
configs/nsim_700_defconfig| 1 +
configs/nsim_700be_defc
In this small series we refubrish olde good nSIM configs & platform
so that it no uses standard 16650 (in fact DesignWare) UART and
little-endian HS version also gets Virtio support (Net & BLK) for use
with QEMU.
Alexey Brodkin (3):
ARC: nSIM: switch from ARC UART to DW UART
ARC: nsim_{700|700
Given now nsim_hs38 configuration is usable on QEMU and in QEMU
we have Virtio working perfectly fine the next logical step
is to add support of supported & known to work net & bkl to this
config.
Signed-off-by: Alexey Brodkin
---
arch/arc/Kconfig | 4 ++--
arch/arc/dts/nsim.dt
Add a driver for the rng device found on stm32mp1 platforms. The
driver provides a routine for reading the random number seed from the
hardware device.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
Acked-by: Patrick Delaunay
---
Changes since V4:
* Return number of bytes read on a su
Add a uclass for reading a random number seed from a random number
generator device.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
---
Changes since V4:
* Use Sphinx syntax for Return value in the read function
* Return number of bytes read on a successful read, and a -ve value on
e
Add a random number generator(rng) uclass to facilitate adding drivers
for rng devices. I plan to add an implementation of the
EFI_RNG_PROTOCOL, which would get the random number from the rng
uclass -- the protocol would be used by the efi stub for getting a
random number for the kaslr feature.
Th
Add an entry for allowing clock enablement for the random number
generator peripheral, RNG1.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
Acked-by: Patrick Delaunay
---
drivers/clk/clk_stm32mp1.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/clk_stm32mp1.c b/drive
Enable support for the rng device on the stm32mp15 configs.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
Acked-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 2 ++
configs/stm32mp15_optee_defconfig | 2 ++
configs/stm32mp15_trusted_defconfig | 2 ++
3 files change
Add a sandbox driver for random number generation. Mostly aimed at
providing a unit test for rng uclass.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
---
Changes since V4:
* Return number of bytes read on a successful read, and a -ve value on
error.
* Modify the logic of sandbox_rn
Add a unit test for testing the rng uclass functionality using the
sandbox rng driver.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
---
Changes since V4:
* Change the test checking logic based on changes made in the sandbox
rng driver, which now returns number of bytes read.
test
Enable support for random number generator on sandbox configs. This is
aimed primarily at adding unit test support for rng uclass.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
---
configs/sandbox64_defconfig | 2 ++
configs/sandbox_defconfig | 2 ++
Add a driver for the virtio-rng device on the qemu platform. The
device uses pci as a transport medium. The driver can be enabled with
the following configs
CONFIG_VIRTIO
CONFIG_DM_RNG
CONFIG_VIRTIO_PCI
CONFIG_VIRTIO_RNG
Signed-off-by: Sughosh Ganu
---
Changes since V4:
* Return number of bytes
Add guidcpy function to copy the source guid to the destination
guid. Use this function instead of memcpy for copying to the
destination guid.
Signed-off-by: Sughosh Ganu
Reviewed-by: Heinrich Schuchardt
---
Changes since V1:
* Handle review comments from Heinrich Schuchardt to use guidcpy
ins
The patch series adds support for the EFI_RNG_PROTOCOL routines for
qemu arm64 platform. The getrng routine, used to get the random bytes,
uses the virtio-rng device found on the platform. The protocol, once
installed, can be used by the efi stub in the kernel for getting
random bytes needed for th
Install the EFI_RNG_PROTOCOL implementation for it's subsequent use by
the kernel for features like kaslr.
Signed-off-by: Sughosh Ganu
Reviewed-by: Heinrich Schuchardt
---
Changes since V1:
* Handle review comments from Heinrich Schuchardt to change
efi_rng_protocol_ops to efi_rng_protocol
i
Add support for the EFI_RNG_PROTOCOL routines for the qemu arm64
platform. EFI_RNG_PROTOCOL is an uefi boottime service which is
invoked by the efi stub in the kernel for getting random seed for
kaslr.
The routines are platform specific, and use the virtio-rng device on
the platform to get random
On Wed, 25 Dec 2019 at 03:44, Heinrich Schuchardt
wrote:
> Resending with Cc Tom, Simon, Ilias
>
> On 12/17/19 12:52 PM, Sughosh Ganu wrote:
> > Add a sandbox driver for random number generation. Mostly aimed at
> > providing a unit test for rng uclass.
> >
> > Signed-off-by: Sughosh Ganu
> > Re
On Wed, 25 Dec 2019 at 07:00, Heinrich Schuchardt
wrote:
> On 12/24/19 10:39 PM, Heinrich Schuchardt wrote:
> > On 12/17/19 12:52 PM, Sughosh Ganu wrote:
> >> Add a driver for the virtio-rng device on the qemu platform. The
> >> device uses pci as a transport medium. The driver can be enabled wit
On 12/22/19 3:48 PM, Adam Ford wrote:
> On Sun, Dec 22, 2019 at 8:28 AM Tom Rini wrote:
>>
>> On Sun, Dec 22, 2019 at 08:24:14AM -0600, Derald D. Woods wrote:
>>> On Sun, Dec 22, 2019 at 09:10:50AM -0500, Tom Rini wrote:
On Sun, Dec 22, 2019 at 09:46:27AM +0100, Patrik Dahlstrom wrote:
>
On Thu, Dec 26, 2019 at 12:02 PM Patrik Dahlstrom wrote:
>
> On 12/22/19 3:48 PM, Adam Ford wrote:
> > On Sun, Dec 22, 2019 at 8:28 AM Tom Rini wrote:
> >>
> >> On Sun, Dec 22, 2019 at 08:24:14AM -0600, Derald D. Woods wrote:
> >>> On Sun, Dec 22, 2019 at 09:10:50AM -0500, Tom Rini wrote:
>
On Thu, Dec 26, 2019 at 02:57:44PM -0600, Adam Ford wrote:
> On Thu, Dec 26, 2019 at 12:02 PM Patrik Dahlstrom
> wrote:
> >
> > On 12/22/19 3:48 PM, Adam Ford wrote:
> > > On Sun, Dec 22, 2019 at 8:28 AM Tom Rini wrote:
> > >>
> > >> On Sun, Dec 22, 2019 at 08:24:14AM -0600, Derald D. Woods wrot
On 12/26/19 10:22 PM, Derald D. Woods wrote:
> On Thu, Dec 26, 2019 at 02:57:44PM -0600, Adam Ford wrote:
>> On Thu, Dec 26, 2019 at 12:02 PM Patrik Dahlstrom
>> wrote:
>>>
>>> On 12/22/19 3:48 PM, Adam Ford wrote:
On Sun, Dec 22, 2019 at 8:28 AM Tom Rini wrote:
>
> On Sun, Dec 22,
On Fri, Dec 20, 2019 at 11:35:20AM +0530, Lokesh Vutla wrote:
> As per the email discussion[0], add myself as a maintainer to
> OMAPL138_LCDK and drop Peter's entry.
>
> [0]
> http://u-boot.10912.n7.nabble.com/OMAP-L138-LCDK-giving-up-maintainership-td394211.html
>
> Signed-off-by: Lokesh Vutla
On Wed, Nov 06, 2019 at 04:21:16PM +0200, Roger Quadros wrote:
> Introduce a mode property in the driver data so that
> we don't have to keep using "of_device_is_compatible()"
> throughtout the driver.
>
> No functional change.
>
> Signed-off-by: Roger Quadros
Applied to u-boot/master, thanks!
On Wed, Nov 06, 2019 at 04:21:15PM +0200, Roger Quadros wrote:
> The AM572x Technical Reference Manual, SPRUHZ6H,
> Revised November 2016 [1], shows recommended settings for the
> SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.
>
> Use those settings in the driver. The TRM does not
On Wed, Nov 06, 2019 at 04:21:18PM +0200, Roger Quadros wrote:
> As per "Table 26-7. SATA PHY Subsystem Low-Level Programming Sequence"
> in TRM [1] we need to turn on SATA_PHY_TX before SATA_PHY_RX.
>
> [1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
>
> Signed-off-by: R
On Wed, Nov 06, 2019 at 04:21:17PM +0200, Roger Quadros wrote:
> For increased DPLL stability use the settings recommended in
> the TRM [1] for PHY_RX registers for SATA and USB.
>
> For SATA we need to use spread spectrum settings even
> though we don't have spread spectrum enabled. The
> sugges
On Thu, Dec 26, 2019 at 10:24:24PM +0100, Patrik Dahlstrom wrote:
> On 12/26/19 10:22 PM, Derald D. Woods wrote:
> > On Thu, Dec 26, 2019 at 02:57:44PM -0600, Adam Ford wrote:
> >> On Thu, Dec 26, 2019 at 12:02 PM Patrik Dahlstrom
> >> wrote:
> >>>
> >>> On 12/22/19 3:48 PM, Adam Ford wrote:
> >>
Support packing optional second level boot-loader:
$ ./tools/mkimage -n rk3399 -T rksd -d \
rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out -v
Adding Image rk3399_ddr_800MHz_v1.24.bin
Size 116492(pad to 116736)
Adding Image rk3399_miniloader_v1.19.bin
Size 88060(pad to 88064)
Image T
Add documentation about packing optional second level boot-loader with
mkimage tool.
Signed-off-by: Jeffy Chen
Reviewed-by: Kever Yang
---
Changes in v3: None
Changes in v2: None
doc/README.rockchip | 11 +++
1 file changed, 11 insertions(+)
diff --git a/doc/README.rockchip b/doc/REA
When enabling back-to-bootrom, the bootrom would continue to load the
second level boot-loader. And currently we are packing it by appending
the generated image manually (with a predefined max size):
./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
firefly-rk3288/spl/u-boot-spl-dtb.bin o
The rc4 encoding should cover spl header as well, and the file_size
contains spl header too.
Signed-off-by: Jeffy Chen
Reviewed-by: Kever Yang
---
Changes in v3: None
Changes in v2: None
tools/rkimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/rkimage.c b/tool
When enabling back-to-bootrom, the bootrom would continue to load the
second level boot-loader. And currently we are packing it by appending
the generated image manually (with a predefined max size):
./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
firefly-rk3288/spl/u-boot-spl-dtb.bin o
Support packing optional second level boot-loader:
$ ./tools/mkimage -n rk3399 -T rksd -d \
rk3399_ddr_800MHz_v1.24.bin:rk3399_miniloader_v1.19.bin out -v
Adding Image rk3399_ddr_800MHz_v1.24.bin
Size 116492(pad to 116736)
Adding Image rk3399_miniloader_v1.19.bin
Size 88060(pad to 88064)
Image T
The rc4 encoding should cover spl header as well, and the file_size
contains spl header too.
Signed-off-by: Jeffy Chen
Reviewed-by: Kever Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
tools/rkimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/to
Add documentation about packing optional second level boot-loader with
mkimage tool.
Signed-off-by: Jeffy Chen
Reviewed-by: Kever Yang
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
doc/README.rockchip | 11 +++
1 file changed, 11 insertions(+)
diff --git a/doc/READM
On Mon, Dec 23, 2019 at 8:00 AM Kever Yang wrote:
>
>
> On 2019/12/21 下午3:54, Jagan Teki wrote:
> > The Rockchip SPI controller's length register only supports 16-bits,
> > yielding a maximum length of 64KiB (the CTRLR1 register holds "length -
> > 1"). Trying to transfer more than that (e.g., wit
Hello, I Have a demo board which has 8 GB ram. Trying to boot with ramdisk.
When I use large size ramdisk image (447.8 MiB), it's giving Bad CRC while
verifying checksum. When I use small size (49 MiB) its verifiying
successfully. What is the reason of it ?
The commands I use are,
tftp 200 uI
Hi Kever,
On Mon, Dec 23, 2019 at 8:04 AM Kever Yang wrote:
>
> Jagan,
>
>
> On 2019/12/21 下午3:54, Jagan Teki wrote:
> > Most of the SPI flash devices in rockchip are 16MiB size.
> >
> > So, keeping U-Boot proper offset start from 128MiB with 1MiB
> > size and then start env of 8KiB would be a co
On 12/26/19 6:25 PM, Sughosh Ganu wrote:
Add a sandbox driver for random number generation. Mostly aimed at
providing a unit test for rng uclass.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
---
Changes since V4:
* Return number of bytes read on a successful read, and a -ve value o
On 12/26/19 6:25 PM, Sughosh Ganu wrote:
Add a uclass for reading a random number seed from a random number
generator device.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
---
Changes since V4:
* Use Sphinx syntax for Return value in the read function
* Return number of bytes read o
On 12/26/19 6:25 PM, Sughosh Ganu wrote:
Add a driver for the virtio-rng device on the qemu platform. The
device uses pci as a transport medium. The driver can be enabled with
the following configs
CONFIG_VIRTIO
CONFIG_DM_RNG
CONFIG_VIRTIO_PCI
CONFIG_VIRTIO_RNG
Signed-off-by: Sughosh Ganu
---
On 12/26/19 6:25 PM, Sughosh Ganu wrote:
Add a driver for the rng device found on stm32mp1 platforms. The
driver provides a routine for reading the random number seed from the
hardware device.
Signed-off-by: Sughosh Ganu
Reviewed-by: Patrice Chotard
Acked-by: Patrick Delaunay
---
Changes sinc
Hi Marek,
On Thu, Oct 3, 2019 at 6:30 PM Marek Vasut wrote:
>
> Convert the designware watchdog timer driver to DM and add DT probing
> support. Perform minor coding style clean up, like drop superfluous
> braces. There ought to be no functional change.
>
> Signed-off-by: Marek Vasut
> Cc: Chin
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