On 1/28/20 10:44 AM, Patrick Delaunay wrote:
> Use int as result of dm_i2c_reg_read to avoid warning with
> W=1 (warning: comparison is always false due to limited range
> of data type [-Wtype-limits])
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/pinctrl/pinctrl-stmfx.c | 7 ---
> 1
On 1/28/20 10:44 AM, Patrick Delaunay wrote:
> Change the dfu functions dfu_otp_read and dfu_pmic_read to static,
> this patch avoids warning when compiling with W=1.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/stm32mp1/stm32mp1.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletio
On 1/28/20 10:44 AM, Patrick Delaunay wrote:
> Add include for dfu, add prototype for set_dfu_alt_info
> and avoid warning when compiling with W=1.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/stm32mp1/stm32mp1.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/board/st/stm32mp
Currently, sdhci_prepare_dma() calls flush_cache() regardless of the
DMA direction.
Actually, cache invalidation is enough when reading data from the device.
This is correctly handled by dma_map_single(), which mimics the DMA-API
in Linux kernel. Drivers can be agnostic which cache operation occu
Copied from Linux kernel.
include/linux/mmc/host.h
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2: None
include/mmc.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/mmc.h b/include/mmc.h
index b5cb514f57d6..71e2e1735ad5 100644
--- a/include/mmc.h
+++ b/
This driver currently performs cache operation before the DMA start,
but does nothing after the DMA completion.
When reading data by DMA, the cache invalidation is needed also after
finishing the DMA transfer. Otherwise, the CPU might read data from
the cache instead of from the main memory when s
host->mmc is already (struct mmc *).
memalign() returns an opaque pointer, so there is no need for casting.
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2: None
drivers/mmc/sdhci.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/sdhci
To avoid "asm/dma-mapping.h: No such file or directory" error,
we need something.
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2:
- New patch
arch/arc/include/asm/dma-mapping.h| 1 +
arch/m68k/include/asm/dma-mapping.h | 1 +
arch/microblaze/include/asm/
My main motivation of this series is the last patch
"mmc: sdhci: fix missing cache invalidation after reading by DMA".
Currently, read data are occasionally corrupted due to the
missing cache invalidation.
To fix it nicely (adds dma_unmap_single(), which follows the
Linux coding style), I did som
dma_unmap_single() takes the dma address, not virtual address.
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/dma-mapping.h | 4 +---
arch/nds32/include/asm/dma-mapping.h | 4 +---
arch/riscv/include/asm/dma-mapping.h | 4 +---
arch/x86/includ
The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).
Unify the code.
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2: None
drivers/mmc/sdhci.c | 22 --
include/sdhci.h | 2 ++
2 files changed, 10
Using the global variable does not look nice.
Add a new field sthci::align_buffer to point to the bounce buffer.
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2: None
drivers/mmc/sdhci.c | 27 +--
include/sdhci.h | 1 +
2 files changed, 14 ins
Use {lower,upper}_32_bits() instead of the combination of cast
and shift.
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2: None
drivers/mmc/sdhci.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index b471
Make dma_map_single() return the dma address, and remove the
pointless volatile.
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/dma-mapping.h | 5 +++--
arch/nds32/include/asm/dma-mapping.h | 5 +++--
arch/riscv/include/asm/dma-mapping.h | 5 +
The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.
Factor them out to , and make all drivers to
include instead of .
If we need to differentiate them for some architectures, we can
move the generic definitions to .
Add
Hi Bin,
>-Original Message-
>From: Bin Meng
>Sent: 11 February 2020 12:48
>To: Pragnesh Patel
>Cc: U-Boot Mailing List ; Atish Patra
>; Palmer Dabbelt ; Paul
>Walmsley ( Sifive) ; Jagan Teki
>; Anup Patel ; Palmer
>Dabbelt ( Sifive)
>Subject: Re: [PATCH] Add CONFIG_OF_SEPARATE in sifive
The latest data manual SPRSP08I –NOVEMBER 2017–REVISED DECEMBER 2019[1]
for am65xx SoC states the new MPU nominal voltages to be 1.1V (OPP_NOM),
1.2V (OPP_OD) and 1.24V (OPP_TURBO). Update the nominal voltages in the
K3 AVS driver to reflect this.
[1] http://www.ti.com/lit/gpn/am6528
Signed-off-b
On Fri, Feb 14, 2020 at 2:43 PM Masahiro Yamada
wrote:
>
> The implementation of dma_map_single() and dma_unmap_single() is
> exactly the same for all the architectures that support them.
>
> Factor them out to , and make all drivers to
> include instead of .
>
> If we need to differentiate them
This driver currently performs cache operation before the DMA start,
but does nothing after the DMA completion.
When reading data by DMA, the cache invalidation is needed also after
finishing the DMA transfer. Otherwise, the CPU might read data from
the cache instead of from the main memory when s
Copied from Linux kernel.
include/linux/mmc/host.h
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
include/mmc.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/mmc.h b/include/mmc.h
index b5cb514f57d6..71e2e1735ad5 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -12
Use {lower,upper}_32_bits() instead of the combination of cast
and shift.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mmc/sdhci.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index b4713e7b9bba..fefe81016e
Currently, sdhci_prepare_dma() calls flush_cache() regardless of the
DMA direction.
Actually, cache invalidation is enough when reading data from the device.
This is correctly handled by dma_map_single(), which mimics the DMA-API
in Linux kernel. Drivers can be agnostic which cache operation occu
host->mmc is already (struct mmc *).
memalign() returns an opaque pointer, so there is no need for casting.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mmc/sdhci.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdh
The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.
Factor them out to , and make all drivers to
include instead of .
If we need to differentiate them for some architectures, we can
move the generic definitions to .
Add
My main motivation of this series is the last patch
"mmc: sdhci: fix missing cache invalidation after reading by DMA".
Currently, read data are occasionally corrupted due to the
missing cache invalidation.
To fix it nicely (adds dma_unmap_single(), which follows the
Linux coding style), I did s
The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).
Unify the code.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mmc/sdhci.c | 22 --
include/sdhci.h | 2 ++
2 files changed, 10 insertions(+), 14 de
dma_unmap_single() takes the dma address, not virtual address.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
arch/arm/include/asm/dma-mapping.h | 4 +---
arch/nds32/include/asm/dma-mapping.h | 4 +---
arch/riscv/include/asm/dma-mapping.h | 4 +---
arch/x86/include/asm/dma-mapping.h
Using the global variable does not look nice.
Add a new field sthci::align_buffer to point to the bounce buffer.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/mmc/sdhci.c | 27 +--
include/sdhci.h | 1 +
2 files changed, 14 insertions(+), 14 delet
To avoid "asm/dma-mapping.h: No such file or directory" error,
we need something.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- New patch
arch/arc/include/asm/dma-mapping.h| 1 +
arch/m68k/include/asm/dma-mapping.h | 1 +
arch/microblaze/include/asm/dma-mapping.h | 1 +
Make dma_map_single() return the dma address, and remove the
pointless volatile.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
arch/arm/include/asm/dma-mapping.h | 5 +++--
arch/nds32/include/asm/dma-mapping.h | 5 +++--
arch/riscv/include/asm/dma-mapping.h | 5 +++--
arch/x86/inclu
Reserve DDR memory region used for GIC LPI configuration table.
Signed-off-by: Wasim Khan
---
board/freescale/lx2160a/lx2160a.c | 16
1 file changed, 16 insertions(+)
diff --git a/board/freescale/lx2160a/lx2160a.c
b/board/freescale/lx2160a/lx2160a.c
index d8753b1..34f866b 1006
This patch set programs GIC LPI configuration table from
Uboot for NXP's LX2160A SoC.
Wasim Khan (3):
board: fsl: lx2160a: Program GIC LPI configuration table
configs: lx2160a: Enable GIC_V3_ITS config
board: fsl: lx2160a: Add GIC LPI memory reserve fixup
board/freescale/lx2160a/lx2160a.c
Program GIC LPI configuration table:
1. Redistributor PROCBASER configuration table (which
is common for all redistributors)
2. Redistributor pending table (PENDBASER), for all the
available redistributors.
Signed-off-by: Manish Tomar
Signed-off-by: Wasim Khan
---
This patch has dependency on
Enable GIC_V3_ITS config to program GIC LPI
configuration table.
Signed-off-by: Wasim Khan
---
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160aqds_tfa_defconfig | 1 +
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160ardb_tfa_defconfig
Hi Peng,
On Fri, Feb 14, 2020 at 9:50 AM Peng Fan wrote:
>
> Hi Masahiro,
>
> > Subject: [PATCH 0/9] mmc: sdhci: code clean-up and fix cache coherency
> > problem.
>
> CI, build fail, please give a check.
>
> mips: + pic32mzdask
> +drivers/mmc/sdhci.c:18:10: fatal error: asm/dma-mapping.
Macro SZ_64K is undeclared. Include sizes.h to fix the compilation
error.
Signed-off-by: Wasim Khan
---
arch/arm/lib/gic-v3-its.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c
index e19ab01..6ee22d2 100644
--- a/arch/arm/lib/gic-v3-its.
On 13/02/20 10:42 PM, Neil Armstrong wrote:
> Hi,
>
> On 03/02/2020 14:59, Oliver Graute wrote:
>> The conga-imx8 board isn't booting without this revert. Can someone tell me
>> what I need to Do so that this revert is not necessary?
Can you give more details on where the failure is happening?
Tom, Simon,
Is CONFIG_SYS_RELOC_GD_ENV_ADDR really needed on sandbox?
When I try to have a variable environment on emulated SPI flash,
the U-Boot binary always crashes: (NOTE: assuming CONFIG_ENV_ADDR == 0)
$ dd if=/dev/zero of=./spi.bin bs=1M count=4
$ u-boot -T
U-Boot 2020.04-rc2-00
Hi Peng,
On Thu, Feb 13, 2020 at 9:44 PM Peng Fan wrote:
> Are you using upstream kernel? Or downstream kernel and which release?
I have tried upstream and also NXP kernel 4.19.35 without success so far.
Thanks
Hi Masahiro,
> Subject: [PATCH 0/9] mmc: sdhci: code clean-up and fix cache coherency
> problem.
CI, build fail, please give a check.
mips: + pic32mzdask
+drivers/mmc/sdhci.c:18:10: fatal error: asm/dma-mapping.h: No such file or
directory
+ #include
+ ^~~
+co
Hi Fabio
> Subject: Re: i.MX8QXP MEK does not boot
>
> Hi Peng,
>
> On Wed, Feb 12, 2020 at 1:54 PM Fabio Estevam
> wrote:
> >
> > Hi Peng,
> >
> > i.MX8QXP MEK board is not booting for me on 2020.04-rc2.
> >
> > I am using the ATF, imx-firmware and imx-sc-firmware as stated at
> > board/freesc
On Thu, Feb 13, 2020 at 2:11 PM Ard Biesheuvel
wrote:
>
> On Thu, 13 Feb 2020 at 19:59, Atish Patra wrote:
> >
> > On Tue, Feb 11, 2020 at 11:28 PM Ard Biesheuvel
> > wrote:
> > >
> > > On Wed, 12 Feb 2020 at 06:49, Chang, Abner (HPS SW/FW Technologist)
> > > wrote:
> > > >
> > > >
> > > >
> >
On Thu, Feb 06, 2020 at 05:12:59PM +0100, Philippe Reynes wrote:
> In the first version, the result of malloc is checked
> with ut_assertnonnull. But on a fail, this macro exit
> the function, so previously malloc are not freed.
>
> So to avoid a memleak, we don't use ut_assertnonnull,
> but simp
On Wed, Feb 12, 2020 at 06:23:49PM +0100, Heinrich Schuchardt wrote:
> Avoid errors of like
>
> common/console.c: In function ‘console_record_reset’:
> common/console.c:615:16: error: passing argument 1 of ‘membuff_purge’
> discards ‘volatile’ qualifier from pointer target type
> [-Werror=discard
On Fri, Feb 07, 2020 at 03:17:42PM +, Rasmus Villemoes wrote:
> Signed-off-by: Rasmus Villemoes
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, Feb 13, 2020 at 08:29:45AM +0100, Michal Simek wrote:
> There is no reason to show RAM_ROCKCHIP_DEBUG entry in other .config files
> as I see it for Xilinx ZynqMP.
>
> \# CONFIG_U_QE is not set
> \# CONFIG_RAM is not set
> CONFIG_RAM_ROCKCHIP_DEBUG=y
>
> Add missing dependency on RAM_ROC
On Fri, Feb 07, 2020 at 09:25:09PM +0100, Heinrich Schuchardt wrote:
> Fix a build error
>
> checking consistency...
> /doc/board/rockchip/index.rst:
> WARNING: document isn't included in any toctree
>
> Fixes: 338b86c9b305 ("doc: boards: Add rockchip documentation")
> Signed-off-by: Heinrich Sc
On Tue, Feb 11, 2020 at 12:41:14PM -0500, Tom Rini wrote:
> When running our tests there are some cases where as part of the Python
> 2.7 to Python 3.6 migration we didn't force Python 3.6 to be used as
> everything wasn't yet migrated. Now that everything is, make sure to
> tell virtualenv to us
On Wed, Feb 05, 2020 at 09:59:12PM +0100, Heinrich Schuchardt wrote:
> Currently the size of pci_addr_t and pci_size_t depends on
> CONFIG_SYS_PCI_64BIT. For qemu_arm64_defconfig with 4 GiB RAM this leads
> to an error
>
> pci_hose_phys_to_bus: invalid physical address
>
> which is due to th
On Wed, Feb 05, 2020 at 08:54:42AM +0200, Ovidiu Panait wrote:
> clear_bss is already used by 3 arches (x86, arc, xtensa), so make it generic
> and provide a weak nop stub for it. This also removes arch-specific ifdef
> duplications around clear_bss.
>
> Signed-off-by: Ovidiu Panait
Applied to
On Thu, 13 Feb 2020 at 19:59, Atish Patra wrote:
>
> On Tue, Feb 11, 2020 at 11:28 PM Ard Biesheuvel
> wrote:
> >
> > On Wed, 12 Feb 2020 at 06:49, Chang, Abner (HPS SW/FW Technologist)
> > wrote:
> > >
> > >
> > >
> > > > -Original Message-
> > > > From: Heinrich Schuchardt [mailto:xypr
On Thu, Feb 13, 2020 at 6:17 PM Tom Rini wrote:
>
> On Wed, Feb 05, 2020 at 12:01:38AM +, Atish Patra wrote:
> > On Fri, 2019-11-22 at 18:19 -0800, Atish Patra wrote:
> > > On Wed, 2019-11-13 at 11:47 -0800, Atish Patra wrote:
> > > > On Wed, 2019-11-13 at 15:36 +0200, David Abdurachmanov wrot
Unfortunately a recent change adjusted the order of the checks here such
that 400MHz now shows up as fast-plus speed (1Mbps). Fix it.
Signed-off-by: Simon Glass
Fixes: d96440d1e3 ("i2c: designware_i2c: Add support for fast-plus speed")
---
drivers/i2c/designware_i2c.c | 4 ++--
1 file changed,
On Tue, Feb 11, 2020 at 11:28 PM Ard Biesheuvel
wrote:
>
> On Wed, 12 Feb 2020 at 06:49, Chang, Abner (HPS SW/FW Technologist)
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> > > Sent: Wednesday, February 12, 2020 2:26 AM
> > > T
Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes
which aren't devices themselves but may contain some:
- "/chosen"
- "/clocks"
- "/firmware"
The patch removes the strcmp call in recursive function dm_scan_fdt_live()
and also corrects a conflict with the 2 applied patches in
the
Hi Joe,
On Thu, Jan 9, 2020 at 3:28 PM Fabio Estevam wrote:
>
> On some i.MX8QXP MEK boards with no MAC address stored, the following
> hang is seen:
>
> Error: ethernet@5b04 address not set.
>
> (Board hangs)
>
> One way to avoid this issue is to select CONFIG_NET_RANDOM_ETHADDR, so
> that a
Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes
which aren't devices themselves but may contain some:
- "/chosen"
- "/clocks"
- "/firmware"
The patch avoid to call strcmp in recursive function dm_scan_fdt_live()
and also corrects a conflict with the 2 applied patches in
the co
On Thu, Feb 13, 2020 at 2:58 PM Pedro Jardim wrote:
>
> This fixes the following warning:
>
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 relea
From: Patrice Chotard
If gd->ram_top has been tuned using board_get_usable_ram_top(),
it must be taken into account when reserving arch lmb.
Signed-off-by: Patrice Chotard
Reviewed-by: Patrick DELAUNAY
Signed-off-by: Patrick Delaunay
---
arch/arm/lib/bootm.c | 3 +++
1 file changed, 3 inser
Hi Peng,
On Wed, Feb 12, 2020 at 1:54 PM Fabio Estevam wrote:
>
> Hi Peng,
>
> i.MX8QXP MEK board is not booting for me on 2020.04-rc2.
>
> I am using the ATF, imx-firmware and imx-sc-firmware as stated at
> board/freescale/imx8qxp_mek/README
>
> Any ideas?
Sorry for the noise. I was flashing th
This fixes the following warning:
= WARNING ==
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
Hi,
i guess you mean this (board is bananapi R64, not M64):
board/mediatek/mt7622/mt7622_rfb.c
arch/arm/dts/mt7622.dtsi
arch/arm/dts/mt7622-rfb.dts
currently i have added
CONFIG_BINMAN_FDT=n
to configs/mt7622_rfb_defconfig to avoid the Problem
regards Frank
> Gesendet: Donnerstag, 13. Febru
On Thu, Feb 13, 2020 at 05:57:25PM +0100, Jens Rehsack wrote:
>
>
> > Am 13.02.2020 um 16:01 schrieb Tom Rini :
> >
> > On Thu, Feb 13, 2020 at 02:33:53PM +0100, Jens Rehsack wrote:
> >
> >> From: Jens Rehsack
> >>
> >> Introduce SUPPLIER analogous to VENDOR to allow (from customer perspectiv
Hi Frank,
On Wed, 12 Feb 2020 at 11:02, Frank Wunderlich wrote:
>
> Hi
>
> Why not just disable binman_fdt (or not default y)? Your way sounds more
> complex. As i do not understand it and see no benefit for this board, i would
> leave it disabled. This leave time for a thoughtful solution
> Ma
Hi,
On 03/02/2020 14:59, Oliver Graute wrote:
> The conga-imx8 board isn't booting without this revert. Can someone tell me
> what I need to Do so that this revert is not necessary?
>
> This reverts commit 52edfed65de967a86983a55c51ba0727090efc43.
> ---
> drivers/core/device-remove.c | 5 -
>
> Am 13.02.2020 um 16:01 schrieb Tom Rini :
>
> On Thu, Feb 13, 2020 at 02:33:53PM +0100, Jens Rehsack wrote:
>
>> From: Jens Rehsack
>>
>> Introduce SUPPLIER analogous to VENDOR to allow (from customer perspective)
>> a VENDOR using it's SUPPLIER's common/ code.
>>
>> This is reasonable, wh
Hi Patrice,
> From: Patrice CHOTARD
> Sent: lundi 3 février 2020 15:01
>
> Remove fdt_high and initrd_high as they shouldn't be used, this allows the
> fdt and
> initrd relocation.
> This implies to set CONFIG_SYS_BOOTMAPSZ to indicate the amount of
> memory available to contain kernel, device
Hi Patrice,
> From: Patrice CHOTARD
> Sent: lundi 3 février 2020 15:11
>
> For stm32 f4, f7 and h7 boards, remove fdt_high and initrd_high as they
> shouldn't
> be used, this allows the fdt and initrd relocation.
> This implies to set CONFIG_SYS_BOOTMAPSZ to indicate the amount of
> memory avai
Hi Neil,
On Thu, 13 Feb 2020 at 21:09, Neil Armstrong wrote:
>
> On 13/02/2020 12:58, Anand Moon wrote:
> > hi Niel / Jerome,
> >
> > Thanks for your review comments and debug output
> > Sorry for late reply.
> >
> > On Mon, 10 Feb 2020 at 14:33, Neil Armstrong
> > wrote:
> >>
> >> On 09/02/202
Hi Patrice,
> From: Patrice CHOTARD
> Sent: lundi 3 février 2020 15:11
>
> For stm32f4, f7 and h7 boards, reserve:
> - 4MB for kernel
> - 64KB for fdt, boot script, pxefile
> - the remaining memory for ramdisk
>
> Signed-off-by: Patrice Chotard
> ---
Reviewed-by: Patrick Delaunay
Thanks,
On Wed, Feb 05, 2020 at 12:01:38AM +, Atish Patra wrote:
> On Fri, 2019-11-22 at 18:19 -0800, Atish Patra wrote:
> > On Wed, 2019-11-13 at 11:47 -0800, Atish Patra wrote:
> > > On Wed, 2019-11-13 at 15:36 +0200, David Abdurachmanov wrote:
> > > > On Sat, Nov 9, 2019 at 2:14 AM Atish Patra
> >
u-boot bindings are missed or obsolete.
>
>> Can you please sync it if you want to keep it in the same was as is done
>> in Linux?
>
> So, may be it can be just deleted.
I am ok with that.
>
>>
>>> - code readability
>>
>> I don't think this is really changing code readability. For improving
>> readability would be the best to move bodies of these ifs to separate
>> functions and not have dp83867_config() ~140 lines long.
>
> It really too minor change to fight for. But if you wish you can update
> kernel
> driver as per-above your proposal and then port it in u-boot.
I was looking at latest kernel code and it is designed differently there.
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/net/phy/dp83867.c?h=next-20200213#n479
there is
if rgmii or sgmii
if rgmii
io impedance
if sgmii
in u-boot you have
if rgmii
if sgmii
io impedance
I am ok with having this in sync but that's not what we have today.
Thanks,
Michal
Dear Rasmus,
In message you wrote:
>
> I'm sorry, I see I mistyped in my example above, it should have been
>
> if test $slot = "A" ; setenv result $BOOT_A_LEFT ...
>
> as should hopefully be clear from the original post and the eval
> examples. So to reiterate, the problem is to get the cont
On 13/02/2020 08:23, Michal Simek wrote:
On 12. 02. 20 21:24, Grygorii Strashko wrote:
On 11/02/2020 10:11, Michal Simek wrote:
On 10. 02. 20 13:07, Grygorii Strashko wrote:
On 07/02/2020 13:31, Michal Simek wrote:
There is no reason to check sgmii branch again when it is clear that
ph
On 13/02/2020 12:58, Anand Moon wrote:
> hi Niel / Jerome,
>
> Thanks for your review comments and debug output
> Sorry for late reply.
>
> On Mon, 10 Feb 2020 at 14:33, Neil Armstrong wrote:
>>
>> On 09/02/2020 18:22, Anand Moon wrote:
>>> Hi Neil,
>>>
>>> Thanks for you review comments.
>>>
>>
On Thu, Feb 13, 2020 at 02:33:53PM +0100, Jens Rehsack wrote:
> From: Jens Rehsack
>
> Introduce SUPPLIER analogous to VENDOR to allow (from customer perspective)
> a VENDOR using it's SUPPLIER's common/ code.
>
> This is reasonable, when a VENDOR (from customer perspective) builds
> several ma
From: Jens Rehsack
Introduce SUPPLIER analogous to VENDOR to allow (from customer perspective)
a VENDOR using it's SUPPLIER's common/ code.
This is reasonable, when a VENDOR (from customer perspective) builds
several machines sharing some features (e.g. some FPGA which has to be
initialized duri
Signed-off-by: Josip Kelečić
Cc: Luka Perkov
---
arch/arm/dts/Makefile | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 4fee5cc489..634197bf35 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makef
On Wed, Feb 12, 2020 at 07:30:55PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> The following changes since commit 26d4d77035d20364afc08c3098581a638b4edda8:
>
> Revert "gitlab: Disable SDL when building sandbox" (2020-02-12 08:05:54
> -0500)
>
> are available in the Git repository at:
>
> g
Hey all,
First, I drafted this email and tagged and pushed everything out
yesterday and then promptly forgot to send this. Sorry!
Second, I know I'm slightly late but the DM PR slipped my mind at first
and then slipped in a regression. That's fixed and overnight all of the
different CI systems
DEVICE_TREE variable is not exported from dts/Makefile that's why it is
necessary to setup directly before use.
Fixes: 312f2c5b14fa ("arm: xilinx: Use device tree which can be passed on cmd
line")
Signed-off-by: Michal Simek
---
It was found by more intensive testing.
Another option would be t
From: Moses Christopher Bollavarapu
- As tiny printf lib is further optimized, the ability to deal with
ethaddr is lost. Hence, in order to handle usb-eth boot from SPL
we need to disable tiny printf.
- Tested on Beagle Bone Black
Signed-off-by: Moses Christopher Bollavarapu
---
c
On Thu, Feb 13, 2020 at 9:24 AM Pedro Jardim wrote:
>
> This fixes the following warning:
>
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 relea
On 1/28/20 10:11 AM, Patrick Delaunay wrote:
> Add support for Rev.Z of STM32MP15x cpu.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cpu.c| 3 +++
> arch/arm/mach-stm32mp/include/mach/sys_proto.h | 1 +
> 2 files changed, 4 insertions(+)
>
> diff --git
On Thu, Feb 13, 2020 at 08:33:09AM +0100, Michal Simek wrote:
> pá 7. 2. 2020 v 13:07 odesílatel Michal Simek
> napsal:
> >
> > Base autodetection is failing for this case:
> > if test 257 -gt 3ae; then echo first; else echo second; fi
> >
> > It is because base for 3ae is recognized by _parse_in
This fixes the following warning:
= WARNING ==
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
Hi Jerome / Neil,
On Mon, 10 Feb 2020 at 15:05, Jerome Brunet wrote:
>
>
> On Sun 09 Feb 2020 at 18:22, Anand Moon wrote:
>
> > Hi Neil,
> >
> > Thanks for you review comments.
> >
> > On Sun, 9 Feb 2020 at 18:38, Neil Armstrong wrote:
> >>
> >> Hi,
> >>
> >> Le 09/02/2020 à 12:05, Anand Moon a
On 13/02/2020 12:47, Lokesh Vutla wrote:
On 13/02/20 3:04 PM, Tero Kristo wrote:
Initialize both ESM and ESM_PMIC support if available for the board.
If support is not available for either, a warning is printed out.
ESM signals are only properly routed on PM2 version of the J721E SOM,
so only
On 13/02/2020 12:49, Lokesh Vutla wrote:
On 13/02/20 3:04 PM, Tero Kristo wrote:
Main domain ESM support is needed to configure main domain watchdogs
to generate ESM pin events by default. On J7 processor board these
propagate to the PMIC to generate a reset when watchdog expires.
Signed-off-
hi Niel / Jerome,
Thanks for your review comments and debug output
Sorry for late reply.
On Mon, 10 Feb 2020 at 14:33, Neil Armstrong wrote:
>
> On 09/02/2020 18:22, Anand Moon wrote:
> > Hi Neil,
> >
> > Thanks for you review comments.
> >
> > On Sun, 9 Feb 2020 at 18:38, Neil Armstrong wrote:
Good afternoon,
I'm working on a variant of IMX6UL. I'd like to create SPL Uboot and put all
of them on QSPI. The board has only QSPI NOR and NAND flashes so it's
complicated for me since no SD card.
I've searched and read from the internet but there's no any particular guide
to show how to do tha
On 12.02.20 09:57, Weijie Gao wrote:
And more general: why do we need to code this in every loader? I think it would
be preferrable to have the loader load the binary data and do the decompression
(and entry_point assignment) in a central place so that all loaders can benefit
from compression.
> -Original Message-
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Wednesday, February 12, 2020 2:26 AM
> To: Chang, Abner (HPS SW/FW Technologist) ;
> Atish Patra ; Ard Biesheuvel
>
> Cc: Alexander Graf ; U-Boot Mailing List b...@lists.denx.de>; Atish Patra ;
> l...@n
Hi Weijie,
On 12.02.20 08:49, Weijie Gao wrote:
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.
The increment of size is very small (
On 12.02.20 09:15, Weijie Gao wrote:
On Wed, 2020-02-12 at 08:55 +0100, Stefan Roese wrote:
Hi Weijie,
On 12.02.20 08:49, Weijie Gao wrote:
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot im
Hi Mani,
>
> Sorry for the late reply. Got swamped with lot of stuffs :(
>
> Thanks a lot for the series! I will review it soon and test it on my S900
> based Bubblegum 96 board.
No worries, Thanks for the update!
Thanks
-Amit
On 13/02/20 3:04 PM, Tero Kristo wrote:
> Main domain ESM support is needed to configure main domain watchdogs
> to generate ESM pin events by default. On J7 processor board these
> propagate to the PMIC to generate a reset when watchdog expires.
>
> Signed-off-by: Tero Kristo
> ---
> arch/ar
On 13/02/20 3:04 PM, Tero Kristo wrote:
> Initialize both ESM and ESM_PMIC support if available for the board.
> If support is not available for either, a warning is printed out.
>
> ESM signals are only properly routed on PM2 version of the J721E SOM,
> so only probe the drivers on this device
On 12/02/2020 12.38, Wolfgang Denk wrote:
> Dear Rasmus,
>
> In message you wrote:
>>
>>> HUSH does not support arrays anyway...
>>
>> Of course not, but they can be emulated by having variables foo0, foo1,
>> foo2 and programmatically accessing the variable foo$index, if only
>> there's a way to
Hi Weijie,
On 2/13/20 10:09 AM, Mauro Condarelli wrote:
>>> +};
>>> diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
>>> index bcd635f438..489e466daf 100644
>>> --- a/arch/mips/mach-mtmips/Kconfig
>>> +++ b/arch/mips/mach-mtmips/Kconfig
>>> @@ -83,6 +83,13 @@ config BOARD
1 - 100 of 126 matches
Mail list logo