Some devices need to inject extra code into the Differentiated System
Descriptor Table (DSDT). Add a method to handle this.
Signed-off-by: Simon Glass
---
Changes in v2:
- Generalise the ACPI function recursion with acpi_recurse_method()
arch/sandbox/dts/test.dts | 2 ++
drivers/core/acpi.c
Call the new core function to inject ASL programmatically into the DSDT.
This is made up of fragments generated by devices that have the
inject_dsdt() method. The normal, compiled ASL file is added after this.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/lib/acpi_table.c | 15
It is useful to be able to control the order of data written to the SSDT
so that we can compare the output against known-good kernel dumps.
Add code to record each item that is added along with the device that
added it. That allows us to reorder things later if needed.
Signed-off-by: Simon Glass
Call the new core function to write the SSDT. This is made up of fragments
generated by devices that have the fill_ssdt() method.
Signed-off-by: Simon Glass
---
Changes in v2:
- Move ACPI_TABLE_CREATOR to here
arch/x86/lib/acpi_table.c | 50 +++
Some devices need to generate code for the Secondary System Descriptor
Table (SSDT). Add a method to handle this.
Signed-off-by: Simon Glass
---
Changes in v2:
- Switch parameter order of _acpi_fill_ssdt() and make it static
arch/sandbox/dts/test.dts | 2 ++
drivers/core/acpi.c | 14
Add a /chosen property to control the order in which the data appears
in the SSDT. This allows matching up U-Boot's output from a dump of the
known-good data obtained from within Linux.
Signed-off-by: Simon Glass
---
Changes in v2:
- Generalise the ACPI function recursion with
Put this table before MCFG so that it matches the order that coreboot uses
when passing tables to Linux. This is a cosmetic change since the order of
the tables does not otherwise matter.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/lib/acpi_table.c | 12 ++--
1 file
Some devices need to create ACPI tables to communcate their parameters
to Linux. Add support for this.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop CID value from i2c struct
include/acpi_device.h | 705 ++
lib/acpi/acpi_device.c | 1094
Sometimes we need to generate ACPI code on the fly based on things only
known at run time. Add a new 'acpigen' library to handle this. This code
comes from coreboot and has been modified to support the acpi_ctx struct.
Also add acpi_device.c to the build, since these files are co-dependent.
The code which generates ACPI tables programmatically, add a few ACPI
definitions required by that code.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/acpi_table.h | 50
1 file changed, 50 insertions(+)
diff --git
Put this in the context along with the other important pointers.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/dm/acpi.h | 2 ++
lib/acpi/acpi_table.c | 38 --
test/dm/acpi.c| 5 +
3 files changed, 23 insertions(+), 22
When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new IRQ method to do the conversion.
Signed-off-by: Simon Glass
---
Changes in v2: None
We always write three basic tables to ACPI at the start. Move this into
its own function, along with acpi_fill_header(), so we can write a test
for this code.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/lib/acpi_table.c | 77 +--
When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new GPIO method to do the conversion.
Signed-off-by: Simon Glass
---
Changes in v2: None
It is useful to dump ACPI tables in U-Boot to see what has been generated.
Add a command to handle this.
To allow the command to find the tables, add a position into the global
data.
Support subcommands to list and dump the tables.
Signed-off-by: Simon Glass
---
Changes in v2: None
Move this code to a generic location so that we can test it with sandbox.
This requires adding a few new fields to acpi_ctx, so drop the local
variables used in the original code.
Also use mapmem to avoid pointer-to-address casts which don't work on
sandbox.
Signed-off-by: Simon Glass
---
The current code uses an address but a pointer would result in fewer
casts. Also it repeats the alignment code in a lot of places so this would
be better done in a helper function.
Update write_acpi_tables() to make use of the new acpi_ctx structure,
adding a few helpers to clean things up.
This function needs to be used by sandbox for tests. Move it into the
generic directory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/lib/acpi_table.c | 9 -
include/acpi_table.h | 10 ++
lib/acpi/acpi_table.c | 10 ++
We don't actually support tables without an XSDT so we can drop this dead
code.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/lib/acpi_table.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/arch/x86/lib/acpi_table.c
Call the new core function to permit devices to write their own ACPI
tables. These tables will appear after all other tables.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/lib/acpi_table.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/lib/acpi_table.c
A device may want to write out ACPI tables to describe itself to Linux.
Add a method to permit this.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop definition of ACPI_TABLE_CREATOR
- Make _acpi_write_dev_tables() static and switch argument order
- Generalise the ACPI function recursion
The DMA Remapping Reporting (DMAR) table contains information about DMA
remapping.
Add a version simple version of this table with only the minimum fields
filled out. i.e. no entries.
Reviewed-by: Bin Meng
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop two unnecessary __packed
- Move
Devices need to report various identifiers in the ACPI tables. Rather than
hard-coding these in drivers it is typically better to put them in the
device tree.
Add a binding file to describe this.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix definition of HID
- Infer hid-over-i2c CID
Add a sandbox test for the basic ACPI functionality we have so far.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Add in the acpi_table.h header file to this patch
arch/sandbox/dts/test.dts | 4 ++
arch/sandbox/include/asm/acpi_table.h | 9 +
This file is potentially useful to other architectures saddled with ACPI
so move it into a common location.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/baytrail/acpi.c | 2 +-
arch/x86/cpu/cpu.c| 2 +-
Each ACPI table has its own version number. Add the version numbers in a
single function so we can keep them consistent and easily see what
versions are supported.
Start a new acpi_table file in a generic directory to house this function.
We can move things over to this file from x86 as needed.
The ASL compiler cannot handle C structures and the like so needs some
sort of header guard around these.
We already have an __ASSEMBLY__ #define but it seems best to create a new
one for ACPI since the rules may be different.
Add the check to a few files that ACPI always includes.
ACPI (Advanced Configuration and Power Interface) is an Intel standard
for specifying information about a platform. It is a little like device
tree but considerably more complicated and with more backslashes. A
primary difference is that it supports an interpreted bytecode language.
Driver model
At present if reading a BAR returns 0x (e.g. the device is not
present) then the value is masked and a different value is returned.
This makes it harder to detect the problem when debugging.
Update the function to avoid masking in this case.
Signed-off-by: Simon Glass
Reviewed-by: Bin
Add the C version of this header. It includes a few Chrome OS bits which
are disabled for a normal build.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop the Chrome OS pieces
- Rename the 'coreboot' console to 'U-Boot'
.../include/asm/arch-apollolake/global_nvs.h | 37
With P2SB the initial BAR (base-address register) is set up by TPL and
this is used unchanged right through U-Boot.
At present the reading of this address is split between the ofdata() and
probe() methods. There are a few problems that are unique to the p2sb.
One is that its children need to call
Some files are taken or modified from coreboot, but the files are
no-longer part of the coreboot project. Fix the wording in a few places.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/coreboot/timestamp.c | 4 ++--
At present the cleanup() method is called on every transfer. It should
only be called on failing transfers. Fix this and tidy up the error
handling a little.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/tpm/tpm-uclass.c | 13 ++---
1 file changed,
This device should use ready-gpios rather than ready-gpio. Fix it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/dts/chromebook_coral.dts | 2 +-
doc/device-tree-bindings/gpio/intel,apl-gpio.txt| 2 +-
Add a means to avoid configuring a device when needed. Add an explanation
of why this is useful to the binding file.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
doc/device-tree-bindings/pci/x86-pci.txt | 24
drivers/pci/pci-uclass.c
Add a comment for the private structure
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Drop the other comment change since it is already applied
drivers/tpm/cr50_i2c.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/tpm/cr50_i2c.c
With ACPI we need to describe the settings of the SPI bus. Add enums to
handle this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Don't bracket the definitions with DM_SPI
include/spi.h | 33 +
1 file changed, 33 insertions(+)
diff
At present the cr50 driver claims the locality and does not release it for
Linux. This causes problems. Fix this by tracking what is claimed, and
adding a 'remove' method.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/tpm/cr50_i2c.c | 13 +++--
1
Different CPUs may support different address widths, meaning the amount of
memory they can address. Add a property for this to the cpu_info struct.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/cpu/cpu_sandbox.c | 1 +
include/cpu.h | 2 ++
This is split from the original series in an attempt to get things applied
in chunks.
The first 20 or so patches here have been reviewed and the changes here
incorporate those comments.
Changes in v2:
- Don't bracket the definitions with DM_SPI
- Drop the other comment change since it is already
From: Joyce Ooi
This patch increases the allocated kernel Image size to 32MB for QSPI
for Stratix10 and Agilex as the latest kernel size has increased.
Signed-off-by: Joyce Ooi
---
include/configs/socfpga_agilex_socdk.h|8
include/configs/socfpga_stratix10_socdk.h |8
Hi Wolfgang,
On Mon, 3 Feb 2020 at 02:52, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> > -"Simon Glass" schrieb: -
> > Hi Wolfgang,
> >
> > On Fri, 31 Jan 2020 at 01:18, Wolfgang Wallner
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > > +Devices
> > > > +===
> > > > +
> > > > +Device
Hi Bin,
On Sat, 8 Feb 2020 at 07:53, Bin Meng wrote:
>
> On Mon, Jan 27, 2020 at 1:08 PM Simon Glass wrote:
> >
> > This device should use ready-gpios rather than ready-gpio. Fix it.
>
> Where does this requirement come from? Is this coming from the Linux
> kernel bindings?
Yes it seems to be
> -Original Message-
> From: Marek Vasut
> Sent: Saturday, March 7, 2020 4:52 AM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; Simon Goldschmidt
>
> Subject: [PATCH] ARM: socfpga: Enable DM RTC bootcount on ABB SECU1
>
> Add and enable RTC-backed boot counter on
Hi Jaehoon,
> Subject: [PATCH 3/3] mmc: Kconfig: remove MMC_BROKEN_CD configuration
>
> Remove MMC_BROKEN_CD configuration.
> It doesn't need to use configuration, instead use broken-cd property.
Will this cause issue if board not use dts saying in SPL stage?
Regards,
Peng.
>
>
Retrieve clock rate through device tree. This mimics the behavior of
arm_global_timer in Linux.
Signed-off-by: Nicolas Heemeryck
---
drivers/timer/sti-timer.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c
Update STI timer to support a live tree
Signed-off-by: Nicolas Heemeryck
---
drivers/timer/sti-timer.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c
index 9def7e02f4..eac22ae39b 100644
---
This series update the sti-timer for cortex-a9 CPU (arm global timer) to mimic
the behavior presents in Linux.
Therefor, the same device tree node can be use for U-Boot and Linux.
Nicolas Heemeryck (2):
timer: sti: convert to livetree
timer: sti: use clk API to get timer clock rate
Hi Lukasz,
On 3/8/20 9:27 PM, Lukasz Majewski wrote:
On Wed, 26 Feb 2020 18:15:46 +0100
Giulio Benetti wrote:
mxsfb needs PLL5 as source, so let's setup it and set it as source for
mxsfb(lcdif).
Signed-off-by: Giulio Benetti
---
drivers/clk/imx/clk-imxrt1050.c | 13 -
1 file
Enable DDR52 modes, since the SD core supports correct switching now.
For completeness, list HS200 modes, however those were already enabled.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
arch/arm/dts/r8a7795-h3ulcb-u-boot.dts | 2 ++
arch/arm/dts/r8a7795-salvator-x-u-boot.dts | 2
On Wed, 26 Feb 2020 18:15:44 +0100
Giulio Benetti wrote:
> pllv3 PLLs have powerdown/up bits but enable bits too. Specifically
> "enable bit" enable the pll output, so when dis/enabling pll by
> setting/clearing power_bit we must also set/clear enable_bit.
>
> Signed-off-by: Giulio Benetti
>
On Wed, 26 Feb 2020 18:15:46 +0100
Giulio Benetti wrote:
> mxsfb needs PLL5 as source, so let's setup it and set it as source for
> mxsfb(lcdif).
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/clk/imx/clk-imxrt1050.c | 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
On Wed, 26 Feb 2020 18:15:45 +0100
Giulio Benetti wrote:
> "video:" must be "video", ":" is a typo.
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/clk/imx/clk-imxrt1050.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imxrt1050.c
>
On Fri, Mar 6, 2020 at 6:59 AM Tom Rini wrote:
>
> On Thu, Mar 05, 2020 at 04:24:23PM -0800, Atish Patra wrote:
> > Add compressed Image parsing support so that booti can parse both
> > flat and compressed Image to boot Linux. Currently, it is difficult
> > to calculate a safe address for every
On 3/8/20 1:11 AM, Eugeniu Rosca wrote:
On Feb. 16, 2020, Tom reported [1] build failure of U-Boot in-tree
tooling after applying https://patchwork.ozlabs.org/cover/1229663/
("[v6,0/7] rsa: extend rsa_verify() for UEFI secure boot").
Later on, Heinrich stressed the urgency of the issue in
On 2020-03-08, Bernhard wrote:
> I had an additional look for the possible problem with the AXP813 for
> BananaPi M3 in U-Boot.
> With help of Google, i found a patchset for U-Boot from 2016:
>
> https://lists.denx.de/pipermail/u-boot/2016-January/240259.html
>
>> +++
This commit manages diversity for STM32M15x SOCs with:
- dedicated files to support all STM32MP15 SOCs family.
The differences between those SOCs are:
-STM32MP151 [1]: common file.
-STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU.
-STM32MP157 [3]: STM32MP153 + DSI + GPU.
- new
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