On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> At present we can query the offset of a pinctrl register within the p2sb.
> For ACPI we need to get the actual address of the register. Add a function
> to handle this and rename the old one to more accurately reflect its
> purpose.
>
> Signe
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> At present the itss is probed in the ofdata_to_platdata() method. This is
> incorrect since itss is a child of p2sb which itself needs to probe the
> pinctrl device. This means that p2sb is effectively not probed when the
> itss is
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Add information about what is returned on error.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/include/asm/intel_pinctrl.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/include/asm/intel_pinctrl.h
> b/arc
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Add a Kconfig to control whether pinctrl is represented as a single ACPI
> device or as multiple devices. In the latter case (the default) we should
> return the pin number relative to the pinctrl device.
>
> Signed-off-by: Simon Glass
> ---
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> This chip is used on coral and we need to generate ACPI tables for sound
> to make it work. Add a driver that does just this (i.e. at present does
> not actually support playing sound).
>
> Signed-off-by: Simon Glass
> ---
>
> Cha
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
arch/arm/dts/k3-am65-mcu.dtsi | 44 +++
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 121 ++
.../k3-j721e-com
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii St
UDMA DT bindings have deviated from kernel's DT for AM654 and J721e.
This series updates UDMA driver and sync DT bindings
Tested OSPI and CPSW on AM654 and J721e after the changes
v2:
Collect R-by
Update patch 2/3 to note about DT incompatibility
Vignesh Raghavendra (3):
dma: ti: Add static PS
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.
Note that this patch breaks networking and OSPI boot as driver changes
are not backward compatible with existing DT. Subsequent commit will
update the DT to make it compatible
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
> (NHLT).
>
> Signed-off-by: Simon Glass
> ---
>
> include/dt-bindings/sound/nhlt.h | 23 +++
> 1 file changed, 23 insertions(+)
> cr
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> Allow writing an ACPI device to the generated ACPI code.
>
> Signed-off-by: Simon Glass
> ---
>
> include/acpi/acpigen.h | 9 +
> lib/acpi/acpigen.c | 7 +++
> test/dm/acpigen.c | 27 +++
> 3 f
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> Write required information into the SSDT to describe the SD card
> card-detect pin. Since the required GPIO properties are not present in
> the device-tree binding, set them manually for now.
>
> Signed-off-by: Simon Glass
> ---
>
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> Allow writing named integers and strings to the generated ACPI code.
>
> Signed-off-by: Simon Glass
> ---
>
> include/acpi/acpigen.h | 72 ++
> lib/acpi/acpigen.c | 49 ++
> te
commit 0cfccb54014b ("configs: Resync with savedefconfig")
removed CONFIG_USB_STORAGE from some powerpc platforms' defconfig
files, whicih would block the use case of system loading rootfs
from USB drives, add them back.
Signed-off-by: Ran Wang
---
configs/P1020RDB-PC_36BIT_NAND_defconfig |
Hi Simon,
On Fri, Jun 26, 2020 at 6:42 AM Simon Glass wrote:
>
> Hi Rayagonda,
>
> On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur
> wrote:
> >
> > Default "reset" from u-boot to L3 reset.
>
> U-Boot
Thank you, will fix this.
>
> > "reset" command with argument will trigger L1 reset.
> >
> >
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> Allow writing out a generic register.
>
> Signed-off-by: Simon Glass
> ---
>
> include/acpi/acpi_device.h | 1 +
> include/acpi/acpigen.h | 28 +++
> lib/acpi/acpigen.c | 71 ++
>
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
> audio codecs and connections in a system. Various devices can contribute
> information to produce the table.
>
> Add core support for this, based on a stru
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> At present only acpigen_write_integer() is exported for use by other code.
> But in some cases it is useful to call the specific function depending on
> the size of the value.
>
> Export these functions and add a test.
>
> Signed-o
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> Some devices such as GPIO need to override the normal path that would be
> generated by driver model. Add a device-tree property for this.
>
> Signed-off-by: Simon Glass
> ---
>
> doc/device-tree-bindings/device.txt | 23 +++
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Friday, June 26, 2020 12:35 PM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Bin Meng; Atish Patra; Simon Glass; u-boot@lists.denx.de; Heinrich
> Schuchardt
> Subject: [PATCH 1/1] riscv: use log functions in fdt_fixup
>
> Replace p
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> In some cases an internal error may prevent this from working. Update the
> function return value and report the error. At present the API for writing
> tables does not easily support reporting errors, but once it is fully
> updated to use a
Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> At present we can only read from a top-level binman node entry. Refactor
> this function to produce a second local function which supports reading
> from any node.
>
> Signed-off-by: Simon Glass
> ---
>
> lib/binman.c | 18 ++
On Tue, Jun 30, 2020 at 01:10:53AM +0200, Daniel Schwierzeck wrote:
> Hi Tom,
>
> actually I wanted to send this much earlier but I hope it's still okay.
>
> This enables Qemu tests for the MIPS Malta board in all variants (32/64 bit,
> big/little endian) in Gitlab CI, Travis CI and Azure Pipeli
There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.
CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the
The documentation states that SPL is enabled in all config options
for the da850. This incorrect, because devices booting from NOR
do not need the SPL to do the low level initializion because when
booting from NOR, the board is able to execute in place (XIP)
This also clarifies that SPL isn't onl
Hi Tom,
actually I wanted to send this much earlier but I hope it's still okay.
This enables Qemu tests for the MIPS Malta board in all variants (32/64 bit,
big/little endian) in Gitlab CI, Travis CI and Azure Pipelines. This allows
to deprecate the qemu_mips board in the future because there is
From: Heiko Stuebner
Even in boot scripts it may be needed to "panic" when all options
are exhausted and the device specification specifies hanging
instead of resetting the board.
So add a new panic command that just wraps around the core panic
call in U-Boot and can take an optional message.
S
Am Freitag, den 19.06.2020, 15:44 +0200 schrieb Stefan Roese:
> From: Aaron Williams
>
> This patch adds very basic support for the Octeon III SoCs. Only
> CFI parallel NOR flash and UART is supported for now.
>
> Please note that the basic Octeon port does not include the DDR3/4
> initializatio
> This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
> family.
>
> Signed-off-by: Stefan Roese
> ---
>
> (no changes since v1)
>
> drivers/sysreset/Kconfig | 7
> drivers/sysreset/Makefile | 1 +
> drivers/sysreset/sysreset_octeon.c | 52 ++
> This patch adds the code to copy itself from bootrom location to a
> different location (TEXT_BASE) to the Octeon platform. Its used in
> this case to copy the complete U-Boot image into L2 cache, which
> greatly improves the bootup time - especially in regard to the
> very long and complex DDR
> This patch adds the optional call to mips_mach_early_init() to start.S
> at a very early stage. Its disabled per default. It can be used for
> very early machine / platform specific init code. Its called very
> early and at this stage the PC is allowed to differ from the linking
> address (CON
On Mon, Jun 29, 2020 at 09:50:18PM +0200, Anatolij Gustschin wrote:
> Hi Tom,
>
> please pull one more bugfix for v2020.07. Thanks!
>
> The following changes since commit 19a7e5814b77b288472aa96b6d94fb2591cc9184:
>
> Merge tag 'fixes-for-v2020.07' of
> https://gitlab.denx.de/u-boot/custodian
Hi Tom,
please pull one more bugfix for v2020.07. Thanks!
The following changes since commit 19a7e5814b77b288472aa96b6d94fb2591cc9184:
Merge tag 'fixes-for-v2020.07' of
https://gitlab.denx.de/u-boot/custodians/u-boot-video (2020-06-28 10:12:25
-0400)
are available in the Git repository at:
Hi.
If I've understood it well, you're pointing out for the following part,
right?
> /* CPU */
> #define COUNTER_FREQUENCY2400
> @@ -248,6 +252,8 @@ extern int soft_i2c_gpio_scl;
> #define OF_STDOUT_PATH "/soc@01c0/serial@01c28800:115200"
> #elif CONFIG_CONS_
On 29.06.20 14:37, Tom Rini wrote:
On Mon, Jun 29, 2020 at 07:56:53AM +0530, Lokesh Vutla wrote:
+Tom
On 23/06/20 8:11 pm, Jan Kiszka wrote:
On 23.06.20 14:37, Jan Kiszka wrote:
On 23.06.20 13:50, Lokesh Vutla wrote:
On 23/06/20 4:45 pm, Jan Kiszka wrote:
From: Jan Kiszka
To avoid the n
If a file cannot be loaded, show an error message.
Set the EFI boot device only after successfully loading a file.
Signed-off-by: Heinrich Schuchardt
---
v2:
use if() instead of #ifdef
---
fs/fs.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/fs/fs.c b/
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Configuration changed, mainly several "CONFIG_..." moved from
s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig and USB related
configs removed because USB is not supported yet.
- s5p4418_nanopi2.h: "CONFIG_" removed from several s5p4
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-dir in arch/arm/cpu/armv7/s5p4418/.
Appropriate line in Makefile removed.
- cpu.c: '#include ' added.
- arch/arm/cpu/armv7/s5p4418/u-boot.lds removed, is not required
anylonger.
- "obj-$(CONFIG_ARCH
Low level functions for DPC (Display Controller) and Makefile for all
nexell video low level functions.
Signed-off-by: Stefan Bosch
---
(no changes since v1)
drivers/video/nexell/soc/Makefile | 11 +
drivers/video/nexell/soc/s5pxx18_soc_dpc.c | 1569
dri
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- nexell_display.c: Changed to DM, CONFIG_FB_ADDR can not be used
anymore because framebuffer is allocated by video_reserve() in
video-uclass.c. Therefore code changed appropriately.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CO
Low level functions for DisplayTop (Display Topology).
Signed-off-by: Stefan Bosch
---
(no changes since v1)
drivers/video/nexell/soc/s5pxx18_soc_disptop.c | 185 ++
drivers/video/nexell/soc/s5pxx18_soc_disptop.h | 385 +
drivers/video/nexell/soc/s5pxx18_soc
Low level functions for LVDS and HDMI display interfaces.
Signed-off-by: Stefan Bosch
---
(no changes since v1)
drivers/video/nexell/soc/s5pxx18_soc_hdmi.c | 50 +++
drivers/video/nexell/soc/s5pxx18_soc_hdmi.h | 488
drivers/video/nexell/soc/s5pxx18_soc_lvds.c | 2
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Since drivers/pwm/pwm-nexell.c is an adapted version of
s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c
is used instead. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h
copied to arch/arm/mach-nexell/incl
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
- doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added.
Signed-off-by: Stefan Bosch
---
Changes in v3:
- Kconfig: Missing helps added.
- Changed to livetr
Low level functions for MLC (Multi Layer Control) and MIPI (Mobile
Industry Processor Interface).
Signed-off-by: Stefan Bosch
---
(no changes since v1)
drivers/video/nexell/soc/s5pxx18_soc_mipi.c | 580 +
drivers/video/nexell/soc/s5pxx18_soc_mipi.h | 291 +
drivers/video/nexell/s
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- driver changed to DM.
- pinctrl-driver/dt is used now instead of configuring the mmc I/O-pins
in the mmc-driver.
- nexell_dwmmc_ofdata_to_platdata() reworked, i.e. valid default values
are used now (where possible) and the appropri
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
"struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
in order s5p4418 is also working.
- "probe_chip" added.
This patch adds support for SAMSUNG's/NEXELL's ARM Cortex-A9 based
S5P4418 SoC, especially FriendlyARM's NanoPi2 and NanoPC-T2 boards.
It is based on the following FriendlyARM's U-Boot version:
https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01.
Main changes in relation to nanopi2-v2016
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- DM_VIDEO support (display_dev.h).
- boot0.h added, handles NSIH --> tools/nexell obsolete.
- gpio.h: Include-path to errno.h changed.
Signed-off-by: Stefan Bosch
---
(no changes since v2)
Changes in v2:
- cosmetic: additional GPL l
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-directory in arch/arm/mach-nexell.
Appropriate line in Makefile removed.
- clock.c: 'section(".data")' added to declaration of clk_periphs[] and
core_hz.
- Kconfig: Changes to have a structure like
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
Signed-off-by: Stefan Bosch
---
Changes in v3:
- Changed to livetree API as proposed by patman:
fdtdec_get_int() --> dev_read_s32_default()
fdt_getprop() --> dev_r
Hi Thirupathaiah,
On Mon, 29 Jun 2020 at 11:26, Simon Glass wrote:
>
> Hi Thirupathaiah,
>
> On Thu, 25 Jun 2020 at 09:51, Thirupathaiah Annapureddy
> wrote:
> >
> > Currently Verified Boot fails if there is a signature verification failure
> > using required key in U-boot DTB. This patch adds
Hi Thirupathaiah,
On Thu, 25 Jun 2020 at 09:51, Thirupathaiah Annapureddy
wrote:
>
> Currently Verified Boot fails if there is a signature verification failure
> using required key in U-boot DTB. This patch adds support for multiple
> required keys. This means if verified boot passes with one of
Hi Rayagonda,
On Fri, 26 Jun 2020 at 04:21, Rayagonda Kokatanur
wrote:
>
> On Fri, Jun 26, 2020 at 6:42 AM Simon Glass wrote:
> >
> > On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur
> > wrote:
> > >
> > > From: Bharat Kumar Reddy Gooty
> > >
> > > By default re-location happens to higher add
On Sat, 27 Jun 2020 at 02:14, Heinrich Schuchardt wrote:
>
> The value 0 assigned to final is overwritten before ever being used.
>
> Remove the assignment.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> drivers/crypto/fsl/fsl_hash.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Revie
On Sat, 27 Jun 2020 at 02:24, Heinrich Schuchardt wrote:
>
> If a file cannot be loaded, show an error message.
> Set the EFI boot device only after successfully loading a file.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> fs/fs.c | 13 -
> 1 file changed, 8 insertions(+), 5 deleti
On Fri, 26 Jun 2020 at 05:36, Heiko Stuebner wrote:
>
> From: Heiko Stuebner
>
> Even in boot scripts it may be needed to "panic" when all options
> are exhausted and the device specification specifies hanging
> instead of resetting the board.
>
> So add a new panic command that just wraps around
Hi Tom,
On Fri, 26 Jun 2020 at 14:16, Tom Rini wrote:
>
> On Wed, Jun 24, 2020 at 02:04:37PM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 24 Jun 2020 at 09:53, Tom Rini wrote:
> > >
> > > On Wed, Jun 24, 2020 at 09:17:51AM -0600, Simon Glass wrote:
> > > > Hi Heinrich,
> > > >
> > > > O
On Sat, 27 Jun 2020 at 07:10, Bin Meng wrote:
>
> +Simon,
>
> On Sat, Jun 27, 2020 at 8:00 PM Tom Rini wrote:
> >
> > In the future if we have separate symbols for DM_SPI_FLASH and
> > SPL_DM_SPI_FLASH we will not always have function declarations available
> > for some DM calls. This in turn le
Hi Rayagonda,
On Sun, 28 Jun 2020 at 21:08, Rayagonda Kokatanur
wrote:
>
> Hi Simon,
>
> On Fri, Jun 26, 2020 at 6:42 AM Simon Glass wrote:
> >
> > Hi Rayagonda,
> >
> > On Wed, 10 Jun 2020 at 05:15, Rayagonda Kokatanur
> > wrote:
> > >
> > > From: Vikas Gupta
> > >
> > > Add optee based bnxt
Hi Walter,
On Fri, 26 Jun 2020 at 07:18, Walter Lozano wrote:
>
> Hi Simon,
>
> On 25/6/20 22:42, Simon Glass wrote:
> > On Wed, 24 Jun 2020 at 22:10, Walter Lozano
> > wrote:
> >> Add missing information about internal class members in order to make
> >> the code easier to follow.
> >>
> >> Si
Hi,
On Fri, 26 Jun 2020 at 07:36, Tom Rini wrote:
>
> On Thu, Jun 25, 2020 at 07:43:20PM -0600, Simon Glass wrote:
> > Hi Marek,
> >
> > On Wed, 24 Jun 2020 at 10:03, Marek Behún wrote:
> > >
> > > Hello,
> > >
> > > this is a cleaned up version of Qu's patches that reimplements U-Boot's
> > > b
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v5:
- Take !CONFIG_IS_ENABLED(DM_RESET) into
This is required in order to access the reset controller used to
initialize the board's xHCI chip.
Signed-off-by: Nicolas Saenz Julienne
---
configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 +
configs/rpi_arm64_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/con
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.
Signed-off-by: Nic
Newer revisions of the RPi4 need their xHCI chip, VL805, firmware to be
loaded explicitly. Earlier versions didn't need that as they where using
an EEPROM for that purpose. This series takes care of setting up the
relevant infrastructure and run the firmware loading routine at the
right moment.
No
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
may either be loaded directly from an EEPROM or, if not present, by the
SoC's VideCore (the SoC's co-processor). Introduce the function that
informs VideCore that VL805 may need its firmware loaded.
Signed-off-by: Nicolas Sae
Hello Jagan,
> -Original Message-
> From: Jagan Teki
> Sent: Monday, June 29, 2020 9:00 PM
> To: Sagar Kadam
> Cc: U-Boot-Denx ; Rick Chen ;
> Paul Walmsley ( Sifive) ; Palmer Dabbelt
> ; Anup Patel ; Atish Patra
> ; Lukasz Majewski ; Pragnesh
> Patel ; bin.m...@windriver.com; Simon Glass
On Sun, Jun 28, 2020 at 06:20:52PM +0800, Kever Yang wrote:
> pycrypto is needed for script to generate correct its.
>
> Signed-off-by: Kever Yang
> ---
>
> .gitlab-ci.yml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index f2e4
On Mon, 29 Jun 2020 16:53:44 +0200
Anatolij Gustschin ag...@denx.de wrote:
> 3480 is not valid XRES, use 3840 as default.
>
> Fixes: 05c65a82c3c1 ("video: rockchip: Support 4K resolution for rk3399,
> HDMI")
> Signed-off-by: Anatolij Gustschin
> Cc: Jagan Teki
> ---
> drivers/video/rockchip/K
On Sat, Jun 27, 2020 at 11:15:49AM +0800, John Chau wrote:
> From: John Chau
>
> This patch adds a feature for block device cloning similar to dd
> command, this should be useful for boot-strapping a device where
> usb gadget or networking is not available. For instance one can
> clone a factory
On Fri, Jun 26, 2020 at 8:51 AM Sagar Kadam wrote:
>
> Hi Jagan,
>
> > -Original Message-
> > From: Jagan Teki
> > Sent: Thursday, June 25, 2020 11:13 PM
> > To: Sagar Kadam
> > Cc: U-Boot-Denx ; Rick Chen ;
> > Paul Walmsley ( Sifive) ; Palmer Dabbelt
> > ; Anup Patel ; Atish Patra
> >
Hi,
On Mon, Jun 29, 2020 at 12:09:38PM +0300, Nazım Gediz Aydındoğmuş wrote:
> A64 has UART4 but it was in conflict with R_UART of older SoCs (e.g. A23).
>
> This commit adds necessary definitions and checks to use UART4 port on A64.
>
> Signed-off-by: Nazım Gediz Aydındoğmuş
> ---
>
> arch/a
On Mon, Jun 29, 2020 at 8:23 PM Anatolij Gustschin wrote:
>
> 3480 is not valid XRES, use 3840 as default.
>
> Fixes: 05c65a82c3c1 ("video: rockchip: Support 4K resolution for rk3399,
> HDMI")
> Signed-off-by: Anatolij Gustschin
> Cc: Jagan Teki
> ---
> drivers/video/rockchip/Kconfig | 2 +-
>
3480 is not valid XRES, use 3840 as default.
Fixes: 05c65a82c3c1 ("video: rockchip: Support 4K resolution for rk3399, HDMI")
Signed-off-by: Anatolij Gustschin
Cc: Jagan Teki
---
drivers/video/rockchip/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/rock
On Mon, Jun 29, 2020 at 12:27:08PM +, Ludwig Zenz wrote:
> On 25/06/20 2:52 PM, Tom Rini wrote:
> > On Thu, Jun 25, 2020 at 02:52:58PM +, Ludwig Zenz wrote:
> >> On 22/06/20 9:38 AM, Tom Rini wrote:
> >> > On Mon, Jun 22, 2020 at 09:38:36AM +, Ludwig Zenz wrote:
> >> >
> >> >> On 6/13/2
On Mon, 2020-06-29 at 12:11 +0200, Sébastien Szymanski wrote:
> Caution: EXT Email
>
> On 6/29/20 11:51 AM, Ye Li wrote:
> >
> > On Mon, 2020-06-29 at 10:42 +0200, Sébastien Szymanski wrote:
> > >
> > > Caution: EXT Email
> > >
> > > PCA9450A I2C address is 0x25. Fix it.
> > >
> > > Signed-off
On 25/06/20 2:52 PM, Tom Rini wrote:
> On Thu, Jun 25, 2020 at 02:52:58PM +, Ludwig Zenz wrote:
>> On 22/06/20 9:38 AM, Tom Rini wrote:
>> > On Mon, Jun 22, 2020 at 09:38:36AM +, Ludwig Zenz wrote:
>> >
>> >> On 6/13/20 3:55 PM, Jagan Teki wrote:
>> >> > Enable DM_SPI/DM_SPI_FLASH with a re
On Mon, Jun 29, 2020 at 07:56:53AM +0530, Lokesh Vutla wrote:
> +Tom
>
> On 23/06/20 8:11 pm, Jan Kiszka wrote:
> > On 23.06.20 14:37, Jan Kiszka wrote:
> >> On 23.06.20 13:50, Lokesh Vutla wrote:
> >>>
> >>>
> >>> On 23/06/20 4:45 pm, Jan Kiszka wrote:
> From: Jan Kiszka
>
> To av
On 25.06.20 02:48, Chris Packham wrote:
When running USB compliance tests on our Armada-385 hardware platforms
we have seen some eye mask violations. Marvell's internal documentation
says: Based on silicon test results, it is recommended to change the
impedance calibration threshold setting to 0x
On 25.06.20 02:48, Chris Packham wrote:
Fix spelling of Alignment.
Signed-off-by: Chris Packham
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/se
Hi Anatolij,
On Mon, Jun 29, 2020 at 4:31 AM Anatolij Gustschin wrote:
> I've tested on mx6ul-14x14-evk, with current U-Boot master I do not
> see this problem any more.
Excellent! I saw Ye Li's patches that fixed the problem.
Thanks
Switch off SMP support when building u-boot-spl would cause linking error as
follow:
undefined reference to 'secondary hart relocate' and 'smp_call_function'.
Add macro to wrap up proper code region that needs SMP configuration on.
Signed-off by: Leo Liang
Cc: r...@andestech.com
---
arch/riscv/
A64 has UART4 but it was in conflict with R_UART of older SoCs (e.g. A23).
This commit adds necessary definitions and checks to use UART4 port on A64.
Signed-off-by: Nazım Gediz Aydındoğmuş
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c| 4
arch/
Add support for defining raw fastboot partitions in eMMC by specifying
the offset and size in an environment variable. Optionally, the eMMC
hardware partition number may also be specified.
This makes it possible to e.g. update only part of the eMMC boot
partition, instead of having to write the en
efi_get_variable_common() does not use EFI_ENTRY(). So we should not use
EFI_EXIT() either.
Fixes: 767f6eeb01d3 ("efi_loader: variable: support variable authentication")
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_variable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
Fixed delay 200us is not working in certain platforms. Change to
poll for reset completion status to have more reliable reset process.
Controller will set the rst_comp bit in intr_status register after
controller has completed its reset and initialization process.
Signed-off-by: Radu Bacrau
Sign
On 6/29/20 11:51 AM, Ye Li wrote:
> On Mon, 2020-06-29 at 10:42 +0200, Sébastien Szymanski wrote:
>> Caution: EXT Email
>>
>> PCA9450A I2C address is 0x25. Fix it.
>>
>> Signed-off-by: Sébastien Szymanski
>> ---
>> drivers/power/pmic/pmic_pca9450.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 del
Always put the controller in reset, then take it out of reset.
This is to make sure controller always in reset state in both SPL and
proper Uboot.
This is preparation for the next patch to poll for reset completion
(rst_comp) bit after reset.
Signed-off-by: Radu Bacrau
Signed-off-by: Ley Foon Ta
On Mon, 2020-06-29 at 10:42 +0200, Sébastien Szymanski wrote:
> Caution: EXT Email
>
> PCA9450A I2C address is 0x25. Fix it.
>
> Signed-off-by: Sébastien Szymanski
> ---
> drivers/power/pmic/pmic_pca9450.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/power/p
Send status command (CMD13) will send R1 response under SD mode
but R2 response under SPI mode.
R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode
Signed-off-by: Pragnesh Patel
---
drivers/mmc/mmc_spi.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/d
R1 response is 1 byte long for mmc SPI commands as per the updated
physical layer specification version 7.10.
So correct the resp and resp_size for existing commands
Signed-off-by: Pragnesh Patel
---
drivers/mmc/mmc_spi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/mmc_spi
The content of ssr is useful only for erase operations.
This saves erase time.
Signed-off-by: Pragnesh Patel
Reviewed-by: Bin Meng
---
drivers/mmc/mmc.c | 5 +
drivers/mmc/mmc_spi.c | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 620bb93
As per the SD physical layer specification version 7.10, erase
command (CMD38) and stop transmission command (CMD12) will generate
R1b response.
R1b = R1 + busy signal
A non-zero value after the R1 response indicates card is ready for
next command.
Signed-off-by: Pragnesh Patel
---
drivers/mmc
Erase block start address (CMD32) and erase block end address (CMD33)
command will generate R1 response for mmc SPI mode.
R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response
for this commands.
Signed-off-by: Pragnesh Patel
---
drivers/mmc/mmc_spi.c | 2 ++
1 file changed, 2 i
Earlier "mmc erase " command reorts Ok but not actually erase the contents
of some SD cards. This series will resolve this issue.
There is still 1 limitation for some SDHC mmc_spi cards:
"mmc erase *blk#* cnt" can not erase only 1 block that means:
=> mmc erase 0x22 1
will not erase the contents
When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.
Signed-off-by: Pragnesh Patel
Reviewed-b
node varaible is used as iterator into ofnode_for_each_subnode()
loop, when exiting of it, node is no more a valid ofnode.
Use dwc3_node instead as parameter of ofnode_valid()
Fixes: ac28e59a574d ("usb: Migrate to support live DT for some driver")
Signed-off-by: Patrice Chotard
---
drivers/usb/
Forwarded Message
Subject: Re: [PATCH 1/1] riscv: use log functions in fdt_fixup
Date: Mon, 29 Jun 2020 15:21:43 +0800
From: Leo Liang
To: Heinrich Schuchardt
On Fri, Jun 26, 2020 at 06:34:43AM +0200, Heinrich Schuchardt wrote:
> Replace printf() and debug() by log_err() and lo
On 6/29/20 10:24 AM, Peng Fan wrote:
[...]
>>> The i.MX8 has two USB controllers: USBOH and USB3. The USBOH reuses
>>> previous i.MX6/7. It has same PHY IP as i.MX7ULP but NC registers are
>>> same as i.MX7D. So add its support in ehci-mx6 driver.
>>>
>>> Also the driver is updated to remove buil
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