[PATCH v2 06/18] xen: Port Xen event channel driver from mini-os

2020-07-20 Thread Anastasiia Lukianenko
From: Oleksandr Andrushchenko Make required updates to run on u-boot. Strip functionality not needed by U-boot. Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Anastasiia Lukianenko --- drivers/xen/Makefile | 1 + drivers/xen/events.c | 195

[PATCH v2 04/18] board: Introduce xenguest_arm64 board

2020-07-20 Thread Anastasiia Lukianenko
From: Andrii Anisov Introduce a minimal Xen guest board running as a virtual machine under Xen Project's hypervisor [1], [2]. Part of the code is ported from Xen mini-os and also uses work initially done by different authors from NXP: please see relevant files for their copyrights. [1]

[PATCH v2 05/18] xen: Port Xen hypervizor related code from mini-os

2020-07-20 Thread Anastasiia Lukianenko
From: Oleksandr Andrushchenko Port hypervizor related code from mini-os. Update essential arch code to support required bit operations, memory barriers etc. Copyright for the bits ported belong to at least the following authors, please see related files for details: Copyright (c) 2002-2003, K

[PATCH v2 01/18] Add MIT License

2020-07-20 Thread Anastasiia Lukianenko
From: Anastasiia Lukianenko Signed-off-by: Anastasiia Lukianenko --- Licenses/README | 1 + Licenses/mit.txt | 20 2 files changed, 21 insertions(+) create mode 100644 Licenses/mit.txt diff --git a/Licenses/README b/Licenses/README index 486e18d0d8..c23ad216fc 100644

[PATCH v2 00/18] Add new board: Xen guest for ARM64

2020-07-20 Thread Anastasiia Lukianenko
From: Anastasiia Lukianenko This work introduces Xen [1] guest ARM64 board support in U-Boot with para-virtualized (PV) [2] block and serial drivers: xenguest_arm64. This board is to be run as a virtual Xen guest with U-boot as its primary bootloader. The rationale behind introducing this board

Re: [PATCH v4 3/4] rtc: rk8xx: Add base support for the RK808 PMIC RTC

2020-07-20 Thread Jagan Teki
Hi Kever, On Sat, Jul 18, 2020 at 5:41 PM Kever Yang wrote: > > Hi Jagan, > > On 2020/7/10 下午11:50, Jagan Teki wrote: > > From: Suniel Mahesh > > > > Rockchip RK808 PMIC provides an integrated RTC module. It is > > commonly used with Rockchip SoCs. Add basic support to access > > date and time.

Re: [PATCH] rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not set

2020-07-20 Thread Jagan Teki
Hi Kever, On Mon, Jul 20, 2020 at 4:08 PM Kever Yang wrote: > > The empty function define should not be in the header file, or else the > build will error with function multi definition after > CONFIG_RAM_ROCKCHIP_DEBUG > is disabled. Any specific reason why? usually, it has in the header in

[PATCH] rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not set

2020-07-20 Thread Kever Yang
The empty function define should not be in the header file, or else the build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG is disabled. Signed-off-by: Kever Yang --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 15 ---

RE: [PATCH v3 1/5] dt-bindings: prci: add indexes for reset signals available in prci

2020-07-20 Thread Pragnesh Patel
>-Original Message- >From: Sagar Kadam >Sent: 10 July 2020 14:08 >To: u-boot@lists.denx.de >Cc: r...@andestech.com; Paul Walmsley ( Sifive) >; pal...@dabbelt.com; anup.pa...@wdc.com; >atish.pa...@wdc.com; lu...@denx.de; Pragnesh Patel >; bin.m...@windriver.com;

RE: [PATCH v3 2/5] fu540: prci: use common reset indexes defined in binding header

2020-07-20 Thread Pragnesh Patel
>-Original Message- >From: Sagar Kadam >Sent: 10 July 2020 14:08 >To: u-boot@lists.denx.de >Cc: r...@andestech.com; Paul Walmsley ( Sifive) >; pal...@dabbelt.com; anup.pa...@wdc.com; >atish.pa...@wdc.com; lu...@denx.de; Pragnesh Patel >; bin.m...@windriver.com;

RE: [PATCH v3 3/5] fu540: dtsi: add reset producer and consumer entries

2020-07-20 Thread Pragnesh Patel
>-Original Message- >From: Sagar Kadam >Sent: 10 July 2020 14:08 >To: u-boot@lists.denx.de >Cc: r...@andestech.com; Paul Walmsley ( Sifive) >; pal...@dabbelt.com; anup.pa...@wdc.com; >atish.pa...@wdc.com; lu...@denx.de; Pragnesh Patel >; bin.m...@windriver.com;

RE: [PATCH v2 2/2] ram: sifive: Avoid using hardcoded ram base and size

2020-07-20 Thread Pragnesh Patel
Hi Bin, >-Original Message- >From: Bin Meng >Sent: 20 July 2020 15:04 >To: Pragnesh Patel >Cc: Bin Meng ; Sagar Kadam >; Rick Chen ; U-Boot >Mailing List >Subject: Re: [PATCH v2 2/2] ram: sifive: Avoid using hardcoded ram base and >size > >[External Email] Do not click links or

Re: [PATCH v2 2/3] watchdog: rti_wdt: Add support for loading firmware

2020-07-20 Thread Jan Kiszka
On 29.06.20 20:44, Jan Kiszka wrote: On 29.06.20 14:37, Tom Rini wrote: On Mon, Jun 29, 2020 at 07:56:53AM +0530, Lokesh Vutla wrote: +Tom On 23/06/20 8:11 pm, Jan Kiszka wrote: On 23.06.20 14:37, Jan Kiszka wrote: On 23.06.20 13:50, Lokesh Vutla wrote: On 23/06/20 4:45 pm, Jan Kiszka

Re: [PATCH v2 2/2] ram: sifive: Avoid using hardcoded ram base and size

2020-07-20 Thread Bin Meng
Hi Pragnesh, On Mon, Jul 20, 2020 at 5:28 PM Pragnesh Patel wrote: > > Hi Bin, > > >-Original Message- > >From: Bin Meng > >Sent: 20 July 2020 11:37 > >To: Rick Chen ; Pragnesh Patel > >; Sagar Kadam ; U- > >Boot Mailing List > >Cc: Bin Meng > >Subject: [PATCH v2 2/2] ram: sifive:

Re: [PATCH v2 0/2] add broadcom spi driver

2020-07-20 Thread Rayagonda Kokatanur
Hi Jagan, On Sun, May 17, 2020 at 12:54 PM Rayagonda Kokatanur wrote: > > This patchset, > -adds Broadcom SPI driver for iproc-based platforms and > -extends Micron SPI commands for dual and quad SPI transfers on Micon SPI. > > Changes from v1: > -Address review comments from Jagan Teki, >

RE: [PATCH v2 1/2] riscv: dts: hifive-unleashed-a00: Make memory node available to SPL

2020-07-20 Thread Pragnesh Patel
>-Original Message- >From: Bin Meng >Sent: 20 July 2020 11:37 >To: Rick Chen ; Pragnesh Patel >; Sagar Kadam ; U- >Boot Mailing List >Cc: Bin Meng >Subject: [PATCH v2 1/2] riscv: dts: hifive-unleashed-a00: Make memory node >available to SPL > >[External Email] Do not click links or

RE: [PATCH v2 2/2] ram: sifive: Avoid using hardcoded ram base and size

2020-07-20 Thread Pragnesh Patel
Hi Bin, >-Original Message- >From: Bin Meng >Sent: 20 July 2020 11:37 >To: Rick Chen ; Pragnesh Patel >; Sagar Kadam ; U- >Boot Mailing List >Cc: Bin Meng >Subject: [PATCH v2 2/2] ram: sifive: Avoid using hardcoded ram base and size > >[External Email] Do not click links or attachments

[PATCH] rockpro64: Enable USB3.0 Host

2020-07-20 Thread Jagan Teki
Enable USB3.0 Host support for RockPro64 boards. Signed-off-by: Jagan Teki --- configs/rockpro64-rk3399_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 31b3ee2aa4..25cf5c781c 100644 ---

Re: [PATCH v6 3/3] gpio: search for gpio label if gpio is not found through bank name

2020-07-20 Thread Michal Simek
Hi Heiko, pá 22. 5. 2020 v 11:10 odesílatel Heiko Schocher napsal: > > dm_gpio_lookup_name() searches for a gpio through > the bank name. But we have also gpio labels, and it > makes sense to search for a gpio also in the labels > we have defined, if no gpio is found through the > bank name

Re: [PATCH 2/2] riscv: sifive: fu540: Enable SiFive PWM driver

2020-07-20 Thread Rick Chen
Hi Pragnesh > Hi Rick, > > Any comments on this patch ? Applied to u-boot-riscv/master ! Thanks, Rick > >From: U-Boot On Behalf Of Pragnesh Patel > >Sent: 24 June 2020 13:14 > >To: Bin Meng ; Rick Chen > >Cc: U-Boot Mailing List ; Atish Patra > >; palmerdabb...@google.com; Paul Walmsley (

RE: [v2, 10/11] arm: dts: lx2160ardb: support eMMC HS400 mode

2020-07-20 Thread Peng Fan
> Subject: RE: [v2, 10/11] arm: dts: lx2160ardb: support eMMC HS400 mode > > Hi Peng, > > > -Original Message- > > From: Peng Fan > > Sent: Monday, July 20, 2020 9:45 AM > > To: Y.b. Lu ; u-boot@lists.denx.de; Priyanka Jain > > ; 'Jaehoon Chung' > > Cc: Y.b. Lu > > Subject: RE: [v2,

[PATCHv2] lmb/bdinfo: dump lmb info via bdinfo

2020-07-20 Thread Tero Kristo
Dump lmb status from the bdinfo command. This is useful for seeing the reserved memory regions from the u-boot cmdline. Signed-off-by: Tero Kristo --- v2: * rebased to latest master cmd/bdinfo.c | 6 ++ include/lmb.h | 1 + lib/lmb.c | 42 +++---

Re: [PATCH 07/10] compiler*.h: sync include/linux/compiler*.h with Linux 5.7-rc5

2020-07-20 Thread Jagan Teki
On Thu, May 14, 2020 at 6:03 PM Tom Rini wrote: > > Copy these from Linux v5.7-rc5 tag. > > This brings in some handy new attributes and is otherwise important to > keep in sync. > > We drop the reference to smp_read_barrier_depends() as it is not > relevant on the architectures we support at

Re: [PATCH v2 2/2] ram: sifive: Avoid using hardcoded ram base and size

2020-07-20 Thread Leo Liang
On Sun, Jul 19, 2020 at 11:06:35PM -0700, Bin Meng wrote: > From: Bin Meng > > At present the SiFive FU540 RAM driver uses hard-coded memory base > address and size to initialize the DDR controller. This may not be > true when this driver is used on another board based on FU540. > > Update the

Re: [PATCH v4 1/2] arm: move CONFIG_PREBOOT="usb start" to KConfig

2020-07-20 Thread Neil Armstrong
Hi, On 19/07/2020 15:56, Jonas Smedegaard wrote: > This commit moves CONFIG_PREBOOT="usb start" to common/KConfig > for all boards also declaring USB_KEYBOARD. > > Besides simplifying defconfig files, this also enables support for > board-specific CONFIG_PREBOOT for sunxi boards: > commit

RE: [v2, 10/11] arm: dts: lx2160ardb: support eMMC HS400 mode

2020-07-20 Thread Y.b. Lu
Hi Peng, > -Original Message- > From: Peng Fan > Sent: Monday, July 20, 2020 9:45 AM > To: Y.b. Lu ; u-boot@lists.denx.de; Priyanka Jain > ; 'Jaehoon Chung' > Cc: Y.b. Lu > Subject: RE: [v2, 10/11] arm: dts: lx2160ardb: support eMMC HS400 mode > > > Subject: [v2, 10/11] arm: dts:

RE: [v2, 07/11] mmc: fsl_esdhc: support eMMC HS400 mode

2020-07-20 Thread Y.b. Lu
Hi Peng, > -Original Message- > From: Peng Fan > Sent: Monday, July 20, 2020 9:42 AM > To: Y.b. Lu ; u-boot@lists.denx.de; Priyanka Jain > ; 'Jaehoon Chung' > Cc: Y.b. Lu > Subject: RE: [v2, 07/11] mmc: fsl_esdhc: support eMMC HS400 mode > > > Subject: [v2, 07/11] mmc: fsl_esdhc:

RE: [v2, 06/11] mmc: add a mmc_hs400_prepare_ddr() interface

2020-07-20 Thread Y.b. Lu
Hi Peng, > -Original Message- > From: Peng Fan > Sent: Monday, July 20, 2020 9:40 AM > To: Y.b. Lu ; u-boot@lists.denx.de; Priyanka Jain > ; 'Jaehoon Chung' > Cc: Y.b. Lu > Subject: RE: [v2, 06/11] mmc: add a mmc_hs400_prepare_ddr() interface > > > Subject: [v2, 06/11] mmc: add a

RE: [v2, 05/11] mmc: add a hs400_tuning flag

2020-07-20 Thread Y.b. Lu
Hi Peng, > -Original Message- > From: Peng Fan > Sent: Monday, July 20, 2020 9:37 AM > To: Y.b. Lu ; u-boot@lists.denx.de; Priyanka Jain > ; 'Jaehoon Chung' > Cc: Y.b. Lu > Subject: RE: [v2, 05/11] mmc: add a hs400_tuning flag > > > Subject: [v2, 05/11] mmc: add a hs400_tuning flag >

RE: [v2, 01/11] mmc: add a reinit() API

2020-07-20 Thread Y.b. Lu
Hi Peng, > -Original Message- > From: Peng Fan > Sent: Monday, July 20, 2020 9:33 AM > To: Y.b. Lu ; u-boot@lists.denx.de; Priyanka Jain > ; 'Jaehoon Chung' > Cc: Y.b. Lu > Subject: RE: [v2, 01/11] mmc: add a reinit() API > > > Subject: [v2, 01/11] mmc: add a reinit() API > > > > For

Re: [PATCH v4 7/7] test/py: efi_secboot: add test for intermediate certificates

2020-07-20 Thread AKASHI Takahiro
Heinrich, On Mon, Jul 20, 2020 at 08:29:45AM +0200, Heinrich Schuchardt wrote: > On 7/20/20 7:52 AM, AKASHI Takahiro wrote: > > Heinrich, > > > > On Fri, Jul 17, 2020 at 12:29:06PM +0200, Heinrich Schuchardt wrote: > >> On 17.07.20 09:16, AKASHI Takahiro wrote: > >>> In this test case, an image

RE: [PATCH 2/2] riscv: sifive: fu540: Enable SiFive PWM driver

2020-07-20 Thread Pragnesh Patel
Hi Rick, Any comments on this patch ? >-Original Message- >From: U-Boot On Behalf Of Pragnesh Patel >Sent: 24 June 2020 13:14 >To: Bin Meng ; Rick Chen >Cc: U-Boot Mailing List ; Atish Patra >; palmerdabb...@google.com; Paul Walmsley ( Sifive) >; Anup Patel ; Sagar >Kadam ; Palmer

[PATCH] test/py: efi_secboot: remove unused function

2020-07-20 Thread AKASHI Takahiro
'tool_is_in_path' function is no longer used anywhere after Heinrich has removed 'sudo' version of fixture setup. Signed-off-by: AKASHI Takahiro --- test/py/tests/test_efi_secboot/conftest.py | 9 - 1 file changed, 9 deletions(-) diff --git a/test/py/tests/test_efi_secboot/conftest.py

[PATCH] test/py: efi_secboot: fix additional pylint errors

2020-07-20 Thread AKASHI Takahiro
This is a fixup by autopep8 after the commit ("test/py: efi_secboot: apply autopep8"). Signed-off-by: AKASHI Takahiro --- test/py/tests/test_efi_secboot/conftest.py | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/test/py/tests/test_efi_secboot/conftest.py

Re: [PATCH v4 7/7] test/py: efi_secboot: add test for intermediate certificates

2020-07-20 Thread Heinrich Schuchardt
On 7/20/20 7:52 AM, AKASHI Takahiro wrote: > Heinrich, > > On Fri, Jul 17, 2020 at 12:29:06PM +0200, Heinrich Schuchardt wrote: >> On 17.07.20 09:16, AKASHI Takahiro wrote: >>> In this test case, an image may have a signature with additional >>> intermediate certificates. A chain of trust will be

Re: [PATCH v2 1/1] Dockerfile: provide kernel for libguestfs-tools

2020-07-20 Thread Heinrich Schuchardt
On 7/15/20 12:10 AM, Tom Rini wrote: > On Wed, Jul 15, 2020 at 12:00:25AM +0200, Heinrich Schuchardt wrote: >> Am 14. Juli 2020 23:28:21 MESZ schrieb Tom Rini : >>> On Tue, Jul 14, 2020 at 08:18:56AM +0200, Heinrich Schuchardt wrote: >>> The libguestfs-tools use QEMU to mount an image file.

Re: [PATCH v4] riscv: Make SiFive HiFive Unleashed board boot again

2020-07-20 Thread Bin Meng
Hi Rick, On Mon, Jul 20, 2020 at 2:18 PM Bin Meng wrote: > > From: Bin Meng > > Commit 40686c394e53 ("riscv: Clean up IPI initialization code") > caused U-Boot failed to boot on SiFive HiFive Unleashed board. > > The codes inside arch_cpu_init_dm() may call U-Boot timer APIs > before the call

[PATCH v4] riscv: Make SiFive HiFive Unleashed board boot again

2020-07-20 Thread Bin Meng
From: Bin Meng Commit 40686c394e53 ("riscv: Clean up IPI initialization code") caused U-Boot failed to boot on SiFive HiFive Unleashed board. The codes inside arch_cpu_init_dm() may call U-Boot timer APIs before the call to riscv_init_ipi(). At that time the timer register base (e.g.: the

Re: [PATCH v3] azure: gitlab: travis: Update OpenSBI used for RISC-V testing

2020-07-20 Thread Rick Chen
> From: Bin Meng [mailto:bmeng...@gmail.com] > Sent: Monday, July 20, 2020 11:52 AM > To: Rick Jian-Zhi Chen(陳建志); U-Boot Mailing List > Cc: Tom Rini; Bin Meng > Subject: [PATCH v3] azure: gitlab: travis: Update OpenSBI used for RISC-V > testing > > From: Bin Meng > > Change to use OpenSBI

Re: [PATCH v4 6/7] efi_loader: signature: rework for intermediate certificates support

2020-07-20 Thread AKASHI Takahiro
Heinrich, On Fri, Jul 17, 2020 at 12:23:08PM +0200, Heinrich Schuchardt wrote: > On 17.07.20 09:16, AKASHI Takahiro wrote: > > In this commit, efi_signature_verify(with_sigdb) will be re-implemented > > using pcks7_verify_one() in order to support certificates chain, where > > the signer's

Re: [PATCH v3] riscv: Make SiFive HiFive Unleashed board boot again

2020-07-20 Thread Bin Meng
On Mon, Jul 20, 2020 at 1:06 PM Sean Anderson wrote: > > On 7/20/20 12:33 AM, Bin Meng wrote: > > From: Bin Meng > > > > Commit 40686c394e53 ("riscv: Clean up IPI initialization code") > > caused U-Boot failed to boot on SiFive HiFive Unleashed board. > > > > The codes inside arch_cpu_init_dm()

Re: [PATCH 02/31] mtd: spi-nor: Tidy up error handling / debug code

2020-07-20 Thread Vignesh Raghavendra
Hi Simon, On 19/07/20 9:45 pm, Simon Glass wrote: > The -ENODEV error value in spi_nor_read_id() is incorrect since there > clearly is a device - it just cannot be supported. Description 's not entirely accurate... If there is no flash on the SPI bus, then read ID would return all 0s or 0xFFs

[PATCH v2 1/2] riscv: dts: hifive-unleashed-a00: Make memory node available to SPL

2020-07-20 Thread Bin Meng
From: Bin Meng Make memory node available to SPL in prepration to updates to SiFive DDR RAM driver to read memory information from DT. Signed-off-by: Bin Meng --- Changes in v2: - rebase on top of u-boot-riscv/master arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 1 file changed,

[PATCH v2 2/2] ram: sifive: Avoid using hardcoded ram base and size

2020-07-20 Thread Bin Meng
From: Bin Meng At present the SiFive FU540 RAM driver uses hard-coded memory base address and size to initialize the DDR controller. This may not be true when this driver is used on another board based on FU540. Update the driver to read the memory information from DT and use that during the

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