Hi,
Just tried out v2020.10-rc3 on my T2080RDB and I've got the following
splat. Haven't had a chance to decode it yet (pointers on how to
translate the addresses for powerpc welcome) but I figured I'd get
this out just in case anyone was looking at the T2080RDB.
SPI boot...
Hi Frank,
Would you please forward this mail to Marek, he doesn't receive email
sent from MediaTek, thanks a lot
Hi Marek,
I always receive eth following massage, it seems the same for my
workmate,
---
Delivery has failed to these recipients or groups:
ma...@denx.de
A problem occurred while
The GPIO bank name for banks J and K are not correct when using the
'gpio' command from the console.
The driver derives the bank name from the device tree instance string by
using the instance value and adding 'A': gpio0@xxaddrxx is Bank A,
gpio1@yyaddryy is Bank B and so on.
On the PIC32, there
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
using the 'gpio' command from the console.
The root cause is a discrepancy between the driver and the device tree:
the driver code expects an absolute I/O address in the property,
while the device tree defines the address
On Fri, 2020-08-07 at 17:32 +0800, Chunfeng Yun wrote:
> The start address of dout, pullen and pullsel ragnes are wrong,
> so fix up them.
>
> Signed-off-by: Chunfeng Yun
> ---
> drivers/pinctrl/mediatek/pinctrl-mt8512.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff
On Tue, Sep 01, 2020 at 10:01:18PM +, Reuben Dowle wrote:
> This patch allows uboot scripts make choices about where to boot from based
> on
> the active mmc boot partition. This allows having two copies of kernel,
> filesystems etc, and choosing which to boot from based off the active
>
This patch allows uboot scripts make choices about where to boot from based on
the active mmc boot partition. This allows having two copies of kernel,
filesystems etc, and choosing which to boot from based off the active
bootloader partition.
Signed-off-by: Reuben Dowle
---
cmd/mmc.c | 2 ++
Attempting to place device tree immediately after an image in memory can lead
to mis-aligned data accesses if that image size is not divisible by the
alignment requirements of the architecture.
Data aborts caused by this were observed on a custom Marvel A388 based system,
where the image was a
Anti rollback protection is required when there is a need to retire
previous versions of FIT images due to security flaws in them.
Currently U-Boot Verified boot does not have rollback protection to
protect against known security flaws.
This RFC introduces a proposal to add anti-rollback
Anti rollback protection is required when there is a need to retire
previous versions of FIT images due to security flaws in them.
Currently U-Boot Verified boot does not have rollback protection to
protect against known security flaws.
This change adds anti-rollback protection for FIT images.
Include ast2500-evb.dtb for CONFIG_ASPEED_AST2500 instead of
for all aspeed targets.
ast2400 is based on ARM926EJ-S processor (ARMv5-architecture).
ast2500 is based on ARM1176JZS processor (ARMv6-architecture).
ast2600 is based on Cortex A7 processor (ARMv7-A architecture).
Each of the above SOC
On 8/24/20 10:44 AM, Pragnesh Patel wrote:
> This series add a support of tracing for RISC-V arch.
>
> This series is also available here [1] for testing.
> Series depends on [2].
>
> [1] https://github.com/pragnesh26992/u-boot/tree/trace
> [2]
>
This enables the necessary config options.
Signed-off-by: Sean Anderson
---
Changes in v3:
- Note dependency on "time: Fix get_ticks being non-monotonic"
- Add a few signed-off-bys which were sent for version 1
board/sipeed/maix/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git
The clock subsystem requires that clk_free be called on clocks obtained via
clk_get_*.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v1)
drivers/watchdog/designware_wdt.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git
The watchdog won't work if the clock isn't enabled.
Fixes: cf89ef8d10f240554541c20b2e1bdcdd58d1d7e6
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v1)
drivers/watchdog/designware_wdt.c | 4
1 file changed, 4 insertions(+)
diff --git
The clock subsystem returns clock rates in Hz. We need to divide by 1000 so
the rate is in kHz.
Fixes: cf89ef8d10f240554541c20b2e1bdcdd58d1d7e6
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v1)
drivers/watchdog/designware_wdt.c | 2 +-
1 file changed, 1
This adds the necessary bindings. Most of them are already there.
Signed-off-by: Sean Anderson
Acked-by: Rick Chen
---
(no changes since v2)
Changes in v2:
- Move watchdog enable to k210.dtsi as it does not depend on anything
board-specific.
arch/riscv/dts/k210.dtsi | 1 -
1 file changed,
This series depends on
https://patchwork.ozlabs.org/project/uboot/patch/20200901195548.542737-1-sean...@gmail.com/
Changes in v3:
- Note dependency on "time: Fix get_ticks being non-monotonic"
- Add a few signed-off-bys which were sent for version 1
Changes in v2:
- Fix fls being off-by-one when
This is preferred over #if because the compiler can check syntax even if
the feature is disabled. This cannot be used for CONFIG_CLK because
CONFIG_DW_WDT_CLOCK_KHZ is not defined on all platforms.
Signed-off-by: Sean Anderson
Reviewed-by: Heinrich Schuchardt
---
(no changes since v1)
log_2_n_round_up is only found in arm. fls performs the same job and is
generic.
Signed-off-by: Sean Anderson
---
(no changes since v2)
Changes in v2:
- Fix fls being off-by-one when compared to log_2_n_round_up
drivers/watchdog/designware_wdt.c | 3 +--
1 file changed, 1 insertion(+), 2
On Tuesday 01 September 2020 09:03:59 Andre Heider wrote:
> From: Konstantin Porotchkin
>
> Add support for additional EspressoBIN board with installed
> eMMC device (U11).
> EspressoBIN boards with eMMC installed should use the DTS named
> armada-3720-espressobin-emmc.
> Update build
On Monday 31 August 2020 11:59:28 Andre Heider wrote:
> On 31/08/2020 10:46, Pali Rohár wrote:
> > On Monday 31 August 2020 10:17:07 Andre Heider wrote:
> > > On 31/08/2020 10:01, Pali Rohár wrote:
> > > > On Monday 31 August 2020 05:34:07 Andre Heider wrote:
> > > > > +/* U11 */
> > > > > + {
> >
get_ticks does not always succeed. Sometimes it can be called before the
timer has been initialized. If it does, it returns a negative errno.
This causes the timer to appear non-monotonic, because the value will
become much smaller after the timer is initialized.
No users of get_ticks which I
On Tue, Sep 01, 2020 at 10:36:31PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This PR includes the following x86 changes for v2020.10:
>
> - Fix parsing of "mtrr list" command
> - Introduce USE_EARLY_BOARD_INIT option and remove dead codes for most
> x86 boards
>
> Azure results : PASS
>
There are drivers to support built in USB controller and PHY-s now, so lets add
the USB nodes to DTSI.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi | 50 ++
1 file changed, 50 insertions(+)
diff --git
PHY handling functions should depend also on CONFIG_USB_DWC3 aka DM DWC3
version.
Otherwise when using the non DM version with PHY subsystem enabled there will
be a linking error due to missing dwc3_setup_phy and dwc3_shutdown_phy.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS| 1 +
drivers/phy/Kconfig| 6 ++
drivers/phy/Makefile | 1 +
Add driver for Qualcomm DWC3 based dual role xHCI USB controller.
Currently tested on IPQ40xx, but should support other Qualcomm SoC families as
well.
Only host mode is supported.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 2 +
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the
reset controller.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 2 +
drivers/reset/Kconfig
Since we have a driver for the reset controller, lets add the necessary node.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/Kconfig | 1 +
arch/arm/dts/qcom-ipq4019.dtsi | 9 +
2 files changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
Its common to use dt-bindings instead of hard-coding clocks or resets.
So lets use the imported Linux GCC bindings on IPQ40xx target.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi| 3 ++-
arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 +++-
2 files changed,
There is already existing driver for SMEM so lets enable it for IPQ40xx as well.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/Kconfig | 2 ++
arch/arm/dts/qcom-ipq4019.dtsi | 5 +
drivers/smem/Kconfig | 2 +-
3 files changed, 8 insertions(+), 1
Import Qualcomm IPQ4019 GCC bindings from Linux.
This will enable using bindings instead of raw clock numbers both in the driver
and DTS like Linux does.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 1 +
This patch series builds on the previously merged basic
Qualcomm IPQ40xx series support.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Robert Marko (9):
dt-bindings: clock: import Qualcomm IPQ4019 bindings
IPQ40xx: clk: Use dt-bindings instead of hardcoding
IPQ40xx: Add SMEM support
Hi Michal,
On Tue, 1 Sep 2020 at 09:15, Michal Simek wrote:
>
> Hi Simon,
>
> On 30. 08. 20 22:37, Simon Glass wrote:
> > Hi Michal,
> >
> > On Wed, 26 Aug 2020 at 08:12, Michal Simek wrote:
> >>
> >> Hi,
> >>
> >> On 25. 08. 20 18:57, Simon Glass wrote:
> >>> Hi Michal,
> >>>
> >>> On Tue, 25
On Mon, 31 Aug 2020 at 03:59, Alper Nebi Yasak wrote:
>
> When reading subentries of each image, the FIT entry type directly
> concatenates their contents without padding them according to their
> offset, size, align, align-size, align-end, pad-before, pad-after
> properties.
>
> This patch makes
On Wed, 26 Aug 2020 at 07:13, Michal Simek wrote:
>
> There is prepared function for filing rom_offset. That's why use it instead
> of copying content of it.
>
> Signed-off-by: Michal Simek
> ---
>
> lib/binman.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass
Hi Alper,
On Tue, 1 Sep 2020 at 06:23, Alper Nebi Yasak wrote:
>
> On 01/09/2020 13:36, Simon Glass wrote:
> > Hi Alper,
> >
> > I found that evb-rk3288 fails to build with the final patch from your
> > series. See u-boot-dm/testing for the tree.
>
> I had seen your patch and assumed that
On Wed, 26 Aug 2020 at 07:34, Michal Simek wrote:
>
> Fix typo.
>
> Fixes: 19790632648b ("binman: Support accessing binman tables at run time")
> Signed-off-by: Michal Simek
> ---
>
> include/binman_sym.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Simon Glass
On Mon, 31 Aug 2020 at 03:59, Alper Nebi Yasak wrote:
>
> Switch to str.startswith for matching like the FIT etype does since the
> current version doesn't ignore 'hash-1', 'hash-2', etc.
>
> Signed-off-by: Alper Nebi Yasak
> ---
>
> Changes in v2:
> - Add test to check that sections ignore
On Mon, 31 Aug 2020 at 03:59, Alper Nebi Yasak wrote:
>
> Other relevant properties (pad-after, offset, size, align, align-size,
> align-end) already work since Pack() sets correct ranges for subentries'
> data (.offset, .size variables), but some padding here is necessary to
> align the data
Hi Simon,
On 30. 08. 20 22:37, Simon Glass wrote:
> Hi Michal,
>
> On Wed, 26 Aug 2020 at 08:12, Michal Simek wrote:
>>
>> Hi,
>>
>> On 25. 08. 20 18:57, Simon Glass wrote:
>>> Hi Michal,
>>>
>>> On Tue, 25 Aug 2020 at 09:13, Michal Simek wrote:
Hi Simon,
On 25. 08. 20
On 9/1/20 7:23 AM, Heinrich Schuchardt wrote:
> On 01.09.20 13:14, Sean Anderson wrote:
>> On 9/1/20 6:51 AM, Heinrich Schuchardt wrote:
>>> When resetting the sipeed_maix_bitm_defconfig without the patch I see a
>>> crash:
>>>
>>> => reset
>>> resetting ...
>>> Unhandled exception: Illegal
Hi Tom,
This PR includes the following x86 changes for v2020.10:
- Fix parsing of "mtrr list" command
- Introduce USE_EARLY_BOARD_INIT option and remove dead codes for most
x86 boards
Azure results : PASS
https://dev.azure.com/bmeng/GitHub/_build/results?buildId=290=results
The following
Hi All,
I need some ideas regarding Boot Over Ehternet. I have been following the u
boot document as well.
I am attempting BoE from a Linux Server to a cluster of Raspberry Pis.
i.e we have a Ubuntu (linux) Server with Raspbian image, the desired result is
to somehow ''Mount'' the image, so
Michael Walle-2 wrote
> On all newer Layerscape SoCs, the crypto module is just partially
> disabled on non-E parts. Thus it doesn't make sense to completely remove
> the node. Linux will figure out what is there and what is not.
>
> Just remove it for older SoCs, where the module is indeed
Am Dienstag, den 01.09.2020, 15:09 +0200 schrieb Mauro Condarelli:
> Hi Daniel,
> Hi Stefan,
> comments inline below.
>
> Many Thanks
> Mauro
>
> On 9/1/20 1:41 AM, Daniel Schwierzeck wrote:
> > Am Montag, den 31.08.2020, 23:53 +0200 schrieb Mauro Condarelli:
> > > Thanks Daniel.
> > >
> > > On
Hi Mauro,
On 01.09.20 15:09, Mauro Condarelli wrote:
Now problem is "Unable to allocate 209398 bytes for LZMA"
Full trace below.
I assume I should enlarge
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
since GARDENA has:
#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
but
Hi Daniel,
Hi Stefan,
comments inline below.
Many Thanks
Mauro
On 9/1/20 1:41 AM, Daniel Schwierzeck wrote:
> Am Montag, den 31.08.2020, 23:53 +0200 schrieb Mauro Condarelli:
>> Thanks Daniel.
>>
>> On 8/31/20 10:36 PM, Daniel Schwierzeck wrote:
>>> Hi Mauro,
>>>
>>> Am Montag, den 31.08.2020,
Hi Sam,
On Tue, Sep 01, 2020 at 01:31:46PM +0300, Sam Protsenko wrote:
> Hi Gary,
>
> On Thu, 27 Aug 2020 at 11:51, Gary Bisson
> wrote:
> >
> > The size returned by 'getvar partition-size' should be in bytes, not in
> > blocks as fastboot uses that value to generate empty partition when
> >
On 8/30/20 9:42 PM, Lukasz Majewski wrote:
> Dear Marek,
Hi,
> Please find a set of DFU/Gadget related fixes:
>
> The following changes since commit
> 9f04a634ef331b4fc6b3e677f276156192a413c7:
>
> Merge branch '2020-08-27-misc-fixes' (2020-08-28 08:51:37 -0400)
>
> are available in the Git
On 01/09/2020 13:36, Simon Glass wrote:
> Hi Alper,
>
> I found that evb-rk3288 fails to build with the final patch from your
> series. See u-boot-dm/testing for the tree.
I had seen your patch and assumed that nothing was already using the
allow-missing functionality in its FITs (since you're
On 01.09.20 13:14, Sean Anderson wrote:
> On 9/1/20 6:51 AM, Heinrich Schuchardt wrote:
>> On 8/18/20 11:00 AM, Heinrich Schuchardt wrote:
>>> On 11.08.20 12:32, Sean Anderson wrote:
On 8/11/20 3:50 AM, Heinrich Schuchardt wrote:
> On 11.08.20 08:20, Rick Chen wrote:
>> Hi Heinrich
Add a special help message pointing to the relevant README.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/arm/dts/sunxi-u-boot.dtsi | 1 +
tools/binman/missing-blob-help | 4
2 files changed, 5 insertions(+)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi
When an external blob is missing it can be quite confusing for the user.
Add a way to provide a help message that is shown.
Signed-off-by: Simon Glass
---
Changes in v3:
- Add a way to show help messages for missing blobs
tools/binman/README| 6 ++
Add a new entry argument to the fit entry which allows selection of the
default configuration to use. This is the 'default' property in the
'configurations' node.
Update the Makefile to pass in the value of DEVICE_TREE or
CONFIG_DEFAULT_DEVICE_TREE to provide this information.
Signed-off-by:
In some cases it is useful to generate a FIT which has a number of DTB
images, selectable by configuration. Add support for this in binman,
using a simple iterator and string substitution.
Signed-off-by: Simon Glass
---
Changes in v3:
- Rebase on top of earlier binman series
Changes in v2:
-
This file is no-longer used. Drop it.
Signed-off-by: Simon Glass
---
(no changes since v1)
board/sunxi/mksunxi_fit_atf.sh | 87 --
1 file changed, 87 deletions(-)
delete mode 100755 board/sunxi/mksunxi_fit_atf.sh
diff --git a/board/sunxi/mksunxi_fit_atf.sh
At present 64-bit sunxi boards use the Makefile to create a FIT, using
USE_SPL_FIT_GENERATOR. This is deprecated.
Update sunxi to use binman instead.
Signed-off-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Add a 'fit-fdt-list' property
- Fix 'board' typo in commit message
Add an entry for ARM Trusted Firmware's 'BL31' payload, which is the
device's main firmware. Typically this is U-Boot.
Signed-off-by: Simon Glass
---
Changes in v3:
- Rebase on top of earlier binman series
Changes in v2:
- Add the URL of ARM Trusted Firmware and mention of U-Boot docs
- Fix
At present we have an Entry_blob_ext which implement a blob which holds an
external binary. We need to support other entry types that hold external
binaries, e.g. Entry_blob_named_by_arg. Move the support into the base
Entry class to allow this.
Signed-off-by: Simon Glass
---
(no changes since
At present binman warns about missing external blobs only when the
BUILD_ROM is defined. Enable this behaviour always, since many boards
are starting to use these (e.g. ARM Trusted Firmware's BL31).
Signed-off-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Add new patch to support
On 9/1/20 6:51 AM, Heinrich Schuchardt wrote:
> On 8/18/20 11:00 AM, Heinrich Schuchardt wrote:
>> On 11.08.20 12:32, Sean Anderson wrote:
>>> On 8/11/20 3:50 AM, Heinrich Schuchardt wrote:
On 11.08.20 08:20, Rick Chen wrote:
> Hi Heinrich
>
>> From: Heinrich Schuchardt
Tidy up a few test functions which lack argument comments. Rename one that
has the same name as a different test.
Also fix up the comment for PrepareImagesAndDtbs().
Signed-off-by: Simon Glass
---
(no changes since v1)
tools/binman/control.py | 5 +
tools/binman/ftest.py | 22
At present the Python sequential-write interface can produce an error when
it calls fdt_finish(), since this needs to add a terminating tag to the
end of the struct section.
Fix this by automatically expanding the buffer if needed.
Signed-off-by: Simon Glass
---
(no changes since v1)
If an entry argument is needed by an entry but the entry argument is not
present, then a strange error can occur when trying to read the file.
Fix this by allowing arguments to be required. Select this option for the
cros-ec-rw entry. If a filename is provided in the node, allow that to be
used.
This series allows binman to generate FITs that include multiple DTB
images and the configuration to use them.
It is then possible to remove the sunxi FIT generator script, so this
series handles that also.
With this, sunxi is fully converted to use binman.
Note: This series is available at
Hi,
On Fri, 28 Aug 2020 10:44:55 +
Trommel, Kees (Contractor) kees.trommel.contrac...@draeger.com wrote:
> Hi Agust,
>
> The latest version of the U-Boot does not support conversion from
> 24BPP BMP to a 16BPP 565RGB encoded frame buffer. It uses always
> 555RGB encoding (see function
Hello all,
I am using u-boot on a STM32MP1 EV1 board. Until recently, the NAND
DFU backend was used to flash UBI images to the board. I used the
DFU_NAND_TRIMFFS option to ensure that the UBI image was correctly
flashed to NAND.
Recently, ST has switched from the NAND DFU backend to the MTD DFU
Hello all,
I am using u-boot on a STM32MP1 EV1 board. Until recently, the NAND
DFU backend was used to flash UBI images to the board. I used the
DFU_NAND_TRIMFFS option to ensure that the UBI image was correctly
flashed to NAND.
Recently, ST has switched from the NAND DFU backend to the MTD DFU
Signed-off-by: John Robertson
---
arch/mips/dts/pic32mzda.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/mips/dts/pic32mzda.dtsi b/arch/mips/dts/pic32mzda.dtsi
index 4c8b7a9a0b..8aff9eb812 100644
--- a/arch/mips/dts/pic32mzda.dtsi
+++ b/arch/mips/dts/pic32mzda.dtsi
Hi Gary,
On Thu, 27 Aug 2020 at 11:51, Gary Bisson
wrote:
>
> The size returned by 'getvar partition-size' should be in bytes, not in
> blocks as fastboot uses that value to generate empty partition when
> running format [1].
>
> Note that the function was already returning the proper size in
On 8/18/20 11:00 AM, Heinrich Schuchardt wrote:
On 11.08.20 12:32, Sean Anderson wrote:
On 8/11/20 3:50 AM, Heinrich Schuchardt wrote:
On 11.08.20 08:20, Rick Chen wrote:
Hi Heinrich
From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
Sent: Tuesday, August 11, 2020 11:57 AM
To: Rick
Hi Alper,
On Tue, 1 Sep 2020 at 04:35, Simon Glass wrote:
>
> At present if a FIT references a missing external blob, binman reports an
> error, even if the image is supposed to allow this.
>
> Propagate this setting down to the child sections of the FIT, so that the
> behaviour is consistent.
>
At present if a FIT references a missing external blob, binman reports an
error, even if the image is supposed to allow this.
Propagate this setting down to the child sections of the FIT, so that the
behaviour is consistent.
This is a fix-up patch to:
binman: Build FIT image subentries with
We may need to add a clock-frequency binding like for the K210.
Signed-off-by: Sean Anderson
---
This patch builds but has NOT been tested.
Changes in v3:
- Rebase
Changes in v2:
- Fix SiFive CLINT not getting tick-rate from rtcclk
arch/riscv/dts/fu540-c000-u-boot.dtsi | 8 ++--
This converts the clint driver from the riscv-specific interface to be a
DM-based UCLASS_TIMER driver. We also need to re-add the initialization for
IPI back into the SPL code. This was previously implicitly done when the
timer was initialized. In addition, the SiFive DDR driver previously
Another "virtual" clock (in the sense that it isn't configurable). This
could possibly be done as a clock in the device tree, but I think this is a
bit cleaner.
Signed-off-by: Sean Anderson
---
checkpatch still complains about this one, but I don't see any reason to
break it up even further. It
AFAIK because the K210 clock driver does not come up until after
relocation, the clint will always use the clock-frequency parameter.
Ideally, it should update itself after relocation to take into account the
actual CPU frequency.
The interrupt controller property is removed from the clint
This merges the PLIC initialization code from two functions into one.
Signed-off-by: Sean Anderson
---
This patch builds but has NOT been tested.
(no changes since v1)
arch/riscv/lib/andes_plic.c | 58 -
1 file changed, 25 insertions(+), 33 deletions(-)
The riscv-timer driver currently serves as a shim for several riscv timer
drivers. This is not too desirable because it bypasses the usual timer
selection via the driver model. There is no easy way to specify an
alternate timing driver, or have the tick rate depend on the cpu's
configured
This converts the PLMT driver from the riscv-specific timer interface to be
a DM-based UCLASS_TIMER driver.
The clock-frequency/clocks properties are preferred over timebase-frequency
for two reasons. First, properties which affect a device should be located
near its binding in the device tree.
This series cleans up the timer drivers in RISC-V and converts them to DM.
This series depends on [1]. This series needs to be tested! I have only tested
it on QEMU and the K210. Notably, this means that the HiFive and anything Andes
is completely untested. CI for this series is located at [2].
On Sun, Aug 30, 2020 at 5:45 AM Simon Glass wrote:
>
> A few things have changed since this was written about 18 months ago.
> Update the README.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no changes since v1)
>
> doc/README.chromium | 9 ++---
> 1 file
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> When booting Chrome OS images the command line is stored separately
> from the kernel. Add a way to specify this address so that images boot
> correctly.
>
> Also add comments to the zimage.h header.
>
> Signed-off-by: Simon Glass
>
On Sun, Aug 30, 2020 at 5:44 AM Simon Glass wrote:
>
> Recent versions of Chrome OS do not have a kernel in the root disk, to
> save space.
>
> With the improvements to the 'zboot' command it is fairly easy to load
> the kernel from the raw partition. Add instructions on how to do this.
>
>
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> At present the setup block is always obtained from the image
> automatically. In some cases it can be useful to use a setup block
> obtained elsewhere, e.g. if the image has already been unpacked. Add an
> argument to support this and update
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> There is a lot of information in the setup block and it is quite hard to
> decode manually. Add a 'zboot dump' command to decode it into a
> human-readable format.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no
Hi Simon,
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> At present it is not possible to tell from a script where the setup block
> is, or where the image was loaded to. Add environment variables for this.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> Add a little subcommand that prints out where the kernel was loaded and
> its setup pointer. Run it by default in the normal boot.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no changes since v1)
>
>
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> Split out the code that actually boots linux into a separate sub-command.
> Add base_ptr to the state to support this.
>
> Show an error if the boot fails, since this should not happen.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang
Hi Simon,
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> Add a subcommand that sets up the kernel ready for execution.
This commit actually adds 2 subcommands.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no changes since v1)
>
> arch/x86/lib/zimage.c |
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> At present if an error occurs while setting up the boot, interrupts are
> left disabled. Move this call later in the sequence to avoid this problem.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> (no changes since
From: Meenakshi Aggarwal
This patch set add support for LX2162AQDS board.
LX2162A is a variant of LX2160A.
Meenakshi Aggarwal (2):
armv8: lx2162a: Add Soc changes to support LX2162A
armv8: lx2162aqds: Add support for LX2162AQDS platform
arch/arm/Kconfig |
From: Meenakshi Aggarwal
This patch add base support for LX2162AQDS board.
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.
LX2162A support 4GB ddr memory, i2c, micro-click module, microSD card,
serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g
From: Meenakshi Aggarwal
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.
LX2162A support 4GB ddr memory, i2c, micro-click module, microSD card,
serial console, qspi nor flash, qsgmii, sgmii, 25g, 40g, 50g network
interface,one usb 3.0 and serdes interface to
Hi Simon,
On Sun, Aug 30, 2020 at 5:42 AM Simon Glass wrote:
>
> Add subcommands to zboot. At present there is only one called 'start'
> which does the whole boot. It is the default command so is optional.
>
> Change the 's' string variable to const while we are here.
> Signed-off-by: Simon
Enable eMMC HS400 mode support on LX2160ARDB.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- None.
Changes for v3:
- None.
Changes for v4:
- None.
---
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160ardb_tfa_defconfig | 1 +
The process for eMMC HS400 mode for eSDHC is,
1. Perform the Tuning Process at the HS400 target operating frequency.
Latched the clock division value.
2. if read transaction, then set the SDTIMNGCTL[FLW_CTL_BG].
3. Switch to High Speed mode and then set the card clock frequency to
a value
Fix mmc->clock with actual clock which is divided by the
controller, and record it with priv->clock which was removed
accidentally.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- Added this patch.
Changes for v3:
- None.
Changes for v4:
- None.
---
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