Hi Rasmus,
Thanks for the review. Please see in-line:
On 9/2/2020 12:58 AM, Rasmus Villemoes wrote:
> On 01/09/2020 22.48, Thirupathaiah Annapureddy wrote:
>> Anti rollback protection is required when there is a need to retire
>> previous versions of FIT images due to security flaws in them.
>>
On 9/14/20 11:48 PM, Heinrich Schuchardt wrote:
> Dear Tom,
>
> The following changes since commit 00e5fda0063eaa20e9c3f6844ac88c64eb875f23:
>
> Merge branch '2020-09-12-assorted-bugfixes' (2020-09-14 15:39:46 -0400)
>
> are available in the Git repository at:
>
>
> -Original Message-
> From: Ang, Chee Hong
> Sent: Monday, August 17, 2020 12:35 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Simon Goldschmidt
> ; Tom Rini ; See,
> Chin Liang ; Tan, Ley Foon
> ; Ang, Chee Hong ;
> Chee, Tien Fong ; Lim, Elly Siew Chin
>
> Subject: [PATCH v1
The linker sometimes creates PT_LOAD segments with length (p_filesz) zero
as described in https://man7.org/linux/man-pages/man5/elf.5.html. This
leads to build failures. We should ignore empty segments.
Signed-off-by: Heinrich Schuchardt
---
arch/arm/mach-rockchip/make_fit_atf.py | 5 +++--
1
Functions that are used in multiple C modules should be defined in an
include.
Signed-off-by: Heinrich Schuchardt
---
include/bootm.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/bootm.h b/include/bootm.h
index 0350c349f3..a812a6bf24 100644
--- a/include/bootm.h
+++
Functions that are used in multiple C modules should be defined in an
include.
Signed-off-by: Heinrich Schuchardt
---
include/bootm.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/bootm.h b/include/bootm.h
index 0350c349f3..a812a6bf24 100644
--- a/include/bootm.h
+++
Hi, Simon
I find a guide in mainline uboot code, which updated by you.
This guide is for chromebook_jerry, can it apply to Flip C100p (minnie)?
If it can apply to minnie, my understanding are:
Build u-boot-spl-dtb.bin and u-boot-dtb.img from mainline uboot, and
replace jerry binary in the
Hi, Simon
I find a guild in mainline uboot code, which updated by you.
This guild is for chromebook_jerry, can it apply to Flip C100p (minnie)?
If it can apply to minnie, my understanding are:
Build u-boot-spl-dtb.bin and u-boot-dtb.img from mainline uboot, and
replace jerry binary in the
Op 03-09-2020 om 17:49 schreef Andy Shevchenko:
On Thu, Sep 03, 2020 at 06:05:44PM +0300, Andy Shevchenko wrote:
On Thu, Sep 03, 2020 at 08:21:23AM -0600, Simon Glass wrote:
On Thu, 3 Sep 2020 at 07:51, Andy Shevchenko wrote:
On Thu, Sep 3, 2020 at 4:40 PM Andy Shevchenko
wrote:
On Thu,
Dear Tom,
The following changes since commit 00e5fda0063eaa20e9c3f6844ac88c64eb875f23:
Merge branch '2020-09-12-assorted-bugfixes' (2020-09-14 15:39:46 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi-2020-10-rc5
for you to
Hello Stefan,
Can you please review the patchset?
Is there anything that should be resolved?
Thanks,
Luka
On Sat, Aug 29, 2020 at 12:36 AM Luka Kovacic wrote:
>
> This patchset adds board support for the iEi Puzzle-M801 1U Rackmount
> Network Appliance.
>
> The board is based on the quad-core
I am putting the signature on the image itself, rather than the configuration.
Since there are no separate components, signing the configuration is not of
much use here I think. Maybe signing configuration would work too? Anyway, my
uboot.its is this:
...
images {
Add SH4 R2Dplus machine configured to test various U-Boot PCI ethernet
options -- RTL8139, EEPRO100, AMD PCnet, DEC Tulip.
Signed-off-by: Marek Vasut
---
.azure-pipelines.yml | 12
.gitlab-ci.yml | 28
.travis.yml | 28
On 9/14/20 5:50 PM, Stephen Warren wrote:
> On 9/12/20 9:24 AM, Marek Vasut wrote:
>> On 9/11/20 9:43 PM, twar...@nvidia.com wrote:
>>> From: Tom Warren
>>>
>>> This fixes the XHCI driver on T210 boards (TX1, Nano). I was seeing
>>> that Set_Address wasn't completing, returning with a Context
Testing on a DNS-325 NAS has shown that in order for the device to work
we need to set CONFIG_NR_DRAM_BANKS to 1 and not 2.
Tested-by: Dmitry N. Kolesnikov
Reported-by: Dmitry N. Kolesnikov
Cc: Stefan Herbrechtsmeier
Signed-off-by: Tom Rini
---
configs/dns325_defconfig | 2 +-
1 file
14.09.2020 21:50, Tom Rini wrote:
> On Mon, Sep 14, 2020 at 08:08:48PM +0300, Denis Pynkin wrote:
>> 14.09.2020 17:11, Tom Rini wrote:
>>> On Mon, Sep 14, 2020 at 09:29:18AM -0400, Tom Rini wrote:
On Mon, Sep 14, 2020 at 04:20:20PM +0300, Denis Pynkin wrote:
> 14.09.2020 15:33, Tom Rini
On Sat, Sep 05, 2020 at 11:08:06AM +0200, Heinrich Schuchardt wrote:
> HTML documentation is generated in doc/output/. This directory shall be
> deleted by 'make mrproper'
>
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
On Thu, Sep 10, 2020 at 12:09:03PM +0200, Heinrich Schuchardt wrote:
> The environment variable test uses function validate_empty() to check that
> a variable is not defined. If the hush parser is not enabled, we cannot
> refer to a variable by $var_name but only by ${var_name}.
>
>
On Fri, Sep 04, 2020 at 01:35:22PM +0800, mingming lee wrote:
> From: Mingming Lee
>
> The description for MT8512 has some mistake, so correct it.
>
> Signed-off-by: Mingming Lee
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Sat, Sep 05, 2020 at 10:58:52AM +0200, Heinrich Schuchardt wrote:
> Add a chapter to the HTML documentation describing how to retrieve the
> U-Boot sources.
>
> Signed-off-by: Heinrich Schuchardt
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Sat, Sep 05, 2020 at 10:58:53AM +0200, Heinrich Schuchardt wrote:
> Provide a description of the U-Boot build process with GCC in the HTML
> documentation.
>
> Signed-off-by: Heinrich Schuchardt
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Tue, Sep 01, 2020 at 09:32:01PM +, Reuben Dowle wrote:
> Attempting to place device tree immediately after an image in memory can lead
> to mis-aligned data accesses if that image size is not divisible by the
> alignment requirements of the architecture.
>
> Data aborts caused by this
On Sun, Aug 30, 2020 at 11:34:12AM +0200, Heinrich Schuchardt wrote:
> In bootm_load_os() the OS image is decompressed. In later stages of the
> boot process we need the decompressed size of the image.
>
> Update images->os.image_len after decompression.
>
> Passing the correct size is
On Mon, Aug 31, 2020 at 11:01:41AM +0200, Pedro Aguilar wrote:
> This patch adds a sanity check that avoids 'size' to overflow and crash when
> importing an environment that contains a checksum. Example with the wrong size
> that causes the crash:
>
> => env import -c 0x410 3 v1
>
> This
On Mon, Aug 31, 2020 at 02:27:37PM +0200, Michal Simek wrote:
> From: T Karthik Reddy
>
> Nand writes should skip the bad blocks with "nand write" command.
> In case of bad blocks with above 32-bit address, nand_block_isbad()
> returns false due to truncated bad block address.
>
> In below
On Thu, Aug 27, 2020 at 06:01:28PM +0200, Michal Simek wrote:
> Kconfig provides several config options for setting up default variables
> but these are unused when variables are passed to U-Boot via file.
> That's why cover this dependency in Kconfig.
>
> Signed-off-by: Michal Simek
Applied
On Mon, Sep 14, 2020 at 09:04:38PM +0900, Daniel Palmer wrote:
> The initial very basic support for MStar/SigmaStar's Arm v7 SoCs
> should land in Linux 5.9 so I want to start the ball rolling on
> the u-boot side of things.
>
> This series does almost nothing aside from define the header needed
On Mon, Sep 14, 2020 at 08:08:48PM +0300, Denis Pynkin wrote:
> 14.09.2020 17:11, Tom Rini wrote:
> > On Mon, Sep 14, 2020 at 09:29:18AM -0400, Tom Rini wrote:
> >> On Mon, Sep 14, 2020 at 04:20:20PM +0300, Denis Pynkin wrote:
> >>> 14.09.2020 15:33, Tom Rini wroteт:
> On Mon, Sep 14, 2020 at
14.09.2020 17:11, Tom Rini wrote:
> On Mon, Sep 14, 2020 at 09:29:18AM -0400, Tom Rini wrote:
>> On Mon, Sep 14, 2020 at 04:20:20PM +0300, Denis Pynkin wrote:
>>> 14.09.2020 15:33, Tom Rini wroteт:
On Mon, Sep 14, 2020 at 08:03:33AM -0300, Fabio Estevam wrote:
>>>
>> The size of the
> To make the button command useful in a shell script it should return the
> status of the button:
>
> * 0 (true) - pressed, on
> * 1 (false) - not pressed, off
>
> The button command takes only one argument. Correct maxargs.
>
> Adjust the Python unit test.
>
> Signed-off-by: Heinrich
> Using different strings for the device tree node labels and the label
> property of buttons sharpens the button label unit test.
>
> Signed-off-by: Heinrich Schuchardt
Reviewed-by: Philippe Reynes
> ---
> v2:
> new patch
> ---
> arch/sandbox/dts/sandbox.dtsi | 8
>
> For testing purposes keep the output value when switching to input.
> This allows us to manipulate the input value via the gpio command.
>
> Signed-off-by: Heinrich Schuchardt
Reviewed-by: Philippe Reynes
> ---
> v2:
> new patch
> ---
> drivers/gpio/sandbox.c | 10 +-
> 1 file
On 9/12/20 9:24 AM, Marek Vasut wrote:
> On 9/11/20 9:43 PM, twar...@nvidia.com wrote:
>> From: Tom Warren
>>
>> This fixes the XHCI driver on T210 boards (TX1, Nano). I was seeing
>> that Set_Address wasn't completing, returning with a Context Parameter
>> error. Examining the slot context, etc.
Den 2020-09-14 kl. 15:45, skrev Rob Westfall:
Great idea Ulf.
We (Xerox Corp) load the FPGAs in uBoot because they have the PCIe
interface "hardware" and Linux comes up much easier if the PCIe
hardware exists and is operational on boot instead of attempting to
add it it later when Linux is
I also followed the development of the SquashFS support in U-Boot
as part of Joao Marcos internship, so I would also appreciate receiving
new contributions and bug reports related to this topic.
Signed-off-by: Miquel Raynal
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Jagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.
Add support for it.
From: Jagan Teki
This would be useful and recommended boot flow for new boards
which has doesn't have the DDR support yet in mainline.
Sometimes it is very useful for debugging mainline DDR support.
Documen it for px30 boot flow.
Signed-off-by: Jagan Teki
---
Changes for v2:
- no changes
From: Jagan Teki
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose
carrier board with capacitive touch interface.
Genaral features:
- TFT 10.1" industrial, 1280x800 LVDS display
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
SOM's like PX30.Core
From: Michael Trimarchi
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
General features:
- Rockchip PX30
- Up to 2GB DDR4
- eMMC 4 GB expandible
- rest of PX30 features
PX30.Core needs to mount on top of Engicam baseboards for creating
complete platform boards.
Possible
From: Jagan Teki
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
SOM's
From: Jagan Teki
TARGET_EVB_PX30 can be possible to use other px30 boards.
Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.
This would help to track which boards are using EVB_PX30 config.
Signed-off-by: Jagan
From: Jagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.
PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.
Add support
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
PX30.Core needs to mount on top of Engicam baseboards for creating
complete platform boards.
Possible baseboards are,
- EDIMM2.2 Starter Kit
- C.TOUCH 2.0 10.1" Open Frame
Right now boot support is working via Rockchip miniloader,
This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix
Bit.
Signed-off-by: Sean Anderson
Acked-by: Rick Chen
---
This patch was previously part of
https://patchwork.ozlabs.org/project/uboot/list/?series=161576
(no changes since v2)
Changes in v2:
- Remove broken-wp
The designware ssi device has "broken" chip select behaviour [1], and needs
specific manipulation to use the built-in chip select. The existing fix is
to use an external GPIO for chip select, but typically the K210 has SPI3
directly connected to a flash chip with dedicated pins. This makes it
This documentation has been taken from Linux commit 3d7db0f11c7a ("spi: dw:
Refactor mid_spi_dma_setup() to separate DMA and IRQ config"), immediately
before the file was deleted and replaced with a yaml version. Additional
compatible strings from newer versions have been added, as well as a few
This patch enables configs necessary for using SPI. It also adds some
documentation.
Signed-off-by: Sean Anderson
---
Changes in v3:
- Rebase onto U-Boot master
- Remove env and bootcmd configuration. I'm going to punt on those for now,
since I haven't worked out the best way to boot with SPI
Ctrlr0 can have several different layouts depending on the specific device
(dw-apb-ssi vs dwc-ssi), and specific version. Update the driver to support
three specific configurations: dw-apb-ssi 16-bit (default), dw-apb-ssi
32-bit, and dwc-ssi.
dw-apb-ssi 16-bit (versions up to 3.22) is the version
This should reduce the size of the struct, and also groups more similar
fields together.
Signed-off-by: Sean Anderson
Tested-by Eugeniy Paltsev
---
(no changes since v2)
Changes in v2:
-New
drivers/spi/designware_spi.c | 27 +--
1 file changed, 13 insertions(+), 14
This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented
This property is named differently than other SPI drivers with the same
property, as well as the property as used in Linux.
Signed-off-by: Sean Anderson
Tested-by Eugeniy Paltsev
---
AFAIK these device trees are not synced with Linux. However, if they are,
they have not been synced since this
This allows different log levels to be enabled or disabled depending on the
desired level of verbosity. In particular, it allows for general debug
information to be printed while excluding more verbose logging which may
interfere with timing.
log_xxx was chosen over dev_xxx because it shows more
This series adds support for SPI on the Kendryte K210. This covers the MMC
slot (currently broken) and SPI flash on the Sipeed Maix Bit.
This series makes significant changes to the designware SPI driver. I would
really appreciate if the maintainers I CC'd could test this series and
ensure that
Using an fdt-specific function causes problems when compiled with a live
tree.
Signed-off-by: Sean Anderson
Tested-by Eugeniy Paltsev
---
This patch was previously part of
https://patchwork.ozlabs.org/project/uboot/list/?series=161576
(no changes since v1)
drivers/spi/designware_spi.c | 2 ++
On Mon, Sep 14, 2020 at 04:59:22PM +0200, Michal Simek wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> Hi Tom,
>
> On 14. 09. 20 16:47, Tom Rini wrote:
> > On Mon, Sep 14, 2020 at 04:42:56PM +0200, Michal Simek wrote:
> >
> >> Hi Tom and Lokesh,
> >>
> >> I have been validating R5
From: Heinrich Schuchardt
Add a device tree binding for the BOOT button on the Maix board.
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Sean Anderson
Signed-off-by: Sean Anderson
---
This commit was previously submitted on its own as
This patch adds the necessary configs and docs for FPIOA and GPIO support
on the K210.
Signed-off-by: Sean Anderson
---
Changes in v6:
- Add dependency on "riscv: Clean up timer drivers", which fixes the bugs
discovered earlier.
Changes in v5:
- Increase CONFIG_LOGLEVEL to 5 as a hack to get
This modifies the existing led test to check for default led naming as
added in the previous patch.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v4)
Changes in v4:
- New
arch/sandbox/dts/test.dts | 2 +-
test/dm/led.c | 3 ++-
2 files changed, 3
Previously, if there was no bank-name property, it was easy to have
confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch
follows the example of the sifive gpio driver.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
This patch was previously submitted as part of
This patch adds the necessary device tree bindings.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Convert to use pinmux property
- Don't hog ISP on boot
- Re-order GPIOs to match the defaults more closely
arch/riscv/dts/k210-maix-bit.dts |
This more closely mirrors Linux's behaviour, and will make it easier to
transition to using function+color in the future.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
This patch was previously submitted as part of
https://patchwork.ozlabs.org/project/uboot/list/?series=161576
(no
The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
dm_gpio_ops.get_value can be called when the gpio is either input or
output. The current dw code always returns the input value, which is
invalid if the direction is set to out.
Signed-off-by: Sean Anderson
Reviewed-by: Ley Foon Tan
---
This patch was previously submitted as part of
This normalizes the documentation to conform to kernel-doc style [1]. It
also moves the documentation for pinctrl_ops inline, and adds argument and
return-value documentation. I have kept the usual function style for these
comments. I could not find any existing examples of function documentation
Change the type of gpio_dwabp_platdata.base from fdt_addr_t to a void
pointer, since we pass it to readl.
Signed-off-by: Sean Anderson
Reviewed-by: Ley Foon Tan
Reviewed-by: Bin Meng
Reviewed-by: Simon Glass
---
This patch was previously submitted as part of
This extends the pinctrl-sandbox driver to support pin muxing, and adds a
test for that behaviour. The test is done in C and not python (like the
existing tests for the pinctrl uclass) because it needs to call
pinctrl_select_state. Another option could be to add a command that
invokes
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing
This patch series adds support for pinmuxing, gpios, buttons, and leds on the
Kendyte K210.
The fail-to-boot bug should be fixed by the timer driver cleanup patch :)
This patch series was previously part of
https://patchwork.ozlabs.org/project/uboot/list/?series=161576
This series depends on
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tom,
On 14. 09. 20 16:47, Tom Rini wrote:
> On Mon, Sep 14, 2020 at 04:42:56PM +0200, Michal Simek wrote:
>
>> Hi Tom and Lokesh,
>>
>> I have been validating R5 on ZynqMP if u-boot is still working
>> with latest u-boot. I found that you have
On Mon, Sep 14, 2020 at 04:42:56PM +0200, Michal Simek wrote:
> Hi Tom and Lokesh,
>
> I have been validating R5 on ZynqMP if u-boot is still working with
> latest u-boot.
> I found that you have added support for platform in subject. Can you
> please tell me how you use u-boot on R5s?
> Have
Hi Tom and Lokesh,
I have been validating R5 on ZynqMP if u-boot is still working with
latest u-boot.
I found that you have added support for platform in subject. Can you
please tell me how you use u-boot on R5s?
Have you tried to run Linux on it too?
Thanks,
Michal
Xilinx ZynqMP R5 configuration is quite minimal and there is no reason to
enable EFI for it.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/xilinx_zynqmp_r5_defconfig
b/configs/xilinx_zynqmp_r5_defconfig
index
Map all resource for R5 to operate properly.
The patch is done based on the commit 23f7b1a77602 ("armv7R: K3: am654:
Enable MPU regions") which also map the whole 4GB at first and then change
mapping for DDR.
Signed-off-by: Michal Simek
---
arch/arm/mach-zynqmp-r5/cpu.c | 11 ---
1
This adds comments regarding the ordering and purpose of certain
instructions as I understand them.
Signed-off-by: Sean Anderson
---
Changes in v2:
- Clarify comments regarding tp
arch/riscv/cpu/start.S | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git
Even though we no longer call smp_function if an IPI was not sent by
U-Boot, we still need to clear any IPIs which were pending from the
execution environment. Otherwise, secondary harts will busy-wait in
secondary_hart_loop, instead of relaxing.
Signed-off-by: Sean Anderson
Reviewed-by: Bin
We can reduce the number of instructions needed to use available_harts_lock
by using the aq and rl suffixes for AMOs.
Signed-off-by: Sean Anderson
---
Changes in v2:
- Remove fences after amoswaps
- Reword commit message
arch/riscv/cpu/start.S | 9 +++--
1 file changed, 3 insertions(+), 6
This allows code to use a construct like `if (gd & gd->...) { ... }` when
accessing the global data pointer. Without this change, it was possible for
a very early trap to cause _exit_trap to read arbitrary memory. This could
cause a second trap, preventing show_regs from being printed.
XIP cannot
Clearing MIP.MSIP is not guaranteed to do anything by the spec. In
addition, most existing RISC-V hardware does nothing when this bit is set.
The following commits "riscv: Use a valid bit to ignore already-pending
IPIs" and "riscv: Clear pending IPIs on initialization" should implement
the
On the K210, the prior stage bootloader does not clear IPIs. This presents
a problem, because U-Boot up until this point assumes (with one exception)
that IPIs are cleared when it starts. This series attempts to fix this in a
robust manner, and fix several concurrency bugs I noticed while fixing
Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI device.
This commit introduces a valid bit so secondary harts know when and IPI
originates from U-boot, and it is safe to use
Without a matching barrier on the write side, the barrier in handle_ipi
does nothing. It was entirely possible for the boot hart to write to addr,
arg0, and arg1 *after* sending the IPI, because there was no barrier on the
sending side.
Fixes: 90ae281437 ("riscv: add option to wait for ack from
Den 2020-09-14 kl. 13:49, skrev Michal Simek:
Hi,
On 07. 09. 20 19:03, Ulf Samuelsson wrote:
Hi,
The FPGA support in u-boot looks a bit old-fashioned to me.
I would like to have device-tree support and would
like comments on my approach.
Definitely there is a space for improvement.
In
On Mon, Sep 14, 2020 at 09:29:18AM -0400, Tom Rini wrote:
> On Mon, Sep 14, 2020 at 04:20:20PM +0300, Denis Pynkin wrote:
> > 14.09.2020 15:33, Tom Rini wroteт:
> > > On Mon, Sep 14, 2020 at 08:03:33AM -0300, Fabio Estevam wrote:
> >
> > >>> The size of the binary created with the default U-boot
On Mon, Sep 14, 2020 at 12:35 PM Michal Simek wrote:
>
> From: Ashok Reddy Soma
>
> There are compilation warnings showing up when we compile AXI ethernet
> driver for 64bit architectures. Fix them, so that it works on both 32
> and 64 bit architectures.
>
> DMA descriptors are not taking care
On Mon, Sep 14, 2020 at 12:35 PM Michal Simek wrote:
>
> From: Ashok Reddy Soma
>
> flush_cache() arguments are not type casted to take care of 64 bit
> systems. Use phys_addr_t to type cast for it to work properly for 32 bit
> and 64 bit systems.
>
> Signed-off-by: Ashok Reddy Soma
>
On Mon, Sep 14, 2020 at 12:34 PM Michal Simek wrote:
>
> Hi,
>
> these two patches are extending axi emac driver to support 64bit systems.
>
> Thanks,
> Michal
>
>
> Ashok Reddy Soma (2):
> net: xilinx: axi_emac: Fix dma descriptors for 64bit and compilation
> warnings
> net: xilinx:
On 9/11/20 4:04 AM, Bin Meng wrote:
> On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson wrote:
>>
>> Some IPIs may already be pending when U-Boot is started. This could be a
>> problem if a secondary hart tries to handle an IPI before the boot hart has
>> initialized the IPI device.
>>
>> This
Great idea Ulf.
We (Xerox Corp) load the FPGAs in uBoot because they have the PCIe
interface "hardware" and Linux comes up much easier if the PCIe
hardware exists and is operational on boot instead of attempting to
add it it later when Linux is up and you have to do a hot plug
install.
If we
According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
So lets add the SECT_4K to enable 4K sector usage.
Datasheet:
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
On Mon, Sep 14, 2020 at 04:20:20PM +0300, Denis Pynkin wrote:
> 14.09.2020 15:33, Tom Rini wroteт:
> > On Mon, Sep 14, 2020 at 08:03:33AM -0300, Fabio Estevam wrote:
>
> >>> The size of the binary created with the default U-boot config is much
> >>> greater than the default offset for environment
On 9/14/20 9:03 AM, Sean Anderson wrote:
> On 9/14/20 1:25 AM, Bin Meng wrote:
>> On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson wrote:
>>>
>>> This allows code to use a construct like `if (gd & gd->...) { ... }` when
>>> accessing the global data pointer. Without this change, it was possible for
14.09.2020 15:33, Tom Rini wroteт:
> On Mon, Sep 14, 2020 at 08:03:33AM -0300, Fabio Estevam wrote:
>>> The size of the binary created with the default U-boot config is much
>>> greater than the default offset for environment `0x6`. If the new
>>> version is flashed onto SPI it overlaps with
On 9/14/20 1:25 AM, Bin Meng wrote:
> On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson wrote:
>>
>> This allows code to use a construct like `if (gd & gd->...) { ... }` when
>> accessing the global data pointer. Without this change, it was possible for
>> a very early trap to cause _exit_trap to read
On 9/13/20 11:10 PM, Rick Chen wrote:
> HI Sean
>
>> On 9/11/20 10:45 AM, Bin Meng wrote:
>>> On Fri, Sep 11, 2020 at 6:22 PM Sean Anderson wrote:
On 9/11/20 3:38 AM, Bin Meng wrote:
> Hi Sean,
>
> On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson wrote:
>>
>> Clearing
On Mon, Sep 14, 2020 at 08:03:33AM -0300, Fabio Estevam wrote:
> Hi Denis,
>
> On Mon, Sep 14, 2020 at 6:56 AM Denis Pynkin
> wrote:
> >
> > The size of the binary created with the default U-boot config is much
> > greater than the default offset for environment `0x6`. If the new
> >
The patch adds a very basic skeleton for the MStar/SigmaStar Armv7
SoC to go into. It doesn't do anything yet.
Signed-off-by: Daniel Palmer
---
MAINTAINERS | 5 +
arch/arm/Kconfig| 8
arch/arm/Makefile | 1 +
arch/arm/mach-mstar/Kconfig | 17
The boot process for MStar/Sigmastar Arm v7 SoCs involves
a small boot rom, then an "IPL" which does hardware setup
and loads another loader called "IPL Cust" that does more
customer specific setup and that then finally loads maybe
u-boot, Linux or an RTOS kernel.
At the moment DDR init isn't
The Mstar/SigmaStar v7 boot rom and IPL second stage loader use
the same header for the stage coming after them except for a slightly
different magic string in the header.
This patch adds the header and sets up the right string depending
on if the SPL is going to be loaded by the boot rom or by
The initial very basic support for MStar/SigmaStar's Arm v7 SoCs
should land in Linux 5.9 so I want to start the ball rolling on
the u-boot side of things.
This series does almost nothing aside from define the header needed
for the binaries to boot.
In my tree everything is working to the point
On 9/14/20 2:38 AM, Bin Meng wrote:
> On Sat, Sep 12, 2020 at 2:25 AM Sean Anderson wrote:
>>
>> On 9/11/20 10:43 AM, Bin Meng wrote:
>>> On Fri, Sep 11, 2020 at 6:20 PM Sean Anderson wrote:
On 9/11/20 3:29 AM, Bin Meng wrote:
> Hi Sean,
>
> On Sat, Sep 5, 2020 at 9:22 PM
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