The intention which bloblists is that each blob's data is aligned in
memory. At present it is only the headers that are aligned.
Update the code to correct this and add a little more documentation.
Signed-off-by: Simon Glass
---
common/bloblist.c | 32 ++--
test/blo
When running these tests on sandbox any failures result in very large or
long pointer values which are a pain to work with. Map them to an address
so it is easier to diagnose failures.
Signed-off-by: Simon Glass
---
include/test/ut.h | 13 +
test/bloblist.c | 17 +
Some blobs need a larger alignment than the default. For example, ACPI
tables often start at a 4KB boundary. Add support for this.
Update the size of the test blob to allow these larger records.
Signed-off-by: Simon Glass
---
common/bloblist.c | 32
include/bl
Adjust a few comments to make the meaning clearer.
Signed-off-by: Simon Glass
---
include/bloblist.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/bloblist.h b/include/bloblist.h
index 9ad5678aff8..2ede11b87a9 100644
--- a/include/bloblist.h
+++ b/include/blobl
It is helpful to be able to see basic statistics about the bloblist and
also to list its contents. Add a 'bloblist' command to handle this.
Put the display functions in the bloblist modules rather than in the
command code itself. That allows showing a list from SPL, where commands
are not availabl
This little series adds a 'bloblist' command to allow listing of
bloblists.
It also provides a way to set the alignment of the data in each blob.
This means that it is possible to align a blob's data to a 4KB boundary,
for example.
Simon Glass (5):
bloblist: Add a command
bloblist: Compare a
Hi Heinrich,
On Sat, 19 Sep 2020 at 12:07, Heinrich Schuchardt wrote:
>
> On 9/19/20 3:26 PM, Simon Glass wrote:
> > Hi Heinrich,
> >
> > On Fri, 18 Sep 2020 at 22:19, Heinrich Schuchardt
> > wrote:
> >>
> >> Am 19. September 2020 04:59:46 MESZ schrieb Simon Glass
> >> :
> >>> Hi Heinrich,
> >
Hi Daniel,
comments inline below.
On 9/19/20 9:15 PM, Daniel Schwierzeck wrote:
> Hi Mauro,
>
> Am Samstag, den 19.09.2020, 15:39 +0200 schrieb Mauro Condarelli:
>
>> Hi,
>> I'm facing a new problem for my Mt7628/vocore2 target.
>>
>> I moved the Linux kernel from a ext4 partition to the "proper"
On 9/19/20 7:55 AM, Stefan Agner wrote:
> On 2020-09-14 10:15, Matthias Brugger wrote:
>> On 10/09/2020 23:12, Stefan Agner wrote:
>>> On 2020-09-07 16:36, Peter Robinson wrote:
> Any thoughts on this issue?
Any reason why you're using 2020.01 and not at least 2020.07, or at
leas
Am Donnerstag, den 20.08.2020, 07:21 +0200 schrieb Stefan Roese:
> This patchset adds the platforms specific bootoctlinux command, which is
> used to boot the MIPS Octeon Linux kernel (4.9.x). A special command is
> necessary here, as very platform specific data is passed to the kernel
> via the bo
Am Mittwoch, den 02.09.2020, 08:29 +0200 schrieb Stefan Roese:
> This patch adds the DDR4 init code. It is ported from the 2013 Cavium /
> Marvell U-Boot version with no functional change. This was done
> intentionally, as this code is very large and complex and is known to
> work on many boards "a
Am Montag, den 24.08.2020, 13:04 +0200 schrieb Stefan Roese:
> This patchset adds xHCI USB support for MIPS Octeon. After the xHCI code
> has been fixed to support mapped addresses (virt != phys), this patchset
> now adds the missing code pieces to enable USB support on Octeon. This
> is mainly the
Hello Simon,
when I try to run ./u-boot -l the sandbox stalls. Shouldn't it run out
of the box?
$ ./u-boot -l -d arch/sandbox/dts/sandbox.dtb
U-Boot 2020.10-rc4-00018-g21a10244f9-dirty (Sep 19 2020 - 19:55:39 +0200)
Model: sandbox
DRAM: 128 MiB
Warning: host_lo MAC addresses don't match:
Addr
Am Dienstag, den 01.09.2020, 18:02 + schrieb John Robertson:
> The GPIO bank name for banks J and K are not correct when using the
> 'gpio' command from the console.
>
> The driver derives the bank name from the device tree instance string by
> using the instance value and adding 'A': gpio0@xx
Am Dienstag, den 01.09.2020, 18:02 + schrieb John Robertson:
> GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
> using the 'gpio' command from the console.
>
> The root cause is a discrepancy between the driver and the device tree:
> the driver code expects an absolute
Am Dienstag, den 01.09.2020, 04:14 + schrieb John Robertson:
> Signed-off-by: John Robertson
> ---
>
> arch/mips/dts/pic32mzda.dtsi | 11 +++
> 1 file changed, 11 insertions(+)
>
applied to u-boot-mips/fixes, thanks.
--
- Daniel
Am Dienstag, den 01.09.2020, 02:55 + schrieb John Robertson:
> The PIC32MZ DA Starter Kit does not need the card detect workaround
> because the SDCD signal line is connected properly. Disable the
> workaround in this case.
>
> Signed-off-by: John Robertson
> ---
>
> arch/mips/dts/pic32mzda
Am Dienstag, den 01.09.2020, 02:55 + schrieb John Robertson:
> CONFIG_BLK needs to be enabled by default to allow U-Boot to
> compile after a 'make pic32mzdask_defconfig'.
>
> Signed-off-by: John Robertson
> ---
> Changes in v3 - address review comment from Daniel Schwierzeck
> - This file sh
Am Dienstag, den 01.09.2020, 02:55 + schrieb John Robertson:
> The GPIO pins used by the SDHCI controller need to be configured to
> allow the interface to work.
>
> Signed-off-by: John Robertson
> ---
>
> drivers/pinctrl/pinctrl_pic32.c | 28
> 1 file changed,
Am Dienstag, den 01.09.2020, 02:55 + schrieb John Robertson:
> The existing driver is not compatible with the Driver Model.
>
> This patch makes the necessary changes while also removing obsolescent
> calls/properties as follows:
>
> - fdtdec_* calls replaced with dev_read_* equivalents;
> -
On 9/19/20 8:38 PM, Biju Das wrote:
[...]
> +int dram_init(void)
> +{
> +return fdtdec_setup_mem_size_base(); }
> +
> +int dram_init_banksize(void)
> +{
> +return fdtdec_setup_memory_banksize(); }
> +
> +void reset_cpu(ulong addr)
> +{
> +writel(RST_COD
On 9/19/20 8:35 PM, Biju Das wrote:
Hi,
[...]
> +static const struct udevice_id *of_soc_match_compatible(void) {
> +const struct udevice_id *of_match = soc_ids; int i;
> +
> +for (i = 0; i < ARRAY_SIZE(soc_ids); i++) { if
> +(!fdt_node_check_compatible(gd->fdt_blob, 0,
>
Hi Mauro,
Am Samstag, den 19.09.2020, 15:39 +0200 schrieb Mauro Condarelli:
> Hi,
> I'm facing a new problem for my Mt7628/vocore2 target.
>
> I moved the Linux kernel from a ext4 partition to the "proper" SquashFS
> partition (I say "proper" because I'm using a dual-system with fallback to
>
On 9/19/20 8:14 PM, Biju Das wrote:
Hi,
[...]
> By looking at [1], only this driver is using writeext.
> [1]https://elixir.bootlin.com/u-boot/v2020.10-rc4/A/ident/writeext
git grep indicates a couple more sites where the writeext is called.
But look into the KSZ9031 datash
Hi Marek,
Thanks for the feedback.
> Subject: Re: [PATCH 2/2] arm: rmobile: Add HopeRun HiHope RZ/G2M board
> support
>
> On 9/19/20 2:18 PM, Biju Das wrote:
>
> Hi,
>
> [...]
>
> >>> +++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c
> >>> @@ -0,0 +1,80 @@
> >> [...]
> >>> +#define RST_BASE0xE616
Hi Marek,
Thanks for the feedback.
> Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
>
> On 9/19/20 1:37 PM, Biju Das wrote:
> [...]
> >>> +static const struct udevice_id *of_soc_match_compatible(void) {
> >>> +const struct udevice_id *of_match = soc_ids; int i;
> >>> +
> >>> +for (i = 0; i
Hi Marek,
Thanks for the feedback.
> Subject: Re: [PATCH] net: ravb: Fix NULL pointer access
>
> On 9/19/20 1:14 PM, Biju Das wrote:
> [...]
> >>> By looking at [1], only this driver is using writeext.
> >>> [1]https://elixir.bootlin.com/u-boot/v2020.10-rc4/A/ident/writeext
> >>
> >> git grep ind
On 9/19/20 3:26 PM, Simon Glass wrote:
> Hi Heinrich,
>
> On Fri, 18 Sep 2020 at 22:19, Heinrich Schuchardt wrote:
>>
>> Am 19. September 2020 04:59:46 MESZ schrieb Simon Glass :
>>> Hi Heinrich,
>>>
>>> On Thu, 17 Sep 2020 at 12:04, Heinrich Schuchardt
>>> wrote:
Currently if SIGINT is
Reformat the command line options chapter so that the command line options
clearly stand out.
Signed-off-by: Heinrich Schuchardt
---
doc/arch/sandbox.rst | 57 +---
1 file changed, 33 insertions(+), 24 deletions(-)
diff --git a/doc/arch/sandbox.rst b/doc/
Add doc/arch/sandbox.rst to the scope of SANDBOX.
Signed-off-by: Heinrich Schuchardt
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7e46470c70..a8d8017b5f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -951,6 +951,7 @@ SANDBOX
M: Simon Gla
Add the description of the global data pointer to the generated HTML
documentation.
Signed-off-by: Heinrich Schuchardt
---
doc/develop/global_data.rst | 53 +
doc/develop/index.rst | 1 +
2 files changed, 54 insertions(+)
create mode 100644 doc/develop
Add the missing Sphinx documentation for struct global_data and
gd_board_type().
Signed-off-by: Heinrich Schuchardt
---
include/asm-generic/global_data.h | 357 ++
1 file changed, 309 insertions(+), 48 deletions(-)
diff --git a/include/asm-generic/global_data.h
b/in
Sphinx documentation is only available for enums not for #defines.
Anyway it is better to keep related definitions in an enum.
Signed-off-by: Heinrich Schuchardt
---
include/asm-generic/global_data.h | 104 --
1 file changed, 83 insertions(+), 21 deletions(-)
diff --
Add the description of the global data pointer to the generated HTML
documentation.
The first patch converts the GD_FLG_* constants to an enum.
The second adds move Sphinx comments.
The third finally provides the HTML documentation.
Heinrich Schuchardt (3):
global_data.h: convert GD_FLG_* to en
Hi,
I'm facing a new problem for my Mt7628/vocore2 target.
I moved the Linux kernel from a ext4 partition to the "proper" SquashFS
partition (I say "proper" because I'm using a dual-system with fallback to
avoid updating the currently working rootFS and kernel lies into rootFS).
I am using u-bo
Hi Heinrich,
On Fri, 18 Sep 2020 at 22:19, Heinrich Schuchardt wrote:
>
> Am 19. September 2020 04:59:46 MESZ schrieb Simon Glass :
> >Hi Heinrich,
> >
> >On Thu, 17 Sep 2020 at 12:04, Heinrich Schuchardt
> >wrote:
> >>
> >> Currently if SIGINT is received, it terminates U-Boot. This does not
>
On 9/19/20 1:37 PM, Biju Das wrote:
[...]
>>> +static const struct udevice_id *of_soc_match_compatible(void) {
>>> +const struct udevice_id *of_match = soc_ids;
>>> +int i;
>>> +
>>> +for (i = 0; i < ARRAY_SIZE(soc_ids); i++) {
>>> +if (!fdt_node_check_compatible(gd->fdt_blob, 0,
>>> + of_mat
On 9/19/20 2:18 PM, Biju Das wrote:
Hi,
[...]
>>> +++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c
>>> @@ -0,0 +1,80 @@
>> [...]
>>> +#define RST_BASE0xE616
>>> +#define RST_CA57RESCNT(RST_BASE + 0x40)
>>> +#define RST_CODE0xA5A5000F
>>> +
>>> +/* If the firmware passed a device tree use it for
On 9/19/20 1:14 PM, Biju Das wrote:
[...]
>>> By looking at [1], only this driver is using writeext.
>>> [1]https://elixir.bootlin.com/u-boot/v2020.10-rc4/A/ident/writeext
>>
>> git grep indicates a couple more sites where the writeext is called.
>> But look into the KSZ9031 datasheet, that particu
On Thu, Sep 10, 2020 at 04:00:06PM +0200, Robert Marko wrote:
> There are drivers to support built in USB controller and PHY-s now, so lets
> add the USB nodes to DTSI.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP
On Fri, Sep 11, 2020 at 12:21:06PM +0200, Joao Marcos Costa wrote:
> Fix control flow issues and null pointer dereferences.
>
> Signed-off-by: Joao Marcos Costa
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Wed, Sep 09, 2020 at 12:10:00PM -0400, Ralph Siemsen wrote:
> The bitflip test uses two equal sized memory buffers. This is achieved
> by splitting the range of memory into two pieces. The address of the
> second buffer, as well as the length of each buffer, were not correctly
> calculated. Thi
On Fri, Sep 11, 2020 at 02:41:44PM -0400, Thomas Fitzsimmons wrote:
> Silence the "Driver Model for Ethernet drivers" migration warning for
> the bcm7445 and bcm7260 ports, neither of which supports networking yet.
>
> Signed-off-by: Thomas Fitzsimmons
> Reviewed-by: Tom Rini
Applied to u-boot
On Fri, Sep 11, 2020 at 12:21:06PM +0200, Joao Marcos Costa wrote:
> Fix control flow issues and null pointer dereferences.
>
> Signed-off-by: Joao Marcos Costa
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, Sep 10, 2020 at 04:00:05PM +0200, Robert Marko wrote:
> Lot of Qualcomm SoC-s use DWC3 controller for both USB2.0 and USB3.0
> ports.
> Qualcomm has some custom config registers on top of the generic ones,
> but for host mode these are not needed.
>
> So lets add the neccessary compatible
On Thu, Sep 10, 2020 at 04:00:02PM +0200, Robert Marko wrote:
> On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
> So since this will be needed by further drivers, lets add a driver for the
> reset controller.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
Applied to u
On Thu, Sep 10, 2020 at 04:00:04PM +0200, Robert Marko wrote:
> Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
> The driver sets up HS and SS phys.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP
On Thu, Sep 10, 2020 at 04:00:01PM +0200, Robert Marko wrote:
> There is already existing driver for SMEM so lets enable it for IPQ40xx as
> well.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, Sep 10, 2020 at 04:00:00PM +0200, Robert Marko wrote:
> Its common to use dt-bindings instead of hard-coding clocks or resets.
> So lets use the imported Linux GCC bindings on IPQ40xx target.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
Applied to u-boot/next, thanks!
--
Tom
s
On Thu, Sep 10, 2020 at 03:59:59PM +0200, Robert Marko wrote:
> Import Qualcomm IPQ4019 GCC bindings from Linux.
> This will enable using bindings instead of raw clock numbers both in the
> driver and DTS like Linux does.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
Applied to u-boot/nex
Hi Marek,
Thanks for the feedback.
> Subject: Re: [PATCH 2/2] arm: rmobile: Add HopeRun HiHope RZ/G2M board
> support
>
> On 9/18/20 6:03 PM, Biju Das wrote:
>
> [...]
>
> > +++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c
> > @@ -0,0 +1,80 @@
> [...]
> > +#define RST_BASE0xE616
> > +#define RST
On 19.09.20 13:42, Mark Kettenis wrote:
>> From: Heinrich Schuchardt
>> Date: Thu, 17 Sep 2020 20:03:24 +0200
>>
>> On 9/17/20 7:47 PM, Tom Rini wrote:
>>> On Thu, Sep 17, 2020 at 07:18:08PM +0200, Heinrich Schuchardt wrote:
>>>
CONFIG_EFI_GRUB_ARM32 is only needed for architectures with cach
On 2020-09-14 10:15, Matthias Brugger wrote:
> On 10/09/2020 23:12, Stefan Agner wrote:
>> On 2020-09-07 16:36, Peter Robinson wrote:
Any thoughts on this issue?
>>>
>>> Any reason why you're using 2020.01 and not at least 2020.07, or at
>>> least seeing if it's reproducible on 2020.10-rc3? Th
> From: Heinrich Schuchardt
> Date: Thu, 17 Sep 2020 20:03:24 +0200
>
> On 9/17/20 7:47 PM, Tom Rini wrote:
> > On Thu, Sep 17, 2020 at 07:18:08PM +0200, Heinrich Schuchardt wrote:
> >
> >> CONFIG_EFI_GRUB_ARM32 is only needed for architectures with caches that are
> >> not managed via CP15 (or f
Hi Marek,
Thanks for the feedback.
> Subject: Re: [PATCH 1/2] arm: rmobile: Add RZ/G2M SoC
>
> On 9/18/20 6:03 PM, Biju Das wrote:
> > Add CPU and PRR IDs for R8A774A1(a.k.a RZ/G2M) SoC.
>
> [...]
>
> > +static const struct udevice_id *of_soc_match_compatible(void) {
> > +const struct udevice_id
Hi Marek,
Thanks for the feedback.
> Subject: Re: [PATCH] net: ravb: Fix NULL pointer access
>
> On 9/18/20 5:26 PM, Biju Das wrote:
> [...]
>
> > +++ b/drivers/net/ravb.c
> > @@ -438,7 +438,8 @@ static int ravb_config(struct udevice *dev)
> >
> > writel(mask, eth->iobase + RAVB_
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