Add configs to support UHS modes for the SD card and HS200 for the eMMC.
Signed-off-by: Faiz Abbas
---
configs/j721e_evm_a72_defconfig | 8
configs/j721e_evm_r5_defconfig | 1 +
2 files changed, 9 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defco
Add configs to support UHS modes for the SD card and HS200 for the eMMC.
Signed-off-by: Faiz Abbas
---
configs/j7200_evm_a72_defconfig | 8
configs/j7200_evm_r5_defconfig | 1 +
2 files changed, 9 insertions(+)
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defco
Add support for UHS modes by adding the regulators to power cycle
and voltage switch the card. Also add pinmuxes required for each
node.
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-j7200-common-proc-board.dts | 49 ++-
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 15 ++
Update otap delay values to match with the latest Data Manual[1].
[1] https://www.ti.com/lit/gpn/dra829v
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-j721e-main.dtsi | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e
Add support for regulators to power cycle and switch IO voltage to the
SD card. This enables support for UHS modes.
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-j721e-common-proc-board.dts | 32 +
1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-common-pr
Add support for the main_gpio0 node
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-j7200-main.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index c25f03cf23..b722204c44 100644
--- a/arch/arm/dts/k
Because of fundamental interface issues in am65x pg1, only the
initial sdhci1 node at 25 MHz was added in the u-boot.dtsi
from which both the base-board.dts and r5-base-board.dts
inherit the node. Move the node out to k3-am65-main.dtsi
where it belongs and add the board specific properties
in base-
Use the generic sdhci_set_control_reg() instead of duplicating
in platform driver.
Signed-off-by: Faiz Abbas
---
drivers/mmc/am654_sdhci.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 410517398
With the new SW tuning App note[1], a custom tuning algorithm is
required for eMMC HS200, HS400 and SD card UHS modes. The algorithm
involves running through the 32 possible input tap delay values and
sending the appropriate tuning command (CMD19/21) for each of them
to get a fail or pass result fo
Add support for writing new clock buffer select property for both
the am654x and j721e 4 bit IPs
Signed-off-by: Faiz Abbas
---
drivers/mmc/am654_sdhci.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index f472672152..fa118f
According to the AM654x Data Manual[1], the setup timing in lower speed
modes can only be met if the controller uses a falling edge data launch.
To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be
cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25
speed modes.
DLL need only be enabled for speed modes and clock frequencies at or
above 50 MHz. For speed modes that don't enable the DLL, we need to
configure a static input delay value. This involves reading an optional
itap-del-sel-* value from the device tree and configuring it for the
appropriate speed mod
There are some speed modes that work without switching the dll on.
Unconditionally switch off the DLL before setting clock frequency to
support this case. The software will automatically enable DLL for speed
modes that require it. This also means the dll_on priv data member is no
longer required.
Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB
flag to indicate the same.
Also move the write of trm_icp and driver strength to the set_clock()
function to match the kernel configuration flow.
Signed-off-by: Faiz Abbas
---
drivers/mmc/am654_sdhci.c | 26 ++
Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.
Signed-off-by: Faiz Abbas
---
drivers/mmc/sdhci.c | 49 +
include/sdhci.h | 1 +
2 files changed, 50 insertions(+)
diff --git a/drivers/mmc/sdhci.c b/d
Add Support for AM65x PG2.0. Use the SoC bus framework to fixup
the platform data and do DLL calibration if the revision is 1.0
Signed-off-by: Faiz Abbas
---
drivers/mmc/am654_sdhci.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/mmc/am654_sdhci.c b/
Convert the flags field defines to use the BIT() macro.
Signed-off-by: Faiz Abbas
---
drivers/mmc/am654_sdhci.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 15a47f1e71..10350d8d61 100644
--- a/drivers/mmc/
The following patches add support for higher speeds in the SD card and
eMMC for TI's am65x, j721e, j7200 platforms.
After these patches j721e and j7200 will support ultra high speed while
am65x will support upto high speed modes.
Faiz Abbas (17):
mmc: sdhci: Add helper functions for UHS modes
Convert all the other http:// links to https:// .
www.denx.de/twiki/ seems to move to www.denx.de/wiki/ ,
so change it.
I checked all links in this patch are valid.
Signed-off-by: Naoki Hayama
---
README | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a
%s/overwride/override/
Signed-off-by: Naoki Hayama
---
README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/README b/README
index 02cfe45aa6..1e459e509e 100644
--- a/README
+++ b/README
@@ -618,7 +618,7 @@ The following options need to be configured:
server
Removed:
- /arch/openrisc
Added:
- /arch/xtensa
- /env
Signed-off-by: Naoki Hayama
---
README | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/README b/README
index efa47c6363..e8d7df21fb 100644
--- a/README
+++ b/README
@@ -136,12 +136,12 @@ Directory Hierarchy:
/mips
This patch includes these updates
- Change http://lists.denx.de/pipermail/u-boot
to https://lists.denx.de/pipermail/u-boot
- http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
is broken, so remove it
- Another archive https://marc.info/?l=u-boot
is available, so add it
Additional informati
doc/arch/index.rst is a list of links to each architecture.
As for the sandbox details, doc/arch/sandbox.rst looks better.
Signed-off-by: Naoki Hayama
---
README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/README b/README
index e8d7df21fb..02cfe45aa6 100644
--- a/README
This patch include these updates
- Git repository has moved to GitLab
- HTTPS access to the file server is allowed
- pre-built images are no longer available
Signed-off-by: Naoki Hayama
---
README | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/README b/READM
README has broken links and old pieces of information.
This patchset updates them.
Naoki Hayama (6):
README: Update links to mailing list archives
README: Update source code location
README: Update directory hierarchy
README: sandbox: Change reference to sandbox details
README: vxworks:
Hello Tom,
Am 07.10.2020 um 17:46 schrieb Tom Rini:
On Wed, Oct 07, 2020 at 03:53:35PM +0200, Holger Brunck wrote:
As the ownership is now Hitachi Power Grids, change the license string
and adapt the compatible string in DTS files.
Signed-off-by: Holger Brunck
CC: Valentin Longchamp
CC: Hei
Hello Holger,
Am 07.10.2020 um 17:06 schrieb Holger Brunck:
Instead of having a hard coded value for "cramfsaddr" after compile time,
we change it to take the variable "cramfsaddr" for the ubicopy variable.
This makes sure that ubicopy uses the right address, even when
the value for "cramfsaddr"
Hello Holger,
Am 07.10.2020 um 17:06 schrieb Holger Brunck:
Due to increasing kernel image sizes we get problems when decompressing
the kernel image. To fix this we need to change the addresses where we
load and where we extract the kernel. Also we need to adapt the address
where to load the CRA
Hello Holger,
Am 07.10.2020 um 15:53 schrieb Holger Brunck:
As the ownership is now Hitachi Power Grids, change the license string
and adapt the compatible string in DTS files.
Signed-off-by: Holger Brunck
CC: Valentin Longchamp
CC: Heiko Schocher
CC: Marek Vasut
CC: Tom Rini
---
arch/ar
On 07:11-20201007, Nishanth Menon wrote:
> On 11:15-20201007, Lokesh Vutla wrote:
> >
> >
> > On 07/10/20 12:35 am, Nishanth Menon wrote:
> > > Use the common defaults from ./include/configs/ti_armv7_common.h
> > >
> > > This saves us from re
Now that we dont have any further users of overlayaddr, get rid of it.
Signed-off-by: Nishanth Menon
---
Changes since V1:
- reordered to be patch #3, no functional changes
V1:
https://patchwork.ozlabs.org/project/uboot/patch/20201006190507.13346-6...@ti.com/
include/configs/j721e_evm.h | 1
Use the common defaults from ./include/configs/ti_armv7_common.h
This saves us from rediscovering the same painful lessons learnt from
ARMv7 (kernel dtbs ramdisks overlays stomping on each other etc..)
Changes since v1:
- Squashed up am654 config patch to reduce the patch count down without
loo
Use dtboaddr to define the overlay address common to all TI platforms
instead of creating a new overlayaddr for the purpose.
Signed-off-by: Nishanth Menon
---
Changes since V1:
- reordered to be patch #2, no functional changes
V1:
https://patchwork.ozlabs.org/project/uboot/patch/20201006190507
Use DEFAULT_LINUX_BOOT_ENV to define the standard addresses used in rest
of TI platforms as defined in ti_armv7_common.h
This avoids the standard pitfalls we've had with kernel images and fdt
addresses stomping on each other.
As part of this process, redefine overlayaddr to be dtboaddr (defined
i
Use DEFAULT_LINUX_BOOT_ENV to define the standard addresses used in rest
of TI platforms as defined in ti_armv7_common.h
This avoids the standard pitfalls we've had with kernel images and fdt
addresses stomping on each other.
As part of this process, redefine overlayaddr to be dtboaddr (defined
i
Hi Tom,
Could you help us on the review of the following patches for Aspeed platform
code?
http://patchwork.ozlabs.org/project/uboot/cover/20200908072104.10067-1-chiawei_w...@aspeedtech.com/
http://patchwork.ozlabs.org/project/uboot/cover/20200907082507.22290-1-dylan_h...@aspeedtech.com/
These p
Dear Wolfgang,
On 2020/10/07 23:17, Wolfgang Denk wrote:
> Dear Naoki,
>
> In message <70a4beb7-b5c1-a4af-67b0-6be88df9a...@lineo.co.jp> you wrote:
>>
>> I have a question about Pre-built (and tested) images.
>> README says:
>>
>> Pre-built (and tested) images are available from
>> ftp:
SquashFS may need a large amount of dynamic memory fot its buffers,
especially if and when compression is enabled I got failures with
CONFIG_SYS_MALLOC_LEN < 0x4000.
I found no way to enforce this in Kconfig itself, so I resorted
to ada a warning in help string.
Signed-off-by: Mauro Condarelli
-
Corrected to comply with all reviev comments in v2.
Sorry for the delay, but I was fighting a very bad u-boot misbehavior
which seems completely unrelated to this patchset, I was unsure, but
I made real sure my problems exist with ot without this.
My problem is u-boot seems to become unstable i
Use macros in linux/kernel.h to avoid 64-bit divisions.
These divisions are needed to convert from file length (potentially
over 32-bit range) to block number, so result and remainder are
guaranteed to fit in 32-bit integers.
Some 32bit architectures (notably mipsel) lack an implementation of
__u
Hi Heinrich,
On Wed, 7 Oct 2020 at 10:12, Heinrich Schuchardt wrote:
>
> The sandbox is built with the SDL2 library with invokes the X11 library
> which in turn calls getc(). But getc() in glibc is defined as
>
> int getc(FILE *)
>
> This does not match our definition.
>
> int getc(void)
On Tue, Oct 06, 2020 at 11:36:15AM -0600, Simon Glass wrote:
> Hi Tom,
>
> build result here:
> https://gitlab.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/4934
>
> The following changes since commit b24550accd7e3a62c6da773a9096dfd1471403d5:
>
> configs: Resync with savedefconfig (2020-10-
On Wed, Oct 07, 2020 at 06:11:48PM +0200, Heinrich Schuchardt wrote:
> The sandbox is built with the SDL2 library with invokes the X11 library
> which in turn calls getc(). But getc() in glibc is defined as
>
> int getc(FILE *)
>
> This does not match our definition.
>
> int getc(void)
Hi Tom,
please pull some more updates for Octeon MIPS64.
Gitlab CI:
https://gitlab.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/4947
The following changes since commit 5dcf7cc590b348f1e730ec38242df64c179f10a8:
Merge tag 'efi-2021-01-rc1' of
https://gitlab.denx.de/u-boot/custodians/u-bo
On 9/14/20 11:01 AM, Sean Anderson wrote:
> This patch series adds support for pinmuxing, gpios, buttons, and leds on the
> Kendyte K210.
>
> The fail-to-boot bug should be fixed by the timer driver cleanup patch :)
>
> This patch series was previously part of
> https://patchwork.ozlabs.org/proje
Use CCF compatible for PMC. With this, the board/SoC will be
able to boot.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60.dtsi | 133 +++--
arch/arm/dts/sam9x60ek-u-boot.dtsi | 62 ++---
arch/arm/dts/sam9x60ek.dts | 2 +-
3
Use alphabetical order for entries in sam9x60ek-u-boot.dtsi
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60ek-u-boot.dtsi | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi
b/arch/arm/dts/sam9x60ek-u-boot.d
Use u-boot,dm-pre-reloc for slow xtal and main xtal.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60ek-u-boot.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi
b/arch/arm/dts/sam9x60ek-u-boot.dtsi
index 93cf1262f6fc..65b4a3c7c673 100644
-
Add SAM9X60 clock support compatible with CCF.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/sam9x60.c | 649 +
2 files changed, 650 insertions(+)
create mode 100644 drivers/clk/at91/sam9x60.c
diff --git a/dri
Update defconfigs for using common clock framework compatible
clocks.
Signed-off-by: Claudiu Beznea
---
configs/sam9x60ek_mmc_defconfig | 4 +++-
configs/sam9x60ek_nandflash_defconfig | 4 +++-
configs/sam9x60ek_qspiflash_defconfig | 4 +++-
3 files changed, 9 insertions(+), 3 deletions(-)
Slow Xtal and Main Xtal are board specific. Add their proper
frequency to board file.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60.dtsi | 2 --
arch/arm/dts/sam9x60ek.dts | 10 ++
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch
Use slow clock CCF compatible DT bindings. This will not break
the above functionality as the SoC is not booting with current
PMC bindings.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60.dtsi | 40 --
arch/arm/dts/sam9x60ek-u-boot.dtsi | 27 ++
Hi,
This series adds SAM9X60 clock support, CCF compatible, so that
SAM9X60 based boards (e.g. SAM9X60-EK in this case) to be able
to boot with mainline code.
This series is based on u-boot-atmel/next.
Thank you,
Claudiu Beznea
Changes in v3:
- move u-boot,dm-pre-reloc properties to sam9x60ek-u
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: Claudiu Beznea
---
include/configs/sam9x60ek.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/configs/sam9x60ek.h b/incl
This adds kerneldocs for .
I don't know who should maintain doc/api/timer.rst, since the timer
subsystem seems to be maintained by SoC maintainers. MAINTAINERS is left
un-updated for the moment.
Signed-off-by: Sean Anderson
---
Changes in v2:
- New
doc/api/index.rst | 1 +
doc/api/timer.rst
No timer drivers return an error from get_count. Instead of possibly
returning an error, just return the count directly.
Signed-off-by: Sean Anderson
---
Changes in v2:
- mchp-pit64b was added since v1, so convert it
- Document when get_count may be called, and what assumptions the timer
subsy
This series will conflict with [1]. One could be rebased on the other, depending
on what order they are merged.
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=205908
Changes in v2:
- Document timer API with kerneldoc
- mchp-pit64b was added since v1, so convert it
- Document when get
Use alphabetical order for entries in sam9x60ek-u-boot.dtsi
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60ek-u-boot.dtsi | 27 +++
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi
b/arch/arm/dts/sam9x60ek-u-boot.d
Update defconfigs for using common clock framework compatible
clocks.
Signed-off-by: Claudiu Beznea
---
configs/sam9x60ek_mmc_defconfig | 4 +++-
configs/sam9x60ek_nandflash_defconfig | 4 +++-
configs/sam9x60ek_qspiflash_defconfig | 4 +++-
3 files changed, 9 insertions(+), 3 deletions(-)
Use slow clock CCF compatible DT bindings. This will not break
the above functionality as the SoC is not booting with current
PMC bindings.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60.dtsi | 42 +-
arch/arm/dts/sam9x60ek-u-boot.dtsi | 27 ++
Slow Xtal and Main Xtal are board specific. Add their proper
frequency to board file.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60.dtsi | 2 --
arch/arm/dts/sam9x60ek.dts | 10 ++
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch
Use u-boot,dm-pre-reloc for slow xtal and main xtal.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60.dtsi | 2 ++
arch/arm/dts/sam9x60ek-u-boot.dtsi | 8
2 files changed, 10 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 51de586e1
Hi,
This series adds SAM9X60 clock support, CCF compatible, so that
SAM9X60 based boards (e.g. SAM9X60-EK in this case) to be able
to boot with mainline code.
This series is based on u-boot-atmel/next.
Thank you,
Claudiu Beznea
Changes in v2:
- remove "Alignment should match open parenthesis" a
Add SAM9X60 clock support compatible with CCF.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/sam9x60.c | 649 +
2 files changed, 650 insertions(+)
create mode 100644 drivers/clk/at91/sam9x60.c
diff --git a/dri
Use CCF compatible for PMC. With this, the board/SoC will be
able to boot.
Signed-off-by: Claudiu Beznea
---
arch/arm/dts/sam9x60.dtsi | 135 -
arch/arm/dts/sam9x60ek-u-boot.dtsi | 60 ++---
arch/arm/dts/sam9x60ek.dts | 2 +-
3
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: Claudiu Beznea
---
include/configs/sam9x60ek.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/configs/sam9x60ek.h b/incl
On 9/7/20 11:36 AM, Claudiu Beznea wrote:
> Add support for Microchip PIT64B timer. The timer is 64 bit length and
> is used as a free running counter (in continuous mode with highest values
> for period registers). The clock feeding the timer would be no more
> than 12.5MHz.
>
> Signed-off-by: Cl
The sandbox is built with the SDL2 library with invokes the X11 library
which in turn calls getc(). But getc() in glibc is defined as
int getc(FILE *)
This does not match our definition.
int getc(void)
The sandbox crashes when called with parameter -l.
Rename our library symbol getc()
On Wed, Oct 07, 2020 at 03:53:35PM +0200, Holger Brunck wrote:
> As the ownership is now Hitachi Power Grids, change the license string
> and adapt the compatible string in DTS files.
>
> Signed-off-by: Holger Brunck
> CC: Valentin Longchamp
> CC: Heiko Schocher
> CC: Marek Vasut
> CC: Tom Ri
On Wed, Oct 07, 2020 at 07:26:55AM -0600, Simon Glass wrote:
> Hi Patrick,
>
> On Wed, 7 Oct 2020 at 02:38, Patrick DELAUNAY wrote:
> >
> > Hi,
> >
> > > From: U-Boot On Behalf Of Peter Robinson
> > > Sent: mardi 29 septembre 2020 11:48
> > >
> > > The 44758771ee commit removes CONFIG_PREBOOT bu
Due to increasing kernel image sizes we get problems when decompressing
the kernel image. To fix this we need to change the addresses where we
load and where we extract the kernel. Also we need to adapt the address
where to load the CRAMFS image and where to load the DTB file.
While a it also harmo
Instead of having a hard coded value for "cramfsaddr" after compile time,
we change it to take the variable "cramfsaddr" for the ubicopy variable.
This makes sure that ubicopy uses the right address, even when
the value for "cramfsaddr" has changed.
CC: Valentin Longchamp
CC: Heiko Schocher
CC:
As the ownership is now Hitachi Power Grids, change the license string
and adapt the compatible string in DTS files.
Signed-off-by: Holger Brunck
CC: Valentin Longchamp
CC: Heiko Schocher
CC: Marek Vasut
CC: Tom Rini
---
arch/arm/dts/socfpga_arria5_secu1.dts | 4 ++--
arch/powerpc/dts/km830
Hi everyone, I am new to this group, and I am reaching out to see if anyone can
help me with building the uboot for the Google Coral board.
Here is what I did on my Ubuntu 20.04:
$ git clone https://coral.googlesource.com/uboot-imx
$ make ARCH=arm64 mx8mq_phanbell_defconfig
$ make CROSS_COMPILE=
On Wed, 7 Oct 2020 at 17:08, Ard Biesheuvel wrote:
>
> On Wed, 7 Oct 2020 at 16:55, Etienne Carriere
> wrote:
> >
> > Hello all,
> >
> > On Wed, 7 Oct 2020 at 15:16, Ard Biesheuvel wrote:
> > >
> > > On Wed, 7 Oct 2020 at 13:53, Ahmad Fatoum wrote:
> > > >
> > > > Hello,
> > > >
> > > > On 10/7
On Wed, 7 Oct 2020 at 16:55, Etienne Carriere
wrote:
>
> Hello all,
>
> On Wed, 7 Oct 2020 at 15:16, Ard Biesheuvel wrote:
> >
> > On Wed, 7 Oct 2020 at 13:53, Ahmad Fatoum wrote:
> > >
> > > Hello,
> > >
> > > On 10/7/20 1:23 PM, Ahmad Fatoum wrote:
> > > > My findings[1] back then were that U-
Hello all,
On Wed, 7 Oct 2020 at 15:16, Ard Biesheuvel wrote:
>
> On Wed, 7 Oct 2020 at 13:53, Ahmad Fatoum wrote:
> >
> > Hello,
> >
> > On 10/7/20 1:23 PM, Ahmad Fatoum wrote:
> > > My findings[1] back then were that U-Boot did set the eXecute Never bit
> > > only on
> > > OMAP, but not for o
SPL DT contains only nodes which are contain u-boot,dm-pre-reloc property.
iommu node is not this case that's why when DT is read DTC reports some
warnings.
$ dtc -I dtb -O dts dts/dt-spl.dtb >/dev/null
: Warning (iommus_property): /amba/spi@ff0f:iommus: Could not get
phandle node for (cell 0
Dear Naoki,
In message <70a4beb7-b5c1-a4af-67b0-6be88df9a...@lineo.co.jp> you wrote:
>
> I have a question about Pre-built (and tested) images.
> README says:
>
> Pre-built (and tested) images are available from
> ftp://ftp.denx.de/pub/u-boot/images/
>
> However, this link is broken.
>
Sometimes it is very useful to be able disable/enable cache that's why
enable commands for it by default.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_virt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/xilinx_zynqmp_virt_defconfig
b/configs/xilinx_zynqmp_virt_d
fpga bitstream needs to be listed in config node in FIT image. Only tested
option is bitstream in BIN format.
Enabling this feature increase code size by almost 4k.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_virt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/x
Hi,
this series enables loading fpga bitstream from FIT image by SPL.
Thanks,
Michal
Michal Simek (4):
firmware: zynqmp: Swap addr_hi/low when PM_FPGA_LOAD is called
mailbox: zynqmp: Extend timeout for getting observation bit
arm64: zynqmp: Get rid of simple_itoa and replace it by snprint
In case of fpga loading (which can be huge) 100ms is not enough. That's why
extend timeout 10 times to wait maximum 1s to get ACK back.
Signed-off-by: Michal Simek
---
drivers/mailbox/zynqmp-ipi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox/zynqmp-ipi.c b
simple_itoa() is implemented only for !CONFIG_USE_TINY_PRINTF. Tiny printf
is normally used by SPL that's code which uses simple_itoa() has missing
reference. That's why refactor code by using on snprintf() instead of
strncpy()/strncat() combination. This change also descrease code size by
saving 2
Don't know reason but in regular flow addr_hi/low are swapped in ATF. It
means when fpga load is done from EL3 there is a need to swap it for PMUFW
to load bitstream.
Signed-off-by: Michal Simek
---
drivers/firmware/firmware-zynqmp.c | 8
1 file changed, 8 insertions(+)
diff --git a/d
This change fixes two issues when building u-boot-nodtb.bin target:
* Remove intermediate binary u-boot-nodtb.bin from disk when static_rela
call (which modifies u-boot-nodtb.bin binary) failed. It is required
because previous objcopy call creates binary and static_rela finish it.
* Do not ca
Hi Patrick,
On Wed, 7 Oct 2020 at 02:38, Patrick DELAUNAY wrote:
>
> Hi,
>
> > From: U-Boot On Behalf Of Peter Robinson
> > Sent: mardi 29 septembre 2020 11:48
> >
> > The 44758771ee commit removes CONFIG_PREBOOT but actually sets the
> > USE_PREBOOT Kconfig option which isn't CONFIG_PREBOOT and
On Tue, 29 Sep 2020 at 08:18, Sean Anderson wrote:
>
> This adds a driver to handle enabling the clock for the AI SRAM. This was
> previously done in board_init, but it needs to happen before relocation
> now. An alternative would be to move this to board_init_early_f, but by
> doing it this way w
On 07.10.20 11:04, Patrick Wildt wrote:
> With DM enabled the ethernet code will receive a packet, call
> the push method that's set by the EFI network implementation
> and then free the packet. Unfortunately the push methods only
> sets a flag that the packet needs to be handled, but the code
> t
On Wed, 7 Oct 2020 at 13:53, Ahmad Fatoum wrote:
>
> Hello,
>
> On 10/7/20 1:23 PM, Ahmad Fatoum wrote:
> > My findings[1] back then were that U-Boot did set the eXecute Never bit
> > only on
> > OMAP, but not for other platforms. So I could imagine this being the root
> > cause
> > of Patrick'
Hello Ard, Patrick,
On 10/7/20 12:26 PM, Ard Biesheuvel wrote:
>> The issue is solved only when the region reserved by OP-TEE is no more
>> mapped in U-Boot (mapped as DEVICE/NON-CACHEABLE wasn't enough) as it is
>> already done in Linux kernel.
>>
>
> Spurious peculative accesses to device regio
Hello,
On 10/7/20 1:23 PM, Ahmad Fatoum wrote:
> My findings[1] back then were that U-Boot did set the eXecute Never bit only
> on
> OMAP, but not for other platforms. So I could imagine this being the root
> cause
> of Patrick's issues as well:
Rereading my own link, my memory is a little les
If u-boot gets used as coreboot payload it might be nice to get
vendor, model and bios version from smbios. I am not sure about
the output of all the read information.
With qemu target for coreboot this could look this:
CBFS: Found @ offset 14f40 size 3b188
Checking segment from ROM address 0xffc
Add an very simple API to be able to access SMBIOS strings
like vendor, model and bios version.
Signed-off-by: Christian Gmeiner
---
include/smbios.h| 27 +
lib/Kconfig | 6 +++
lib/Makefile| 1 +
lib/smbios-parser.c | 96
On 11:15-20201007, Lokesh Vutla wrote:
>
>
> On 07/10/20 12:35 am, Nishanth Menon wrote:
> > Use the common defaults from ./include/configs/ti_armv7_common.h
> >
> > This saves us from rediscovering the same painful lessons learnt from
> > ARMv7 (kernel dtbs r
The command 'clocks' shows the following output:
=> clocks
PLL_A7_SPLL 528 MHz
PLL_A7_APLL 529 MHz
PLL_USB 0 MHz
[do_mx7_showclocks] addr = 0x9FFB61F1
The last line is not useful at all, so just remove it.
Signed-off-by: Fabio Estevam
---
arch/arm/mach-imx/mx7u
The command 'clocks' shows the following output:
=> clocks
PLL_A7_SPLL 528 MHz
PLL_A7_APLL 529 MHz
PLL_USB 0 MHz
Add some extra spaces so that the PLL_USB information gets aligned with
the previous reported frequencies.
Signed-off-by: Fabio Estevam
---
arch/arm/mach-i
On 07.10.20 11:03, Patrick Wildt wrote:
> With a define for the magic number of packets received as batch
> we can make sure that the EFI network stack caches the same amount
> of packets.
>
> Signed-off-by: Patrick Wildt
Reviewed-by: Heinrich Schuchardt
> ---
>
> Changes in v3:
> - Simple reba
On Tue, 6 Oct 2020 at 18:36, Patrick Delaunay wrote:
>
>
> Hi,
>
> On STM32MP15x platform we can use OP-TEE, loaded in DDR in a region
> protected by a firewall. This region is reserved in device with "no-map"
> property.
>
> But sometime the platform boot failed in U-boot on a Cortex A7 access to
With DM enabled the ethernet code will receive a packet, call
the push method that's set by the EFI network implementation
and then free the packet. Unfortunately the push methods only
sets a flag that the packet needs to be handled, but the code
that provides the packet to an EFI application runs
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