Re: [PATCH v4 05/12] pinctrl: single: get register area size by device API

On 01.05.21 17:39, Dario Binacchi wrote: > Hi Jan, > >> Il 01/05/2021 14:29 Jan Kiszka ha scritto: >> >> >> On 11.04.21 09:39, Dario Binacchi wrote: >>> Use dev_read_addr_size to get size of the controller's register area. >>> >>> Signed-off-by: Dario Binacchi >>> Reviewed-by: Pratyush Yadav >>>

Re: 32-bit DMA limit for devices (and drivers)

Hi Andre, On Sun, May 2, 2021 at 8:22 AM Andre Przywara wrote: > > On Sat, 1 May 2021 14:23:32 +0200 (CEST) > Mark Kettenis wrote: > > Hi, > > > > From: Bin Meng > > > Date: Sat, 1 May 2021 19:45:02 +0800 > > > > > > On Fri, Apr 30, 2021 at 7:22 PM Andre Przywara > > > wrote: > > > > > > > >

Re: 32-bit DMA limit for devices (and drivers)

On Sat, 1 May 2021 14:23:32 +0200 (CEST) Mark Kettenis wrote: Hi, > > From: Bin Meng > > Date: Sat, 1 May 2021 19:45:02 +0800 > > > > On Fri, Apr 30, 2021 at 7:22 PM Andre Przywara > > wrote: > > > > > > Hi, > > > > > > We now see the first Allwinner devices [1] having DRAM located above >

Re: [PATCH 0/5] Fix i.MXRT1050 hang on lcdif init and improve DT for mxsfb

On 4/13/21 1:05 AM, Giulio Benetti wrote: On 4/13/21 1:03 AM, Giulio Benetti wrote: This patchset fixes u-boot hang on i.MXRT1050 while setting lcdif in mxsfb driver. There are 2 gates to be enabled to initialize mxsfb so let's introduce the missing gate as a clock and rename "per" clock to "pix

[PATCH v2 16/16] configs: imxrt1050-evk: enable imx gpt timer as tick-timer

Signed-off-by: Giulio Benetti --- configs/imxrt1050-evk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index f639ea7623..e74473511d 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @

[PATCH v2 15/16] ARM: dts: imxrt1050-evk: add device_type = "memory" to memory node

Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index

[PATCH v2 14/16] ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPL

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk-u-boot.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi index fb4f7f6f9d..a4b50f0bb2 100644 --- a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi +++ b/

[PATCH v2 13/16] ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-boot

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index e592330332..6d21f2b738 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -16

[PATCH v2 12/16] ARM: dts: imxrt1050-evk: enable gpt1 timer

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050-evk.dts | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index b5e781275e..e592330332 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@

[PATCH v2 11/16] ARM: dts: imxrt1050: add gpt1 node

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index b7cc3fbc2a..6f9da3fe8a 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -154,5 +15

[PATCH v2 10/16] ARM: dts: imxrt1050: add alias to osc

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1050.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index a9281001e5..b7cc3fbc2a 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -2

[PATCH v2 09/16] configs: imxrt1020-evk: enable imx gpt timer as tick-timer

Signed-off-by: Giulio Benetti --- configs/imxrt1020-evk_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index 9bddb69cd4..51ff702bc6 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @

[PATCH v2 08/16] ARM: dts: imxrt1020-evk: add device_type = "memory" to memory node

Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts index

[PATCH v2 07/16] ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPL

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk-u-boot.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi index d32c98de9c..34d19e06c5 100644 --- a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi +++ b/

[PATCH v2 06/16] ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-boot

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts index a471ff3838..b527206fcf 100644 --- a/arch/arm/dts/imxrt1020-evk.dts +++ b/arch/arm/dts/imxrt1020-evk.dts @@ -16

[PATCH v2 05/16] ARM: dts: imxrt1020-evk: enable gpt1 timer

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020-evk.dts | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts index ece13601bd..a471ff3838 100644 --- a/arch/arm/dts/imxrt1020-evk.dts +++ b/arch/arm/dts/imxrt1020-evk.dts @@

[PATCH v2 04/16] ARM: dts: imxrt1020: add gpt1 node

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index 0a3a3b451a..cab608c644 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -129,5 +12

[PATCH v2 01/16] arm: imxrt: soc: make mpu regions generic

This mpu handling works for every i.MXRT SoC that we have, so let's generalize imxrt1050_region_config to imxrt_region_config. Signed-off-by: Giulio Benetti --- arch/arm/mach-imx/imxrt/soc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/imxrt/soc.c b

[PATCH v2 02/16] timer: imx-gpt: Add timer support for i.MX SoCs family

This timer driver uses GPT Timer (General Purpose Timer) available on a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator as well as peripheral clock. Signed-off-by: Giulio Benetti [Giulio: added the driver's stub and handled peripheral clock prescaler setting] Signed-off-by:

[PATCH v2 03/16] ARM: dts: imxrt1020: add alias to osc

Signed-off-by: Giulio Benetti --- arch/arm/dts/imxrt1020.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index 97f3cec9f3..0a3a3b451a 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -3

[PATCH v2 00/16] Fix i.MXRT1020/50

This patchset adds imx-gpt-timer driver that is supported by i.MXRT and also a lot of other i.MX* SoCs. This driver is needed for i.MXRT SoC family that is lacking at the moment the timer at all and that makes u-boot to fail running on i.MXRT. There are also some fixes in imxrt10*0-evk.dts and othe

Re: [PATCH 3/3] imx8mn: configs: add support for distro boot commands

On Sat, May 1, 2021 at 5:24 PM Andrey Zhizhikin wrote: > > Supported boot device types in iMX8MN: MMC, DHCP. > > Add DISTRO_DEFAULTS config option and include the distro boot command > header file to enable full support of distro boot on i.MX8M Nano EVK (both > DDR and LPDDR derivatives). > > Drop

Re: [PATCH 2/3] imx8mp: configs: enable distro default features

On Sat, May 1, 2021 at 5:24 PM Andrey Zhizhikin wrote: > > imx8mp ekv has been switched to use distro boot commands, but had no > correct options enabled to support sysboot. > According to the README.distro, sysboot is consindered to be a > recommended way of using distro boot commands, it require

Re: [PATCH 1/3] imx8mm: configs: enable distro default features

Hi Andrey, On Sat, May 1, 2021 at 5:24 PM Andrey Zhizhikin wrote: > > imx8mm ekv has been switched to use distro boot commands, but had no > correct options enabled to support sysboot. > According to the README.distro, sysboot is consindered to be a > recommended way of using distro boot commands

[PATCH 3/3] imx8mn: configs: add support for distro boot commands

Supported boot device types in iMX8MN: MMC, DHCP. Add DISTRO_DEFAULTS config option and include the distro boot command header file to enable full support of distro boot on i.MX8M Nano EVK (both DDR and LPDDR derivatives). Drop previous environment, which was targeting customized boot commands an

[PATCH 0/3] Correct and extend distro boot support for imx8m

Distro boot support for imx8m family is not completed, with: (a) imx8mm and imx8mp has facilities enabled to support only boot flow based on the boot scripts; (b) im8mn has no distro boot support enabled, and still adheres to the customized boot flow using modified environment; This patch series a

[PATCH 2/3] imx8mp: configs: enable distro default features

imx8mp ekv has been switched to use distro boot commands, but had no correct options enabled to support sysboot. According to the README.distro, sysboot is consindered to be a recommended way of using distro boot commands, it required default distro features to be enabled instead of only those that

[PATCH 1/3] imx8mm: configs: enable distro default features

imx8mm ekv has been switched to use distro boot commands, but had no correct options enabled to support sysboot. According to the README.distro, sysboot is consindered to be a recommended way of using distro boot commands, it required default distro features to be enabled instead of only those that

[PATCH] arm: imx: imx8mm: correct unrecognized fracpll frequency

Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ() macro, which expands the value provided to the Hz range without taking into account the precise Hz setting. This causes the frequency of 266 MHz not ot be found in the imx8mm_fracpll_tbl, since it is entered there with a precise

[PATCH] Makefile: allow to override python3

Python3 taken from the PATH causes build issues when pylibfdt bindings are generated with Yocto SDK. Python3 provided as a part of SDK is not compatible with host Python3, therefore binding build breaks with following errors: scripts/dtc/pylibfdt/libfdt_wrap.c:154:11: fatal error: Python.h: No su

dfu-util capability

I have a system that has a CPU running u-boot and have a Xilinx Zynq connected via USB using DFU to download the FPGA image. I can successfully download the FPGA image via dfu-util from the linux OS. I would like to be able to load that same image from u-boot prior to loading the OS. From

Re: [PATCH v4 05/12] pinctrl: single: get register area size by device API

Hi Jan, > Il 01/05/2021 14:29 Jan Kiszka ha scritto: > > > On 11.04.21 09:39, Dario Binacchi wrote: > > Use dev_read_addr_size to get size of the controller's register area. > > > > Signed-off-by: Dario Binacchi > > Reviewed-by: Pratyush Yadav > > > > --- > > > > (no changes since v3) > > >

[PATCH v2 5/5] Revert "fdt: translate address if #size-cells = <0>"

This reverts commit d64b9cdcd475eb7f07b49741ded87e24dae4a5fc. As pointed by [1] and [2], the reverted patch made every DT 'reg' property translatable. What the patch was trying to fix was fixed in a different way from previously submitted patches which instead of correcting the generic address tra

[PATCH v2 4/5] clk: ti: am3-dpll: use custom API for memory access

Using the custom TI functions required not only replacing common memory access functions but also rewriting the routines used to set bypass and lock states. As for readl() and writel(), they also required the address of the register to be accessed, a parameter that is hidden by the TI clk module.

[PATCH v2 3/5] clk: ti: gate: use custom API for memory access

Replaces the common memory access functions used by the driver with the ones exported from the TI clk module. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/clk/ti/clk-gate.c | 23 --- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/

[PATCH v2 1/5] clk: ti: add custom API for memory access

As pointed by [1] and [2], commit d64b9cdcd4 ("fdt: translate address if #size-cells = <0>") is wrong: - It makes every 'reg' DT property translatable. It changes the address translation so that for an I2C 'reg' address you'll get back as reg the I2C controller address + reg value. - The quirk

[PATCH v2 2/5] clk: ti: change clk_ti_latch() signature

The clock access functions exported by the clk header use the struct clk_ti_reg parameter to get the address of the register. This must also apply to clk_ti_latch(). Changes to TI's clk-mux and clk-divider drivers prevented the patch from generating compile errors. Signed-off-by: Dario Binacchi -

[PATCH v2 0/5] Revert "fdt: translate address if #size-cells = <0>"

As pointed by [1] and [2] the d64b9cdcd4 ("fdt: translate address if #size-cells = <0>") commit was wrong. The series reverts the patch and fixes the issue with platform code, adding custom routines to access the clocks registers. The solution has been inspired by the Linux Kernel code. [1] ht

Re: [PATCH v4 05/12] pinctrl: single: get register area size by device API

On 11.04.21 09:39, Dario Binacchi wrote: > Use dev_read_addr_size to get size of the controller's register area. > > Signed-off-by: Dario Binacchi > Reviewed-by: Pratyush Yadav > > --- > > (no changes since v3) > > Changes in v3: > - Added Pratyush Yadav review tag. > > Changes in v2: > - Check d

Re: 32-bit DMA limit for devices (and drivers)

> From: Bin Meng > Date: Sat, 1 May 2021 19:45:02 +0800 > > On Fri, Apr 30, 2021 at 7:22 PM Andre Przywara wrote: > > > > Hi, > > > > We now see the first Allwinner devices [1] having DRAM located above > > 4GB in address space (4GB DRAM starting at 1GB). After one fix[2] > > this works somewhat

Re: [RFC PATCH v7 1/2] riscv: cpu: Add callback to init each core

Thanks for the review. Will fix the issues and remove the RFC. - Green Bin Meng 於 2021年5月1日 週六，下午7:55寫道： > Hi Green, > > On Thu, Apr 22, 2021 at 5:18 PM Green Wan wrote: > > > > Add a callback harts_early_init() to start.S to allow different riscv > > hart perform setup code for each hart as ea

Re: [RFC PATCH v7 1/2] riscv: cpu: Add callback to init each core

Hi Green, On Thu, Apr 22, 2021 at 5:18 PM Green Wan wrote: > > Add a callback harts_early_init() to start.S to allow different riscv > hart perform setup code for each hart as early as possible. Since all > the harts enter the callback, they must be able to run the same > setup. > > Signed-off-by

Re: 32-bit DMA limit for devices (and drivers)

On Fri, Apr 30, 2021 at 7:22 PM Andre Przywara wrote: > > Hi, > > We now see the first Allwinner devices [1] having DRAM located above > 4GB in address space (4GB DRAM starting at 1GB). After one fix[2] > this works somewhat fine, but the sun8i-emac network device is still > limited to 32-bit DMA

Re: [PATCH v1 1/6] lib: add crypt subsystem

Hi Simon, On 4/29/21 6:10 PM, Simon Glass wrote: >> diff --git a/include/crypt.h b/include/crypt.h >> new file mode 100644 >> index 00..e0be2832ff >> --- /dev/null >> +++ b/include/crypt.h >> @@ -0,0 +1,13 @@ >> +/* SPDX-License-Identifier: GPL-2.0+ */ >> +/* Copyright (C) 2020 Steffen Jae