On 5/15/21 5:20 PM, Simon Glass wrote:
> On Fri, 14 May 2021 at 13:46, Alexandru Gagniuc wrote:
>>
>> Function pointers from crypto_algos array are relocated, when
>> NEEDS_MANUAL_RELOC is set. This relocation doesn't happen if the algo
>> is placed in a linker list. Implement this relocation.
Hi Simon,
On 5/8/21 12:37 AM, Simon Glass wrote:
> U-Boot provides a verified-boot feature based around FIT, but there is
> no standard way of implementing it for a board. At present the various
> required pieces must be built up separately, to produce a working
> implementation. In particular, th
Hi Leo and Bin,
I have the 'binman' patch for unmatched ready. So, we can pick up the
'binman' series first.
I plan to create a v10 patchset that includes the fu740 series on top of
'binman' patch and 'split CLINT' patchset and appends 'clear feature
disable CSRs' and 'binman change for unmatched
po 10. 5. 2021 v 16:17 odesílatel Michal Simek napsal:
>
> Hi,
>
> this patchset is adding support for new Xilinx SOM platform. SOM+CC.
> Also adding description for pin control and PSGTR phys with also some small
> fixes in DT.
>
> Thanks,
> Michal
>
>
> Michal Simek (6):
> arm64: zynqmp: Add m
st 12. 5. 2021 v 14:35 odesílatel Michal Simek napsal:
>
> From: T Karthik Reddy
>
> U-Boot expects to be linked to a specific hard-coded address and to
> be loaded to and run from that address. CONFIG_POSITION_INDEPENDENT
> config lifts that restriction & allowing the code to be loaded to
> and
st 12. 5. 2021 v 10:14 odesílatel Michal Simek napsal:
>
> Right now U-Boot is not aware about date/time that's why enable it by
> default also with EFI runtime service for setting time.
>
> Signed-off-by: Michal Simek
> ---
>
> configs/xilinx_zynqmp_virt_defconfig | 4
> 1 file changed, 4
SVD (Software Virtual Devices) are using different name which can't be
handled via zynqmp_devices structure. That's why introduce
zynqmp_detect_svd_name() which checks ID code for these devices and show
proper name for them.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 28
On Wed, May 19, 2021 at 03:52:39PM +0800, Green Wan wrote:
Hi Green,
> Hi Leo and Bin,
>
> I have the 'binman' patch for unmatched ready. So, we can pick up the
> 'binman' series first.
>
> I plan to create a v10 patchset that includes the fu740 series on top of
> 'binman' patch and 'split CL
Enable gpio driver on these boards. GPIOs can be used on any board.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-zcu1275-revA.dts | 4
arch/arm/dts/zynqmp-zcu1275-revB.dts | 4
arch/arm/dts/zynqmp-zcu1285-revA.dts | 4
3 files changed, 12 insertions(+)
diff --git a/arch/a
From: Ashok Reddy Soma
>From U-Boot, loading application on RPU core 0 is fine but loading on
core 1 is not handled properly. Lock-step mode needs both the R5 cores
to be initialized and it is working fine. Whereas in SPLIT mode individual
R5 cores needs to be initialized as they need to execute
GCC provides a symbol _init in crti.o on x86_64 and aarch64 but not on
RISC-V. The following lines leads to a build error for sandbox_defconfig on
RISC-V due to the missing symbol:
common/board_f.c:269:
#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
gd->mon_len = (ulo
From: T Karthik Reddy
CONFIG_ZYNQMP_FIRMWARE enables zynqmp firmware driver.
Signed-off-by: T Karthik Reddy
Signed-off-by: Michal Simek
---
configs/xilinx_versal_mini_emmc0_defconfig | 1 +
configs/xilinx_versal_mini_emmc1_defconfig | 1 +
configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 +
co
Enabling EFI secure boot which is required for EBBR specification.
Enabling this will fix
"RT.SetVariable - Create one Time Base Auth Variable, the expect return
status should be EFI_SUCCESS"
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_virt_defconfig | 1 +
1 file changed, 1 insertion
'gpt' and 'mmc0' fastboot partitions have been treated as the same device,
but it is wrong.
Fill disk_partition structure with eMMC user partition info
to properly flash data.
Signed-off-by: Oleh Kravchenko
Cc: Pantelis Antoniou
Cc: Marek Vasut
Cc: Sean Anderson
Cc: Tom Rini
---
Changes fo
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."
Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]
Add psu_init_gpl file for getting SPL to work directly from the tree.
Signed-off-by: Michal Simek
---
.../zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c | 673 ++
board/xilinx/zynqmp/zynqmp-smk-k26-revA | 1 +
2 files changed, 674 insertions(+)
create mode 100644 board/xilin
On Wed, May 19, 2021 at 4:58 PM Leo Liang wrote:
> On Wed, May 19, 2021 at 03:52:39PM +0800, Green Wan wrote:
>
> Hi Green,
>
> > Hi Leo and Bin,
> >
> > I have the 'binman' patch for unmatched ready. So, we can pick up the
> 'binman' series first.
> >
> > I plan to create a v10 patchset that inc
Signed-off-by: Kuldeep Singh
---
configs/ls1088aqds_tfa_defconfig | 1 +
configs/ls1088ardb_tfa_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index 5229a351e1..ea308cafef 100644
--- a/configs/ls1088aqds_tfa_defc
Hello Sean,
Could you please take a look?
I've updated the patch.
19.05.21 13:31, Oleh Kravchenko пише:
> 'gpt' and 'mmc0' fastboot partitions have been treated as the same device,
> but it is wrong.
>
> Fill disk_partition structure with eMMC user partition info
> to properly flash data.
>
> Sig
Fix compilation error when Werror is turned on. The warning could
possible break some CI builds.
Signed-off-by: Green Wan
---
drivers/pci/pcie_dw_common.c | 54 +++-
1 file changed, 29 insertions(+), 25 deletions(-)
diff --git a/drivers/pci/pcie_dw_common.c b/dri
Hi Green,
On Wed, May 19, 2021 at 3:52 PM Green Wan wrote:
>
> Hi Leo and Bin,
>
> I have the 'binman' patch for unmatched ready. So, we can pick up the
> 'binman' series first.
>
> I plan to create a v10 patchset that includes the fu740 series on top of
> 'binman' patch and 'split CLINT' patch
From: Patrick Delaunay
Update the result of do_status and always returns a CMD_RET_ value
(-ENOSYS was a possible result of show_pinmux).
This patch also adds pincontrol name in error messages (dev->name)
and treats correctly the status sub command when pin-controller device is
not selected.
S
Allow pin name parameter for pimux staus command,
as gpio command to get status of one pin.
The possible usage of the command is:
> pinmux dev pinctrl
> pinmux status
> pinmux status -a
> pinmux status
Signed-off-by: Patrick Delaunay
---
Changes in v2:
- use -ENOENT when the pin name is not
On Tuesday 18 May 2021 21:26:40 Tom Rini wrote:
> This board has not been converted to CONFIG_DM_USB by the deadline.
> Remove it.
I'm very disappointed that you want to remove Nokia N900 from U-Boot.
I was waiting waiting half of year because other developers did not
react to issues which were i
On Tue, 20 Apr 2021 19:19:44 +0100
John Keeping wrote:
> The "-E" option to mkimage generates a FIT with external data using the
> data-size and data-offset properties which must both be ignored when
> verifying a signature.
>
> Add "data-offset" to the list of excluded properties for signature
It's possible that LOAD_FIT_FULL will have different values for TPL and
SPL, in which case just checking CONFIG_SPL_LOAD_FIT_FULL causes this to
be compiled in to the TPL even though functions and struct members it
depends on are not.
Use CONFIG_IS_ENABLED() to ensure the correct TPL/SPL variant i
Define identifiers for clnt_login field in struct tee_open_session_arg
based in GlobalPlatform Device TEE IDs and on the REE_KERNEL identifier
extension from OP-TEE OS.
Signed-off-by: Etienne Carriere
---
Changes since v1:
- Rename macros to TEE_LOGIN_* and use same inline description as made
i
Remove unused OPTEE_MSG_LOGIN_* IDs and rely on the ones introduced in
tee.h. Change optee core to treat invalid client IDs as public login.
Signed-off-by: Etienne Carriere
---
Changes since v1:
- Remove ID conversion. I kept the sanitation of login ID for optee.
---
drivers/tee/optee/core.c
Hello Pali,
Is there some wiki page on how to flash u-boot and Linux to N900 (JTAG,
UART, etc.)?
I have this device and would like to play with that.
19.05.21 16:27, Pali Rohár пише:
> On Tuesday 18 May 2021 21:26:40 Tom Rini wrote:
>> This board has not been converted to CONFIG_DM_USB by the de
This change ensures both U-Boot and OP-TEE see the same content
from shared memory when OP-TEE is invoked prior U-Boot relocation.
This change is required since U-Boot may execute with data cahce off
while OP-TEE always enables cache on memory shared with U-Boot.
Signed-off-by: Etienne Carriere
On Wed, May 19, 2021 at 10:06 PM John Keeping wrote:
>
> It's possible that LOAD_FIT_FULL will have different values for TPL and
> SPL, in which case just checking CONFIG_SPL_LOAD_FIT_FULL causes this to
> be compiled in to the TPL even though functions and struct members it
> depends on are not.
It’s a bit short notice to host another TF-A Tech-forum call on this tomorrow
for a live debate as well as Manish who led the call last time is not available
this week. So I propose our next TF-A Techforum session on Thursday 3rd June at
4pm BST and between now and then email discussions can pos
Looks t...@lists.trustedfirmware.org got dropped. Adding that back in.
Joanna
On 19/05/2021, 15:33, "Joanna Farley" wrote:
It’s a bit short notice to host another TF-A Tech-forum call on this
tomorrow for a live debate as well as Manish who led the call last time is not
available this we
Hi Tom,
please pull these changes. There is one critical Versal patch which was
checked by Stefan and Heinrich.
There are also DT fixes for mini configurations and DT syncup patches
with the Linux kernel.
Also I have added k26 board.
I have tested it on zcu102/zcu104 and k26.
Gitlab CI also not sh
On Wednesday 19 May 2021 17:27:32 Oleh Kravchenko wrote:
> Hello Pali,
> Is there some wiki page on how to flash u-boot and Linux to N900 (JTAG,
> UART, etc.)?
Flashing UART or JTAG could be possible with proprietary Nokia flasher.
But there are just very few people with UART access to Nokia N900
This patch set is to add SiFive fu740 chip and HiFive Unmatched board
support. Patches are split into several parts:
- [PATCH v10 1/9] support for fu740 cpu
- [PATCH v10 2/9] support for fu740 clk driver
- [PATCH v10 3/9] rename and support for fu740 ram driver
- [PATCH v10 4/9] add pcie d
Rename fu540_ddr.c to sifive_ddr.c and add fu740 support
Signed-off-by: Green Wan
Reviewed-by: Bin Meng
---
drivers/ram/sifive/Kconfig| 8 +-
drivers/ram/sifive/Makefile | 2 +-
.../ram/sifive/{fu540_ddr.c => sifive_ddr.c} | 89 ++-
3 fil
Add SiFive fu740 cpu to support RISC-V arch
Signed-off-by: Green Wan
Reviewed-by: Bin Meng
---
arch/riscv/Kconfig| 1 +
arch/riscv/cpu/fu740/Kconfig | 37 +++
arch/riscv/cpu/fu740/Makefile | 12 +
arch/riscv/cpu/fu740/cache.c
Add pcie driver for SiFive fu740, the driver depends on
fu740 gpio, clk and reset driver to do init. Force running at Gen1
for better capatible enumeration.
Several devices are tested:
a) M.2 NVMe SSD
b) USB-to-PCI adapter
c) Ethernet adapter (E1000 compatible)
Signed-off-by: Green Wan
Reviewed-
Add fu740 support. One abstract layer is added for supporting
multiple chips such as fu540 and fu740.
Signed-off-by: Green Wan
---
arch/riscv/cpu/fu540/Kconfig | 2 +-
drivers/clk/sifive/Kconfig | 8 +-
drivers/clk/sifive/Makefile | 4 +-
drivers/clk/sifive/fu540-prci.c | 7
Add dts support for fu740. The HiFive Unmatched support is based on
fu740 cpu and drivers in following patch set.
Signed-off-by: Green Wan
[greentime.hu: set fu740 speed to 1.2GHz]
Signed-off-by: Greentime Hu
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
arch/riscv/dts/fu740-c000-u-boot.dt
Clear feature disable CSR to turn on all features of hart. The detail
is specified at section, 'SiFive Feature Disable CSR', in user manual
https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf
Signed-off-by: Green Wan
Reviewed-by:
Add dts files for SiFive Unmatched board.
Signed-off-by: Green Wan
Reviewed-by: Rick Chen
---
arch/riscv/dts/Makefile |1 +
.../dts/fu740-hifive-unmatched-a00-ddr.dtsi | 1489 +
.../dts/hifive-unmatched-a00-u-boot.dtsi | 40 +
arch/riscv/dts/hi
Update to use binman instead.
Signed-off-by: Green Wan
---
arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi | 1 +
board/sifive/unmatched/Kconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi
b/arch/riscv/dts/hifive-unmatch
Add defconfig and board support for HiFive Unmatched.
Signed-off-by: Green Wan
Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
---
arch/riscv/Kconfig | 4 +
board/sifive/unleashed/Kconfig | 1 +
board/sifive/unmatched/Kconfig | 50 +++
board/sifive/unmatched/MAINTAINE
On 16/05/2021 23:05, Heinrich Schuchardt wrote:
> Am 16. Mai 2021 17:41:44 MESZ schrieb Alper Nebi Yasak
> :
>> This patch lets sandbox-cros-ec emulate a limited pwm device which has
>> multiple channels but can only set a duty cycle for each, as the actual
>> EC doesn't expose any functionality o
This patch adds a limited pulse-width modulator to sandbox's Chrome OS
Embedded Controller emulation. The emulated PWM device supports multiple
channels but can only set a duty cycle for each, as the actual EC
doesn't expose any functionality or information other than that. Though
the EC supports s
On Sun, 16 May 2021 at 09:42, Alper Nebi Yasak wrote:
>
> This patch lets sandbox-cros-ec emulate a limited pwm device which has
> multiple channels but can only set a duty cycle for each, as the actual
> EC doesn't expose any functionality or information other than that.
> Mapping non-generic EC_
On Tue, 20 Apr 2021 at 12:20, John Keeping wrote:
>
> The "-E" option to mkimage generates a FIT with external data using the
> data-size and data-offset properties which must both be ignored when
> verifying a signature.
>
> Add "data-offset" to the list of excluded properties for signature
> ver
Hi Patrick,
On Wed, 19 May 2021 at 06:30, Patrick Delaunay
wrote:
>
> Allow pin name parameter for pimux staus command,
> as gpio command to get status of one pin.
>
> The possible usage of the command is:
>
> > pinmux dev pinctrl
> > pinmux status
>
> > pinmux status -a
>
> > pinmux status
>
>
On Wed, 19 May 2021 at 06:30, Patrick Delaunay
wrote:
>
> From: Patrick Delaunay
>
> Update the result of do_status and always returns a CMD_RET_ value
> (-ENOSYS was a possible result of show_pinmux).
>
> This patch also adds pincontrol name in error messages (dev->name)
> and treats correctly t
On Wed, 19 May 2021 at 08:06, John Keeping wrote:
>
> It's possible that LOAD_FIT_FULL will have different values for TPL and
> SPL, in which case just checking CONFIG_SPL_LOAD_FIT_FULL causes this to
> be compiled in to the TPL even though functions and struct members it
> depends on are not.
>
>
On Tue, 18 May 2021 at 07:40, Patrick Delaunay
wrote:
>
> Add a test of dev_read_resource with translation or without translation
>
> Signed-off-by: Patrick Delaunay
> ---
>
> test/dm/test-fdt.c | 33 +
> 1 file changed, 33 insertions(+)
Reviewed-by: Simon Glass
On Sat, 15 May 2021 at 12:14, Sean Anderson wrote:
>
> Some callers (e.g. cmd/fs.c) of fs_set_blk_dev may use a NULL dev_part_str.
> While blk_get_device_part_str handles this fine,
> part_get_info_by_dev_and_name does not. This fixes commands crashing when
> implicitly using bootdevice.
>
> The u
Hi Alpher,
On Wed, 19 May 2021 at 09:30, Alper Nebi Yasak wrote:
>
> This patch adds a limited pulse-width modulator to sandbox's Chrome OS
> Embedded Controller emulation. The emulated PWM device supports multiple
> channels but can only set a duty cycle for each, as the actual EC
> doesn't expo
Hi Cédric,
On Tue, 18 May 2021 at 03:02, Cédric Le Goater wrote:
>
> On 5/18/21 9:09 AM, Joel Stanley wrote:
> > The HACE supports MD5, SHA1 and SHA2 family hash functions. This driver
> > uses it in a polling mode to perform hash calculations over buffers
> > placed in DRAM.
> >
> > It registers
On Tue, 18 May 2021 at 03:19, Rasmus Villemoes
wrote:
>
> [Linux commit 6bab69c65013bed5fce9f101a64a84d0385b3946]
>
> BUILD_BUG_ON() is a little annoying, since it cannot be used outside
> function scope. So one cannot put assertions about the sizeof() a
> struct next to the struct definition, bu
On Tue, 18 May 2021 at 03:20, Rasmus Villemoes
wrote:
>
> The layout and contents of struct global_data depends on a lot of
> CONFIG_* preprocessor macros, not all of which are entirely converted
> to Kconfig - not to mention weird games played here and there. This
> can result in one translation
Hi Heinrich,
On Sat, 15 May 2021 at 11:29, Heinrich Schuchardt wrote:
>
> os_find_text_base() assumes that first line of /proc/self/maps holds
> information about the text. Hence we must call the function before calling
> os_malloc() which calls mmap(0x1000,).
>
> Failure to do so has led to
On 5/17/21 8:23 PM, AKASHI Takahiro wrote:
On Mon, May 17, 2021 at 05:29:44PM -0500, Alex G. wrote:
On 5/12/21 12:14 PM, Tom Rini wrote:
On Wed, May 12, 2021 at 11:19:52AM -0500, Alex G. wrote:
On 5/12/21 10:52 AM, Simon Glass wrote:
[snip]
We have a NO_SDL build-time control. Perhaps
On Wed, May 19, 2021 at 03:27:48PM +0200, Pali Rohár wrote:
> On Tuesday 18 May 2021 21:26:40 Tom Rini wrote:
> > This board has not been converted to CONFIG_DM_USB by the deadline.
> > Remove it.
>
> I'm very disappointed that you want to remove Nokia N900 from U-Boot.
>
> I was waiting waiting
Each _device_ belonging to a given uclass of course has its own ->ops,
of a type determined by and known to the uclass.
However, no instance of a uclass_driver seems to populate ->ops, and
the only reference to it in code is this relocation.
Moreover, it's not really clear what could sensibly be
On 19/05/2021 18:34, Simon Glass wrote:
> Hi Alpher,
>
> On Wed, 19 May 2021 at 09:30, Alper Nebi Yasak
> wrote:
>>
>> This patch adds a limited pulse-width modulator to sandbox's Chrome OS
>> Embedded Controller emulation. The emulated PWM device supports multiple
>> channels but can only set a
This patch adds a limited pulse-width modulator to sandbox's Chromium OS
Embedded Controller emulation. The emulated PWM device supports multiple
channels but can only set a duty cycle for each, as the actual EC
doesn't expose any functionality or information other than that. Though
the EC supports
Hi Alexandru,
On Mon, 17 May 2021 at 10:38, Alexandru Gagniuc wrote:
>
> From: Simon Glass
>
> We already have a host Kconfig for SHA1. Use CONFIG_IS_ENABLED(SHA1)
> directly in the code shared with the host build, so we can drop the
> unnecessary indirection.
>
> Signed-off-by: Simon Glass
> R
On Wed, 19 May 2021 at 10:08, Rasmus Villemoes
wrote:
>
> Each _device_ belonging to a given uclass of course has its own ->ops,
> of a type determined by and known to the uclass.
>
> However, no instance of a uclass_driver seems to populate ->ops, and
> the only reference to it in code is this re
Hi Alex,
On Mon, 17 May 2021 at 12:39, Alexandru Gagniuc wrote:
>
> Define a UCLASS API for verifying ECDSA signatures. Unlike
> UCLASS_MOD_EXP, which focuses strictly on modular exponentiation,
> the ECDSA class focuses on verification. This is done so that it
> better aligns with mach-specific
On Mon, 17 May 2021 at 12:39, Alexandru Gagniuc wrote:
>
> Implement the crypto_algo .verify() function for ecdsa256. Because
> it backends on UCLASS_ECDSA, this change is focused on parsing the
> keys from devicetree and passing this information to the specific
> UCLASS driver.
>
> Signed-off-by:
On Mon, 17 May 2021 at 13:47, Alex G. wrote:
>
>
>
> On 5/17/21 11:38 AM, Alexandru Gagniuc wrote:
> > image-sig.c is used to map a hash or crypto algorithm name to a
> > handler of that algorithm. There is some similarity between the host
> > and target variants, with the differences worked out b
On 5/19/21 11:36 AM, Simon Glass wrote:
Hi Alexandru,
On Mon, 17 May 2021 at 10:38, Alexandru Gagniuc wrote:
From: Simon Glass
We already have a host Kconfig for SHA1. Use CONFIG_IS_ENABLED(SHA1)
directly in the code shared with the host build, so we can drop the
unnecessary indirection.
On Tue 2021-05-18 21:26:40, Tom Rini wrote:
> This board has not been converted to CONFIG_DM_USB by the deadline.
> Remove it.
Given that the board is in a active use and that Pali is actively
working on it... That does not seem like good idea or sensible thing
to do.
Best regards,
Hi,
I tried to summarize the discussions in the previous TF-A tech forum regarding
the proposal to adopt Hand-off Blocks (HOBs) for passing information along the
boot chain. I am certain I could not capture all suggestions/concerns brought
up during the call. I apologize if I missed and/or misi
From: Elaine Zhang
Add dts binding header for rk3568, files origin from kernel.
Signed-off-by: Elaine Zhang
---
include/dt-bindings/clock/rk3568-cru.h | 925 +
1 file changed, 925 insertions(+)
create mode 100644 include/dt-bindings/clock/rk3568-cru.h
diff --git a/inc
From: Elaine Zhang
Add basic clock for rk3568 which including cpu, bus, mmc,
i2c, pwm, gmac ...clocks init.
Elaine Zhang (2):
rockchip: rk3568: add device tree file
rockchip: rk3568: add clock driver
.../include/asm/arch-rockchip/cru_rk3568.h| 504 +++
drivers/clk/rockchip/Makefile
From: Elaine Zhang
Add rk3568 clock driver and cru structure definition.
Signed-off-by: Elaine Zhang
---
.../include/asm/arch-rockchip/cru_rk3568.h| 504 +++
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk_rk3568.c | 2908 +
3 f
Hi,
We wanted a watchdog during the U-Boot process so I added
hw_watchdog_init() and hw_watchdog_reset() functions to U-Boot for my
board. The watchdog timer works fine in U-Boot but now when Linux reboots
it gets stuck on:
[ 180.339543] reboot: Restarting system
When the watchdog is not activ
This patchset enables ethernet on Allwinner V3/Sochip S3 SoCs.
It is tested with an LicheePi Zero Dock board in combination
with different switches and one direct link.
Test scenario: Download mainline kernel and device-tree
over tftp and start kernel with nfs rootfs.
Without [PATCH 6/6], i wasn'
licheepi-zero dock is the second gen licheepi-zero board
and brings addtional periperals like
mic, speaker, ethernet, MIPI Camera Interface, 4 push buttons,
second TF Card slot for Wifi or SD.
As the device tree is synchronized in a previous commit, just add it to
Makefile, create a new MAINTAINER
align CLK_SPI0 and CLK_USB_PHY0 with tabs
Signed-off-by: Andreas Rehn
---
drivers/clk/sunxi/clk_v3s.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 55fc597043..9c2717bfab 100644
--- a/drivers/clk/sunxi/clk_
Add emac clock and reset register/bits.
Signed-off-by: Andreas Rehn
---
drivers/clk/sunxi/clk_v3s.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 29622199fd..55fc597043 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/driv
Driver uses pinmux instead of emac type.
Add v3s pinmux to support SoC.
Signed-off-by: Andreas Rehn
---
drivers/net/sun8i_emac.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 5a1b38bf80..0e7ad3b0d4 100644
--- a/drivers/net/sun8i_
h3 and v3s have internal phys and can share the same driver.
Furthermore sun8i-v3s-emac is not available, use sun8i-h3-emac instead
- add emac pins
- enable emac for licheepi-zero-dock as it provides a ethernet port
Signed-off-by: Andreas Rehn
---
arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts |
v3s emac soft reset tooks quit longer if autonegation is active
on 100 Mbit full duplex pairs what can result in
`sun8i_emac_eth_start: Timeout` error
wait_for_bit_le32 polls register value each ms.
Increasing the timeout for setup do not effect current behavior
but reduces unexpected behaviors (e
On Wed, May 19, 2021 at 09:06:53PM +0200, Pavel Machek wrote:
> On Tue 2021-05-18 21:26:40, Tom Rini wrote:
> > This board has not been converted to CONFIG_DM_USB by the deadline.
> > Remove it.
>
> Given that the board is in a active use and that Pali is actively
> working on it... That does not
On Wed, May 19, 2021 at 04:53:33PM +0200, Michal Simek wrote:
> Hi Tom,
>
> please pull these changes. There is one critical Versal patch which was
> checked by Stefan and Heinrich.
> There are also DT fixes for mini configurations and DT syncup patches
> with the Linux kernel.
> Also I have adde
On Wed, 19 May 2021 21:42:03 +0200
Andreas Rehn wrote:
Hi Andreas,
> licheepi-zero dock is the second gen licheepi-zero board
> and brings addtional periperals like
> mic, speaker, ethernet, MIPI Camera Interface, 4 push buttons,
> second TF Card slot for Wifi or SD.
>
> As the device tree is s
On Wed, 19 May 2021 21:42:04 +0200
Andreas Rehn wrote:
> Add emac clock and reset register/bits.
>
> Signed-off-by: Andreas Rehn
Compared against the manual and the Linux driver.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/clk/sunxi/clk_v3s.c | 6 ++
> 1 file changed, 6
On Wed, 19 May 2021 21:42:05 +0200
Andreas Rehn wrote:
Hi,
> align CLK_SPI0 and CLK_USB_PHY0 with tabs
>
> Signed-off-by: Andreas Rehn
> ---
> drivers/clk/sunxi/clk_v3s.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/su
On Wed, 19 May 2021 21:42:06 +0200
Andreas Rehn wrote:
Hi,
> Driver uses pinmux instead of emac type.
> Add v3s pinmux to support SoC.
So if I understand this correctly, then the v3s does NOT expose the MAC
pins (MII/RMII/RGMII) on its package (only the V3 does this)?
Instead there are internal
On Wed, 19 May 2021 21:42:07 +0200
Andreas Rehn wrote:
Hi,
> h3 and v3s have internal phys and can share the same driver.
> Furthermore sun8i-v3s-emac is not available, use sun8i-h3-emac instead
> - add emac pins
> - enable emac for licheepi-zero-dock as it provides a ethernet port
So first, th
On Wed, 19 May 2021 21:42:08 +0200
Andreas Rehn wrote:
Hi,
> v3s emac soft reset tooks quit longer if autonegation is active
> on 100 Mbit full duplex pairs what can result in
> `sun8i_emac_eth_start: Timeout` error
Mmmh, why the 500ms? Can you figure out how long it typically
takes for you? By
Hi Alex,
On Wed, 19 May 2021 at 11:44, Alex G wrote:
>
>
>
> On 5/19/21 11:36 AM, Simon Glass wrote:
> > Hi Alexandru,
> >
> > On Mon, 17 May 2021 at 10:38, Alexandru Gagniuc
> > wrote:
> >>
> >> From: Simon Glass
> >>
> >> We already have a host Kconfig for SHA1. Use CONFIG_IS_ENABLED(SHA1)
>
hey andre,
thx for the fast response!
I thought this would be the right choice since she did the initial work a
long time ago. also, she maintains the lichee-zero (without dock) already.
sorry, this is my first patchset to u-boot and I'm not aware of the process.
greetings
Andreas
Am Mi., 19.
Both didn't align with the rest of the list on my side.
this patch is not important for the functionality so
we can drop this if this only apppears on my machine.
greetings
Andreas
Am Mi., 19. Mai 2021 um 23:43 Uhr schrieb Andre Przywara <
andre.przyw...@arm.com>:
> On Wed, 19 May 2021 21:42:05
hey,
sure. I give it a try tomorrow.
with 250 ms, for example, I ran into timeouts after the first tftp download.
after a manual retry, it works fine but retry is not a valid production
behavior.
greetings
Andreas
Am Mi., 19. Mai 2021 um 23:45 Uhr schrieb Andre Przywara <
andre.przyw...@arm.com>
Hi Michal,
On Wed, 19 May 2021 at 01:16, Michal Simek wrote:
>
> Hi Simon,
>
> On 5/8/21 12:37 AM, Simon Glass wrote:
> > U-Boot provides a verified-boot feature based around FIT, but there is
> > no standard way of implementing it for a board. At present the various
> > required pieces must be b
On 5/18/21 8:59 PM, Madhukar Pappireddy via TF-A wrote:
Hi,
I tried to summarize the discussions in the previous TF-A tech forum regarding
the proposal to adopt Hand-off Blocks (HOBs) for passing information along the
boot chain. I am certain I could not capture all suggestions/concerns brough
On Thu, 20 May 2021 00:10:47 +0200
Andreas Rehn wrote:
Hi,
> sure. I give it a try tomorrow.
> with 250 ms, for example, I ran into timeouts after the first tftp download.
> after a manual retry, it works fine but retry is not a valid production
> behavior.
Well, I see occasional TFTP hiccups a
Dear Andy,
On 5/12/21 7:09 AM, Jaehoon Chung wrote:
> Dear Andy
>
> On 5/11/21 4:39 PM, andy...@sony.com wrote:
>> Hi Jaehoon
>>
>>> If you're ok, I will test after reverted the patch on tomorrow, and I will
>>> share
>>> result.
>>> Or I will try to reproduce timeout issue on 410c board.
>>
>>
On Thu, 20 May 2021 00:10:47 +0200
Andreas Rehn wrote:
> hey,
>
> sure. I give it a try tomorrow.
> with 250 ms, for example, I ran into timeouts after the first tftp download.
> after a manual retry, it works fine but retry is not a valid production
> behavior.
Just read the arch timer after t
1 - 100 of 112 matches
Mail list logo
