On Tue, Jul 13, 2021 at 08:49:21PM -0600, Simon Glass wrote:
> Hi Ilias,
>
> On Tue, 13 Jul 2021 at 14:11, Ilias Apalodimas
> wrote:
> >
> >
> > [...]
> > > > > Should be a uclass interface.
> > > > >
> > > >
> > > > Why? A uclass is supposed to describe and abstract hardware. This is
> > > >
Use %pD to log device-path instead of using efi_dp_str() and
efi_free_pool() locally in find_boot_device().
This is a cleanup patch, no feature update nor fix.
Suggested-by: Heinrich Schuchardt
Signed-off-by: Masami Hiramatsu
---
lib/efi_loader/efi_capsule.c |6 +-
1 file changed, 1
Enable DM SATA, removed IDE driver, and add SATA MV driver.
Signed-off-by: Tony Dinh
---
include/configs/sheevaplug.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 41ba799659..e28f98458e 100644
---
- In DM Ethernet, the old "egiga0" name is no longer valid, so replace it
with Ethernet PHY name from device tree. Also, Ethernet PHY address
is available so read it from device tree.
Signed-off-by: Tony Dinh
---
board/Marvell/sheevaplug/sheevaplug.c | 54 +--
1 file
Add DM_ETH, SATA_MV and associated configs to sheevaplug_defconfig
Signed-off-by: Tony Dinh
---
configs/sheevaplug_defconfig | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 676c47af27..4c7259e6d7 100644
- Add DM_ETH, SATA_MV and associated configs to sheevaplug_defconfig
- Remove IDE, and add SATA configs in board file sheevaplug.h
- Replace old device name "egiga0" with Ethernet PHY name from device
tree.
- Replace the old Ethernet PHY addr lookup with a device tree parsing
lookup function.
On 7/13/21 2:25 PM, Mark Rutland wrote:
On Tue, Jul 13, 2021 at 02:15:08PM +0500, Ahsan Hussain wrote:
Hello,
I'm dumbfounded by a seemingly unrelated early kernel hang/failing to boot
when CONFIG_RANDOMIZE_BASE=n is set in kernel and we use FIT uImage. I've
verified this behavior on a
On Tue, Jul 13, 2021 at 02:15:08PM +0500, Ahsan Hussain wrote:
> Hello,
>
> I'm dumbfounded by a seemingly unrelated early kernel hang/failing to boot
> when CONFIG_RANDOMIZE_BASE=n is set in kernel and we use FIT uImage. I've
> verified this behavior on a couple of i.MX8 SoCs (i.MX8M plus and
Hello,
I'm dumbfounded by a seemingly unrelated early kernel hang/failing to
boot when CONFIG_RANDOMIZE_BASE=n is set in kernel and we use FIT
uImage. I've verified this behavior on a couple of i.MX8 SoCs (i.MX8M
plus and i.MX8QXP) and the results remain consistent.
I'm able to boot kernel
Hi Ilias,
On Tue, 13 Jul 2021 at 14:11, Ilias Apalodimas
wrote:
>
>
> [...]
> > > > Should be a uclass interface.
> > > >
> > >
> > > Why? A uclass is supposed to describe and abstract hardware. This is just
> > > a specific implementation of a TPM, not all TPMs are TIS compliant. We
> > >
Hi Heinrich, Akashi-san,
Thank you for your comment.
I will keep current implementation.
Thanks,
Masahisa Kojima
On Wed, 14 Jul 2021 at 08:54, AKASHI Takahiro
wrote:
>
> On Tue, Jul 13, 2021 at 04:24:52PM +0200, Heinrich Schuchardt wrote:
> >
> >
> > On 13.07.21 10:31, Masahisa Kojima wrote:
>
On Tue, Jul 13, 2021 at 04:24:52PM +0200, Heinrich Schuchardt wrote:
>
>
> On 13.07.21 10:31, Masahisa Kojima wrote:
> > Hi Heinrich,
> >
> > > > > TCG spec also requires to measure "Calling EFI Application from
> > > > > Boot Option" for each boot attempt, and "Returning from EFI
> > > > >
Hi Heinrich,
2021年7月13日(火) 2:40 Heinrich Schuchardt :
>
> On 7/12/21 11:05 AM, Masami Hiramatsu wrote:
> > Fix find_boot_device() to set bootdev_root if it finds the
> > bootdev from BootNext. Currently it sets the bootdev_root only
> > when it finds bootdev from BootOrder.
> >
> > Fixes:
On Tue, Jul 13, 2021 at 10:35:03PM +0200, Marek Vasut wrote:
> On 7/13/21 8:11 PM, Tom Rini wrote:
> > On Tue, Jul 13, 2021 at 07:50:49PM +0200, Marek Vasut wrote:
> > > On 7/13/21 6:47 PM, Simon Glass wrote:
> > > > Hi Marek,
> > > >
> > > > On Tue, 13 Jul 2021 at 08:53, Marek Vasut wrote:
> >
On 7/13/21 1:11 PM, Tom Rini wrote:
On Tue, Jul 13, 2021 at 07:50:49PM +0200, Marek Vasut wrote:
On 7/13/21 6:47 PM, Simon Glass wrote:
Hi Marek,
On Tue, 13 Jul 2021 at 08:53, Marek Vasut wrote:
On 7/13/21 4:41 PM, Tom Rini wrote:
On Tue, Jul 13, 2021 at 04:35:38PM +0200, Marek Vasut
The macro should be passed a state, which should be passed
to the actual function. Otherwise using that macro would
yield a build error.
Signed-off-by: Patrick Wildt
---
include/mux.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/mux.h b/include/mux.h
index
On 7/13/21 3:35 PM, Marek Vasut wrote:
On 7/13/21 8:11 PM, Tom Rini wrote:
On Tue, Jul 13, 2021 at 07:50:49PM +0200, Marek Vasut wrote:
On 7/13/21 6:47 PM, Simon Glass wrote:
Hi Marek,
On Tue, 13 Jul 2021 at 08:53, Marek Vasut wrote:
On 7/13/21 4:41 PM, Tom Rini wrote:
On Tue, Jul 13,
On 7/13/21 8:11 PM, Tom Rini wrote:
On Tue, Jul 13, 2021 at 07:50:49PM +0200, Marek Vasut wrote:
On 7/13/21 6:47 PM, Simon Glass wrote:
Hi Marek,
On Tue, 13 Jul 2021 at 08:53, Marek Vasut wrote:
On 7/13/21 4:41 PM, Tom Rini wrote:
On Tue, Jul 13, 2021 at 04:35:38PM +0200, Marek Vasut
Hey all,
So, the DM_USB migration deadline issue has been addressed by the series
here:
https://patchwork.ozlabs.org/project/uboot/list/?series=252793=*
which splits out host and gadget support from the CONFIG_USB symbol
itself. The migration deadline was for host support, and as noted, N900
is
Hi Paweł,
On Tue, 13 Jul 2021 at 12:59, Paweł Jarosz wrote:
>
> Add clock driver for rk3066 platform.
>
> Signed-off-by: Paweł Jarosz
> Acked-by: Philipp Tomsich
> ---
>
> Changes since v1:
> - updated to shifted masks
> - moved clk init to tpl
>
> Changes since v2:
> - none
>
> Changes since
Hi Tim,
On Mon, 12 Jul 2021 at 14:58, Tim Harvey wrote:
>
> On Mon, Jul 12, 2021 at 12:44 PM Simon Glass wrote:
> >
> > Hi Tim,
> >
> > On Mon, 12 Jul 2021 at 10:42, Tim Harvey wrote:
> > >
> > > On Sat, Jul 10, 2021 at 5:23 AM Heiko Schocher wrote:
> > > >
> > > > Hello Tim,
> > > >
> > > >
Hi Ilias,
On Mon, 12 Jul 2021 at 23:51, Ilias Apalodimas
wrote:
>
> Hi Simon,
> > > >
>
> [...]
>
> > > > Yes, but I hope you see my point, that you have added a new interface.
> > > > It is definitely better than adding a new driver and duplicating all
> > > > the code, but it is still one more
Hi Daniel,
On Mon, 12 Jul 2021 at 19:17, Daniel Schwierzeck
wrote:
>
> Hi Simon,
>
> Am Samstag, den 10.07.2021, 18:00 -0600 schrieb Simon Glass:
> > () Hi Daniel,
> >
> > On Tue, 6 Jul 2021 at 08:22, Daniel Schwierzeck
> > wrote:
> > > As almost all peripherals are connected via PCI dependent
[...]
> > > Should be a uclass interface.
> > >
> >
> > Why? A uclass is supposed to describe and abstract hardware. This is just
> > a specific implementation of a TPM, not all TPMs are TIS compliant. We
> > already
> > have a uclass for those.
>
> Who told you that a uclass is supposed to
On Mon, Jul 12, 2021 at 11:50:24AM +0530, Kishon V;ijay Abraham I wrote:
> Move j721e document from board/ti/j721e/README to
> doc/board/ti/j721e_evm.rst after converting it to RST format.
>
> Signed-off-by: Kishon Vijay Abraham I
[snip]
> diff --git a/doc/board/ti/j721e_evm.rst
On Tue, Jul 13, 2021 at 07:30:02AM +0200, Heinrich Schuchardt wrote:
> Dear Tom,
>
> The following changes since commit 490101a5e5df65238b900b21b81361bc4b13da2e:
>
> Merge branch 'master' of
> https://source.denx.de/u-boot/custodians/u-boot-sunxi (2021-07-09
> 21:08:52 -0400)
>
> are
Add rockchip rk3066 sdram driver
Signed-off-by: Paweł Jarosz
Acked-by: Simon Glass
Acked-by: Philipp Tomsich
---
Changes since v1:
- use common rockchip_sdram_size
- moved sdram init from sdram_init.c
Changes since v2:
- none
Changes since v3:
- none
Changes since v4:
- updated to current
Add driver supporting pin multiplexing on rk3066 platform.
Signed-off-by: Paweł Jarosz
---
Changes since v1:
- updated to shifted masks
- added nand support
Changes since v2:
- none
Changes since v3:
- none
Changes since v4:
- updated driver to pinctrl full
Changes since v5:
- none
Add clock driver for rk3066 platform.
Signed-off-by: Paweł Jarosz
Acked-by: Philipp Tomsich
---
Changes since v1:
- updated to shifted masks
- moved clk init to tpl
Changes since v2:
- none
Changes since v3:
- none
Changes since v4:
- updated to current codebase
- fixed compilation errors
grf is needed by various drivers for rk3066 soc.
Signed-off-by: Paweł Jarosz
Acked-by: Philipp Tomsich
---
Changes since v1:
- updated to shifted masks
Changes since v2:
- none
Changes since v3:
- none
Changes since v4:
- removed gpio iomux related constants
Changes since v5:
- removed
This patch serie adds basic support for Rockchip RK3066 processor.
For now it's clock, pinctrl and sdram driver.
Paweł Jarosz (4):
rockchip: rk3066: add grf header file
rockchip: rk3066: add clock driver for rk3066 soc
rockchip: rk3066: add rk3066 pinctrl driver
rockchip: rk3066: add
On Tue, Jul 13, 2021 at 07:50:49PM +0200, Marek Vasut wrote:
> On 7/13/21 6:47 PM, Simon Glass wrote:
> > Hi Marek,
> >
> > On Tue, 13 Jul 2021 at 08:53, Marek Vasut wrote:
> > >
> > > On 7/13/21 4:41 PM, Tom Rini wrote:
> > > > On Tue, Jul 13, 2021 at 04:35:38PM +0200, Marek Vasut wrote:
> > >
On 7/13/21 6:47 PM, Simon Glass wrote:
Hi Marek,
On Tue, 13 Jul 2021 at 08:53, Marek Vasut wrote:
On 7/13/21 4:41 PM, Tom Rini wrote:
On Tue, Jul 13, 2021 at 04:35:38PM +0200, Marek Vasut wrote:
On 7/13/21 3:47 PM, Tom Rini wrote:
On Mon, Jul 12, 2021 at 11:01:24AM -0500, Alex G. wrote:
On Mon, Jul 12, 2021 at 11:01:24AM -0500, Alex G. wrote:
> On 7/12/21 10:15 AM, Tom Rini wrote:
> > On Mon, Jul 12, 2021 at 01:36:14PM +0800, Bin Meng wrote:
> > > On Mon, Jul 12, 2021 at 1:21 PM Reuben Dowle wrote:
> > > >
> > > > I submitted an almost identical patch. See
> > > >
Hi Heinrich,
On Mon, 12 Jul 2021 at 16:47, Heinrich Schuchardt wrote:
>
> Am 12. Juli 2021 21:43:53 MESZ schrieb Simon Glass :
> >Hi Heinrich,
> >
> >On Mon, 12 Jul 2021 at 13:19, Heinrich Schuchardt
> >wrote:
> >>
> >> On 7/12/21 8:22 PM, Ilias Apalodimas wrote:
> >> > Hi Simon,
> >> > On Sat,
Hi Marek,
On Tue, 13 Jul 2021 at 08:53, Marek Vasut wrote:
>
> On 7/13/21 4:41 PM, Tom Rini wrote:
> > On Tue, Jul 13, 2021 at 04:35:38PM +0200, Marek Vasut wrote:
> >> On 7/13/21 3:47 PM, Tom Rini wrote:
> >>> On Mon, Jul 12, 2021 at 11:01:24AM -0500, Alex G. wrote:
> On 7/12/21 10:15 AM,
Hi,
On Fri, Jul 09, 2021 at 10:11:53AM -0400, Tom Rini wrote:
> These USB defines do not change the build as there is no USB support
> enabled currently.
>
> Cc: Ian Ray
> Cc: Sebastian Reichel
> Signed-off-by: Tom Rini
> ---
Reviewed-by: Sebastian Reichel
-- Sebastian
> Changes in v2:
>
Hi Ming,
On Mon, May 31, 2021 at 10:05 AM wrote:
>
> From: Ming Liu
>
> The return value '-ENOSPC' of fit_set_timestamp function does not match
> the caller fit_image_write_sig's expection which is '-FDT_ERR_NOSPACE'.
>
> Fix it by not calling fit_set_timestamp, but call fdt_setprop instead.
>
reset and poweroff are called via hooks in psci driver which is going
around sysreset framework that's why enable sysreset drivers and do reset
and poweroff via this framework. Using this flow will allow us to call
SYSTEM_WARM_RESET based on psci 1.1 spec which can be calles with reset -w
command.
The SPL can also be compiled with sysreset drivers just fine, so
update the condition to cater for that option.
The same change was done by commit efa1a62ad2dd ("ARM: imx8m: Do not define
do_reset() if sysreset is enabled").
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 2 ++
CONFIG_SYSRESET_CMD_POWEROFF defines do_poweroff() in sysreset-uclass.c
that's why don't define it twice when both CONFIG_SYSRESET_CMD_POWEROFF and
CONFIG_CMD_POWEROFF are enabled. CONFIG_SYSRESET_CMD_POWEROFF depends on
CONFIG_CMD_POWEROFF.
Signed-off-by: Michal Simek
---
Hi,
it is time to do reset/poweroff via sysreset framework to align it with
psci 1.1 spec.
Thanks,
Michal
Michal Simek (3):
psci: Do not define do_poweroff() if CONFIG_SYSRESET_CMD_POWEROFF is
enabled
arm64: zynqmp: Do not define do_reset() if sysreset is enabled
arm64: zynqmp:
On Fri, Jul 09, 2021 at 07:13:04AM +, Feng Libo wrote:
> Uboot implements the simple file protocol of ext4 file system, already.
> However, the driver is embedded in Uboot. Is it possible to build a
> standalone ext4 file system driver for UEFI, in the format of efi, just like
> the
On 7/13/21 4:41 PM, Tom Rini wrote:
On Tue, Jul 13, 2021 at 04:35:38PM +0200, Marek Vasut wrote:
On 7/13/21 3:47 PM, Tom Rini wrote:
On Mon, Jul 12, 2021 at 11:01:24AM -0500, Alex G. wrote:
On 7/12/21 10:15 AM, Tom Rini wrote:
On Mon, Jul 12, 2021 at 01:36:14PM +0800, Bin Meng wrote:
On
On Tue, Jul 13, 2021 at 04:35:38PM +0200, Marek Vasut wrote:
> On 7/13/21 3:47 PM, Tom Rini wrote:
> > On Mon, Jul 12, 2021 at 11:01:24AM -0500, Alex G. wrote:
> > > On 7/12/21 10:15 AM, Tom Rini wrote:
> > > > On Mon, Jul 12, 2021 at 01:36:14PM +0800, Bin Meng wrote:
> > > > > On Mon, Jul 12,
On 7/13/21 3:47 PM, Tom Rini wrote:
On Mon, Jul 12, 2021 at 11:01:24AM -0500, Alex G. wrote:
On 7/12/21 10:15 AM, Tom Rini wrote:
On Mon, Jul 12, 2021 at 01:36:14PM +0800, Bin Meng wrote:
On Mon, Jul 12, 2021 at 1:21 PM Reuben Dowle wrote:
I submitted an almost identical patch. See
On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
> On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
> > On 13/07/21, Michal Simek wrote:
> > >
> > >
> > > On 7/13/21 11:25 AM, Jorge Ramirez-Ortiz, Foundries wrote:
> > > > On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
> > > >> On
On 13.07.21 10:31, Masahisa Kojima wrote:
Hi Heinrich,
TCG spec also requires to measure "Calling EFI Application from
Boot Option" for each boot attempt, and "Returning from EFI
Application from Boot Option" if a boot device returns control
back to the Boot Manager.
I would like to hear
Swap out the TI-centric "envboot" logic for the generic distro_bootcmd
logic for the bootcmd we run before trying to do something more complex
involving additional firmware, etc.
Cc: Lokesh Vutla
Signed-off-by: Tom Rini
---
Changes in v2:
- Only change to distroboot for a53 and not r5.
---
On Tue, Jul 13, 2021 at 02:33:15PM +0530, Lokesh Vutla wrote:
>
>
> On 02/07/21 1:34 am, Tom Rini wrote:
> > Swap out the TI-centric "envboot" logic for the generic distro_bootcmd
> > logic for the bootcmd we run before trying to do something more complex
> > involving additional firmware, etc.
On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
> On 13/07/21, Michal Simek wrote:
> >
> >
> > On 7/13/21 11:25 AM, Jorge Ramirez-Ortiz, Foundries wrote:
> > > On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
> > >> On 13/07/21, Michal Simek wrote:
> > >>> Hi,
> > >>>
> > >>> On 7/12/21
On Mon, Jul 12, 2021 at 11:01:24AM -0500, Alex G. wrote:
> On 7/12/21 10:15 AM, Tom Rini wrote:
> > On Mon, Jul 12, 2021 at 01:36:14PM +0800, Bin Meng wrote:
> > > On Mon, Jul 12, 2021 at 1:21 PM Reuben Dowle wrote:
> > > >
> > > > I submitted an almost identical patch. See
> > > >
On 13.07.21 11:14, Frieder Schrempf wrote:
From: Frieder Schrempf
The driver depends on DM_SPI and if it's not available (e. g. in SPL),
then we should not try to build it as this will fail.
Signed-off-by: Frieder Schrempf
Looks good, but you could also add a "depends on DM_SPI" to the
>-Original Message-
>From: Vutla, Lokesh
>Sent: Tuesday, July 13, 2021 1:57 AM
>To: Tammana, Gowtham ; Tom Rini ;
>jh80.ch...@samsung.com
>Cc: Bajjuri, Praneeth ; u-boot@lists.denx.de
>Subject: Re: [PATCH v2 0/5] arm: dts: Add PMIC node for J7200
>
>
>
>On 24/06/21 2:44 am, Gowtham
This commit fixes a corner case when length < first_read. which would
cause the last argument of xemaclite_alignedread to be a very large
unsigned integer.
Signed-off-by: Tianrui Wei
---
drivers/net/xilinx_emaclite.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 13.07.21 13:53, Marek Vasut wrote:
On 7/13/21 1:22 PM, Patrick Wildt wrote:
Am Tue, Jul 13, 2021 at 12:46:04PM +0200 schrieb Stefano Babic:
On 13.07.21 12:39, Marek Vasut wrote:
On 7/13/21 7:53 AM, Stefano Babic wrote:
Hi Fabio,
On 12.07.21 23:31, Fabio Estevam wrote:
Hi Patrick,
On
On 7/13/21 1:22 PM, Patrick Wildt wrote:
Am Tue, Jul 13, 2021 at 12:46:04PM +0200 schrieb Stefano Babic:
On 13.07.21 12:39, Marek Vasut wrote:
On 7/13/21 7:53 AM, Stefano Babic wrote:
Hi Fabio,
On 12.07.21 23:31, Fabio Estevam wrote:
Hi Patrick,
On Mon, Jul 12, 2021 at 11:27 AM Patrick
On 13/07/21, Michal Simek wrote:
>
>
> On 7/13/21 11:25 AM, Jorge Ramirez-Ortiz, Foundries wrote:
> > On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
> >> On 13/07/21, Michal Simek wrote:
> >>> Hi,
> >>>
> >>> On 7/12/21 7:40 PM, Jorge Ramirez-Ortiz, Foundries wrote:
> hi Michal,
>
Am Tue, Jul 13, 2021 at 12:46:04PM +0200 schrieb Stefano Babic:
> On 13.07.21 12:39, Marek Vasut wrote:
> > On 7/13/21 7:53 AM, Stefano Babic wrote:
> > > Hi Fabio,
> > >
> > > On 12.07.21 23:31, Fabio Estevam wrote:
> > > > Hi Patrick,
> > > >
> > > > On Mon, Jul 12, 2021 at 11:27 AM Patrick
On 13.07.21 12:39, Marek Vasut wrote:
On 7/13/21 7:53 AM, Stefano Babic wrote:
Hi Fabio,
On 12.07.21 23:31, Fabio Estevam wrote:
Hi Patrick,
On Mon, Jul 12, 2021 at 11:27 AM Patrick Wildt
wrote:
Am Sun, Feb 21, 2021 at 08:26:21AM -0800 schrieb Ye Li:
Add the USB PHY driver for i.MX8MQ
On 7/13/21 7:53 AM, Stefano Babic wrote:
Hi Fabio,
On 12.07.21 23:31, Fabio Estevam wrote:
Hi Patrick,
On Mon, Jul 12, 2021 at 11:27 AM Patrick Wildt wrote:
Am Sun, Feb 21, 2021 at 08:26:21AM -0800 schrieb Ye Li:
Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller.
On 7/13/21 11:25 AM, Frieder Schrempf wrote:
On 15.06.21 02:41, Marek Vasut wrote:
On 6/15/21 2:28 AM, Peng Fan (OSS) wrote:
On 2021/6/7 20:38, Marek Vasut wrote:
On 6/7/21 2:05 PM, Frieder Schrempf wrote:
From: Frieder Schrempf
Some IPs have their accessible address space restricted by
On 7/13/21 11:25 AM, Jorge Ramirez-Ortiz, Foundries wrote:
> On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
>> On 13/07/21, Michal Simek wrote:
>>> Hi,
>>>
>>> On 7/12/21 7:40 PM, Jorge Ramirez-Ortiz, Foundries wrote:
hi Michal,
Would you have some sample/reference code to
On 15.06.21 02:41, Marek Vasut wrote:
> On 6/15/21 2:28 AM, Peng Fan (OSS) wrote:
>>
>>
>> On 2021/6/7 20:38, Marek Vasut wrote:
>>> On 6/7/21 2:05 PM, Frieder Schrempf wrote:
From: Frieder Schrempf
Some IPs have their accessible address space restricted by the
interconnect.
On 13/07/21, Jorge Ramirez-Ortiz, Foundries wrote:
> On 13/07/21, Michal Simek wrote:
> > Hi,
> >
> > On 7/12/21 7:40 PM, Jorge Ramirez-Ortiz, Foundries wrote:
> > > hi Michal,
> > >
> > > Would you have some sample/reference code to generate a SPL boot image
> > > using zynqmpbif instead of
From: Frieder Schrempf
The Kontron SoM-Line i.MX8MM (N801x) by Kontron Electronics GmbH is a SoM
module with an i.MX8M-Mini SoC, 1/2/4 GB LPDDR4 RAM, SPI NOR, eMMC and PMIC.
The matching evaluation boards (Board-Line) have 2 Ethernets, USB 2.0,
HDMI/LVDS,
SD card, CAN, RS485 and much more.
From: Frieder Schrempf
This adds support for i.MX6UL/ULL-based evaluation kits with SoMs by
Kontron Electronics GmbH.
Currently there are the following SoM flavors (SoM-Line):
* N6310: SOM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
* N6311: SOM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND
*
From: Frieder Schrempf
Add the clocks for the ECSPI controllers. This is ported from
Linux v5.13-rc4.
Signed-off-by: Frieder Schrempf
---
drivers/clk/imx/clk-imx8mm.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c
From: Frieder Schrempf
The driver depends on DM_SPI and if it's not available (e. g. in SPL),
then we should not try to build it as this will fail.
Signed-off-by: Frieder Schrempf
---
drivers/spi/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/Makefile
From: Frieder Schrempf
The MX25V8035F is a 8Mb SPI NOR flash and the MX25R1635F is very
similar, but has twice the size (16Mb) and supports a wider supply
voltage range.
They were tested on the Kontron Electronics i.MX6UL and i.MX8MM SoMs.
Signed-off-by: Frieder Schrempf
---
On 02/07/21 1:34 am, Tom Rini wrote:
> Swap out the TI-centric "envboot" logic for the generic distro_bootcmd
> logic for the bootcmd we run before trying to do something more complex
> involving additional firmware, etc.
>
> Cc: Lokesh Vutla
> Signed-off-by: Tom Rini
This is causing build
AST2600 leverages the FIT hash/signature verification to fulfill
secure boot trust chain. To improve the performance and save SW
code size for those crypto operations, the two HW crypto engine,
HACE and ARCY, are enabled.
However, both of the engines can only access to data stored in
DRAM space.
Move CONFIG_EXTRA_ENV_SETTINGS to board-specific
configuration headers.
Signed-off-by: Chia-Wei Wang
---
include/configs/aspeed-common.h | 9 -
include/configs/evb_ast2500.h | 6 ++
include/configs/evb_ast2600.h | 6 ++
3 files changed, 12 insertions(+), 9 deletions(-)
diff
Probe ARCY driver in SPL board init if enabled.
Signed-off-by: Chia-Wei Wang
---
arch/arm/mach-aspeed/ast2600/spl.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-aspeed/ast2600/spl.c
b/arch/arm/mach-aspeed/ast2600/spl.c
index a0fc420ff1..2172bb4ae7 100644
---
Currently the FIT verification calls directly into
SW implemented functions to get a CRC/SHA/MD5 hash.
This patch removes duplcated algorithm lookup and use
hash_lookup_algo to get the hashing function with HW
accelearation supported if configured.
The MD5 direct call remains as it is not
Enable SPL FIT image load and verification support.
The HW accelerated SHA is also available with the
newly added support of the HACE HW hash engine.
Signed-off-by: Chia-Wei Wang
---
configs/evb-ast2600_defconfig | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
Add ARCY DTS node and enable it for AST2600 EVB.
Signed-off-by: Chia-Wei Wang
---
arch/arm/dts/ast2600-evb.dts | 5 +
arch/arm/dts/ast2600.dtsi| 9 +
2 files changed, 14 insertions(+)
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index
Return CONFIG_SYS_LOAD_ADDR pointing to DRAM space for
spl_get_load_buffer() to allow generic SPL image loading
code (e.g. FIT and Ymodem) to store data in DRAM.
Signed-off-by: Chia-Wei Wang
---
arch/arm/mach-aspeed/ast2600/spl.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
Probe HACE driver in SPL board init if enabled.
Signed-off-by: Chia-Wei Wang
---
arch/arm/mach-aspeed/ast2600/spl.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/mach-aspeed/ast2600/spl.c
b/arch/arm/mach-aspeed/ast2600/spl.c
index 0d8cb29678..a0fc420ff1 100644
ARCY is deisnged to accerlerate ECC/RSA digital signature
generation and verification.
Signed-off-by: Chia-Wei Wang
---
drivers/crypto/aspeed/Kconfig | 10 ++
drivers/crypto/aspeed/Makefile | 1 +
drivers/crypto/aspeed/aspeed_arcy.c | 182
Add RSACLK enable for ARCY, the HW RSA/ECC crypto engine
of ASPEED AST26xx SoCs.
Signed-off-by: Chia-Wei Wang
---
arch/arm/include/asm/arch-aspeed/scu_ast2600.h | 1 +
drivers/clk/aspeed/clk_ast2600.c | 15 +++
2 files changed, 16 insertions(+)
diff --git
Add YCLK enable for HACE, the HW hash engine of
ASPEED AST2600 SoCs.
Signed-off-by: Chia-Wei Wang
---
.../arm/include/asm/arch-aspeed/scu_ast2600.h | 5 +++--
drivers/clk/aspeed/clk_ast2600.c | 20 +++
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git
Hash and Crypto Engine (HACE) is designed to accelerate the
throughput of hash data digest, and symmetric-key encryption.
Signed-off-by: Chia-Wei Wang
---
drivers/crypto/Kconfig | 2 +
drivers/crypto/Makefile | 1 +
drivers/crypto/aspeed/Kconfig | 12 ++
Add HACE DTS node and enable it for AST2600 EVB.
Signed-off-by: Chia-Wei Wang
---
arch/arm/dts/ast2600-evb.dts | 5 +
arch/arm/dts/ast2600.dtsi| 8
2 files changed, 13 insertions(+)
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index
The AST2600 SRAM has been extended to 88KB since A1
chip revision. This patch updates the SRAM size to
offer more space for early stack/heap use.
Signed-off-by: Chia-Wei Wang
---
arch/arm/include/asm/arch-aspeed/platform.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This patch series intends to provide a secure boot chain from SPL to Linux
kernel
based on the hash and signature verification of FIT image paradigm.
To improve the performance and save code size (SPL is limited to 64KB due to
HW-RoT),
the drviers of two HW crypto engine HACE and ARCY are also
Hi Heinrich,
> > > TCG spec also requires to measure "Calling EFI Application from
> > > Boot Option" for each boot attempt, and "Returning from EFI
> > > Application from Boot Option" if a boot device returns control
> > > back to the Boot Manager.
I would like to hear your opinion regarding
On 13/07/21, Michal Simek wrote:
> Hi,
>
> On 7/12/21 7:40 PM, Jorge Ramirez-Ortiz, Foundries wrote:
> > hi Michal,
> >
> > Would you have some sample/reference code to generate a SPL boot image
> > using zynqmpbif instead of zynqmpimage? I cant find any documentation
> > and I see no option to
On 26/06/21 4:51 pm, Adam Ford wrote:
> There are five omap3 based boards from LogicPD. Two of them
> have added LTO support. Add the remaining three to use LTO.
>
> Signed-off-by: Adam Ford
There are many merge conflicts with this patch. Can you rebase on top of latest
master and repost?
On 24/06/21 2:44 am, Gowtham Tammana wrote:
> The J7200 EVM has PMIC LP876441 for supporting CPU AVS. This patchset
> adds dt nodes, compatible string, and configs to enable the
> corresponding driver.
>
> v2:
> - rebased the changes are reordered patches 3/4
There are minor conflicts with
phy-names was improperly implemented resulting in an inoperable USB-OTG
port.
- phy-names = "usb2-phy0\0\0usb2-phy1\0";
+ phy-names = "usb2-phy0\0usb2-phy1";
Signed-off-by: Artem Lapkin
---
board/amlogic/vim3/vim3.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On 13/07/21 1:44 am, Paul Barker wrote:
> The function board_is_bone_lt() returns true for the BeagleBone Green,
> the BeagleBone Enhanced and the BeagleBone Black. Therefore when
> selecting which devicetree to use we must ensure that the more specific
> functions board_is_bbg1() and
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