+Simon
On Wed, Jul 28, 2021 at 11:22 PM Matwey V. Kornilov
wrote:
>
> Hello,
>
> I am trying to build master for qemu-x86_64_defconfig. When I try to
> boot u-boot.rom as the following everything works fine:
>
> > qemu-system-x86_64 -nographic -bios u-boot.rom
>
> U-Boot SPL
On Mon, 26 Jul 2021 18:22:48 -0500, Suman Anna wrote:
> The PADCONFIG_202 register (0x02621328) is affected by the locking
> of the RSTMUX8 register (0x02620328), and so cannot be configured
> in kernel. This has been confirmed as a hardware bug and affects
> all K2G SoCs.
>
> Setup the pinmux
On Mon, 26 Jul 2021 11:22:13 -0500, Suman Anna wrote:
> The default U-Boot environment variables and design are all set up to
> have the MCU R5FSS cluster to be in Split-mode. This is the setting
> in v2021.01 U-Boot and the dt nodes are synched with the kernel binding
> property names in commit
On Mon, 26 Jul 2021 16:13:06 -0500, Suman Anna wrote:
> The following series cleans up the code related to booting of Main
> R5FSS0 Core0 from R5 SPL, and moves it to A72 U-Boot on J721E SoCs.
> This is no longer supported after the R5 SPL re-architecture that
> splits the System Firmware
On Mon, 26 Jul 2021 20:58:01 +0530, Aswath Govindraju wrote:
> The following series of patches add support for,
> - HS200/HS400 speed modes
> - eMMC boot mode
> - gpt and FDT library overlay
>
> This series of patches,
> - dependent on
>
On Wed, 21 Jul 2021 21:28:29 +0530, Kishon Vijay Abraham I wrote:
> Patch series adds Sierra and Torrent SERDES driver for the SERDES
> used in TI's K3 platforms. This SERDES is used by USB3, PCIe and
> Ethernet. This series is mostly an adaptation of drivers added in
> upstream Linux kernel.
>
>
On Mon, 5 Apr 2021 20:14:28 +0530, Aswath Govindraju wrote:
> Enable HS400 speed mode by writing to HOST_CONTROL2 register.
Applied to https://source.denx.de/u-boot/custodians/u-boot-ti.git for-rc,
thanks!
[1/1] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
On Mon, 26 Jul 2021 20:28:39 +0530, Aswath Govindraju wrote:
> CONFIG_SPL_TEXT_BASE was set to 0x7000 in the commit,
> "26f32c32b250 configs: am64x_evm_*_defconfig: Rearrange the components in
> SRAM to satisfy the limitations for USB DFU boot mode". This change seems
> to have been dropped
On Thu, 3 Jun 2021 14:34:22 +0530, Aswath Govindraju wrote:
> The following series of patches add support for,
> - HS200/HS400 speed modes
> - eMMC boot mode
> - gpt and FDT library overlay
>
> This series of patches,
> - dependent on
>
On Tue, 25 May 2021 15:08:22 +0530, Aswath Govindraju wrote:
> The following series of patches add support for HS400 speed mode on J7200
> SoC.
>
> For HS400 support to work, the following series of patches depend on,
>
On Wed, Jul 28, 2021 at 09:04:33PM +0300, Artem Panfilov wrote:
> Fix LibreSSL compilation for versions before v2.7.0.
Why 2.7.0? I had to disable CONFIG_FIT_SIGNATURE to get the qemu
targets to build on OpenBSD-current (3.4.0) as there is no
BN_bn2binpad(). 2.7.0 is also over three years old
If the 'keyfile' (-G) argument is used, there is little value to require
'keydir' (-k) argument since the public key can also be extracted from the
private key itself.
Signed-off-by: Donald Chan
---
lib/rsa/rsa-sign.c | 28 +---
1 file changed, 21 insertions(+), 7
On Wed, 28 Jul 2021 at 04:29, Bin Meng wrote:
>
> Since commit 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection")
> SPI flash on Intel Crown Bay board does not work anymore.
>
> Disable CONFIG_SPI_FLASH_SMART_HWCAPS until a proper fix is made to
> the spi-nor core.
>
> Signed-off-by: Bin
Hi,
On Wed, 28 Jul 2021 at 17:55, Tom Rini wrote:
>
> On Thu, Jul 29, 2021 at 01:45:49AM +0200, Heinrich Schuchardt wrote:
> >
> >
> > On 7/27/21 12:07 AM, Tom Rini wrote:
> > > On Fri, Jul 02, 2021 at 12:36:18PM -0600, Simon Glass wrote:
> > >
> > > > This feature should never have been made
On Tue, 27 Jul 2021 at 22:00, Bin Meng wrote:
>
> If for some reason, TSC timer frequency cannot be determined from
> hardware, nor is it specified in the device tree, U-Boot will panic
> resulting in endless reset during boot.
>
> Let's define a default TSC timer frequency using the Kconfig
On Wed, 28 Jul 2021 at 04:29, Bin Meng wrote:
>
> Since commit 43c145b8b3ee ("spi: ich: Correct max-size bug in
> ich_spi_adjust_size()")
> (in v2020.04-rc1), SPI flash read no longer works with ICH SPI controller
> in software sequencer mode.
>
> ICH controller can only transfer a small number
Hi Tom,
On Wed, 28 Jul 2021 at 17:28, Simon Glass wrote:
>
> Hi again,
>
> On Mon, 26 Jul 2021 at 08:06, Simon Glass wrote:
> >
> > Hi Tom,
> >
> > On Sun, 25 Jul 2021 at 15:10, Tom Rini wrote:
> > >
> > > So, I'm trying to fix the problem on am335x_evm (and some family
> > > configs) with
At present if we see 'ranges' property (with no value) we assume it is a
boolean, as per the devicetree spec.
But another node may define 'ranges' with a value, forcing us to widen it
to an int array. At present this is not supported and causes an error.
Fix this and add some test cases.
An int array can hold a single int so we should not need to do anything
in the widening operation. However due to a quirk in the code, an int[3]
widened with an int produced an int[4]. Fix this and add a test.
Fix a comment typo while we are here.
Signed-off-by: Simon Glass
Reported-by: Tom
The current name is confusing because the logic is actually backwards from
what you might expect. Rename it to needs_widening() and update the
comments.
Signed-off-by: Simon Glass
---
tools/dtoc/fdt.py | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git
An empty ranges property confuses dtoc at present and it dies with an
error. This series fixes this and a few related things.
Simon Glass (3):
dtoc: Rename is_wider_than() to reduce confusion
dtoc: Fix widening an int array to an int
dtoc: Support widening a bool value
On Mon, Jul 19, 2021 at 01:07:02PM +0200, Guillaume La Roque wrote:
> On MediaTek boards we cannot override the SYS_BOARD / SYS_CONFIG_NAME
> variables from defconfig.
> This is because in board/mediatek/mt/Kconfig this value was override
> by default due to the if CONFIG_TARGET_MT
On Thu, Jul 29, 2021 at 02:12:19AM +0200, Heinrich Schuchardt wrote:
>
>
> On 7/2/21 8:36 PM, Simon Glass wrote:
> > Add a new Kconfig option for EBBR so that the naming is more explicit.
> > Make it select EFI_LOADER which is required for EBBR to work.
> >
> > Copy over the same 'default'
On Wed, Jul 28, 2021 at 10:21:56PM +0200, Heinrich Schuchardt wrote:
>
>
> On 7/27/21 11:10 AM, AKASHI Takahiro wrote:
> > This new configuration, which was derived from sandbox_defconfig, will be
> > used solely to run efi capsule authentication test as the test requires
> > a public key (esl
On 7/2/21 10:38 PM, Simon Glass wrote:
Hi Tom,
On Fri, 2 Jul 2021 at 14:11, Tom Rini wrote:
On Fri, Jul 02, 2021 at 12:36:20PM -0600, Simon Glass wrote:
Avoid enabling the options (EBBR / EFI_LOADER) by default, to save space.
Resync the CONFIG options also.
Signed-off-by: Simon Glass
If the 'keyfile' (-G) argument is used, there is little value to require
'keydir' (-k) argument since the public key can also be extracted from the
private key itself.
Signed-off-by: Donald Chan
---
lib/rsa/rsa-sign.c | 28 +---
1 file changed, 21 insertions(+), 7
On 7/2/21 8:36 PM, Simon Glass wrote:
Add a new Kconfig option for EBBR so that the naming is more explicit.
Make it select EFI_LOADER which is required for EBBR to work.
Copy over the same 'default' setting so that there is no change in
which boards enable it.
Signed-off-by: Simon Glass
On Thu, Jul 29, 2021 at 01:45:49AM +0200, Heinrich Schuchardt wrote:
>
>
> On 7/27/21 12:07 AM, Tom Rini wrote:
> > On Fri, Jul 02, 2021 at 12:36:18PM -0600, Simon Glass wrote:
> >
> > > This feature should never have been made available when driver model
> > > or devicetree are disabled. Add
On 7/27/21 12:07 AM, Tom Rini wrote:
On Fri, Jul 02, 2021 at 12:36:18PM -0600, Simon Glass wrote:
This feature should never have been made available when driver model
or devicetree are disabled. Add these as conditions, so that we don't
create even more barriers to migration.
Add a note
On Thu, Jul 29, 2021 at 02:37:10AM +0300, Artem Panfilov wrote:
>
> On 29.07.2021 01:56, Tom Rini wrote:
> > Part of the question is then, were you enabling the SSL-related parts
> > before this change? Or did the way the code is now being
> > enabled/disabled trigger this now being enabled when
On 29.07.2021 01:56, Tom Rini wrote:
> Part of the question is then, were you enabling the SSL-related parts
> before this change? Or did the way the code is now being
> enabled/disabled trigger this now being enabled when it wasn't before?
>
This commit broke the build:
Hi again,
On Mon, 26 Jul 2021 at 08:06, Simon Glass wrote:
>
> Hi Tom,
>
> On Sun, 25 Jul 2021 at 15:10, Tom Rini wrote:
> >
> > So, I'm trying to fix the problem on am335x_evm (and some family
> > configs) with needing SPL_OF_CONTROL enabled. This is mostly fine just
> > enabling the option,
On 7/2/21 8:36 PM, Simon Glass wrote:
This file does not correctly handle the various cases, sometimes
producing warnings about partition_basic_data_guid being defined but not
used. Fix it.
There was some discussion about adjusting Kconfig or making
HAVE_BLOCK_DEVICE a prerequisite for
On 28.07.2021 23:07, Tom Rini wrote:
> There is a fine line at least that I'm willing to walk in terms of
> supporting ancient OSes directly and also not making things overly
> complicated in our own tree. That said, openssl tends to be one of the
> ones where it does get hard to support old
Fix LibreSSL compilation for versions before v2.7.0.
Fix following compilation issue when CONFIG_TOOLS_LIBCRYPTO is enabled:
tools/lib/ecdsa/ecdsa-libcrypto.o: In function `prepare_ctx':
ecdsa-libcrypto.c:(.text+0x94): undefined reference to
`OPENSSL_init_ssl'
ecdsa-libcrypto.c:(.text+0x148):
Fix LibreSSL compilation for versions before v2.7.0.
Fix following compilation issue when CONFIG_TOOLS_LIBCRYPTO is enabled:
tools/lib/ecdsa/ecdsa-libcrypto.o: In function `prepare_ctx':
ecdsa-libcrypto.c:(.text+0x94): undefined reference to
`OPENSSL_init_ssl'
ecdsa-libcrypto.c:(.text+0x148):
Hi,
When I did, mender complained about it :
include/config_mender.h:41:3: error: #error CONFIG_SYS_REDUNDAND_ENVIRONMENT is
required for Mender to work. Make sure that: 1) All the instructions at https:
41 | # error CONFIG_SYS_REDUNDAND_ENVIRONMENT is required for Mender to work.
Make sure
Hi Tom,
/etc/fw_env.config has this contents:
/boot/u-boot/uboot.env 0x 0x4000
/boot/u-boot/uboot-redund.env 0x 0x4000
Thank you,
PA
On Jul 28 2021, at 4:39 pm, Tom Rini wrote:
> On Tue, Jul 27, 2021 at 04:44:20PM +0200, Pierre-Alexis Ciavaldini wrote:
> > Hi,
> >
> > I'm trying to
On Fri, Jul 02, 2021 at 12:36:16PM -0600, Simon Glass wrote:
> It is bad practice to put function declarations behind an #ifdef since
> it makes it impossible to use IS_ENABLED() in the C code. The main reason
> for doing this is when an empty static inline function is desired when
> the feature
On Fri, Jul 02, 2021 at 12:36:17PM -0600, Simon Glass wrote:
> Rather than looking at two KConfig options in the Makefile, create a new
> Kconfig option for compiling lib/charset.c
>
> Enable it for UFS also, which needs this support.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Heinrich
On Fri, Jul 02, 2021 at 12:36:15PM -0600, Simon Glass wrote:
> Since the ACPI-generation code makes use of UUIDs we typically need to
> enabled UUID support for it to build. Add a new Kconfig condition.
>
> Use it for BTRFS also.
>
> Signed-off-by: Simon Glass
Applied to u-boot/master,
On Fri, Jul 02, 2021 at 12:36:14PM -0600, Simon Glass wrote:
> This file does not correctly handle the various cases, sometimes
> producing warnings about partition_basic_data_guid being defined but not
> used. Fix it.
>
> There was some discussion about adjusting Kconfig or making
>
On Fri, Jul 02, 2021 at 12:36:13PM -0600, Simon Glass wrote:
> At present when using 'make mrproper' on an out-of-tree build, a warning
> is shown about include/asm being a directory. With old versions of U-Boot
> it is a file, but more recently it has become a directory.
>
> Remove this
On Sat, Jul 10, 2021 at 09:14:21PM -0600, Simon Glass wrote:
> Hyphens are missing in various places where the intent is to create an
> adjective. Fix it.
>
> Signed-off-by: Simon Glass
For the series, applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
On Thu, Jul 29, 2021 at 01:29:35AM +0300, Artem Panfilov wrote:
>
> On 28.07.2021 23:07, Tom Rini wrote:
> > There is a fine line at least that I'm willing to walk in terms of
> > supporting ancient OSes directly and also not making things overly
> > complicated in our own tree. That said,
On 21.07.21 08:08, Jan Kiszka wrote:
> On 21.07.21 01:34, Marek Vasut wrote:
>> On 7/20/21 11:08 AM, Jan Kiszka wrote:
>> [...]
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index f60ee3a7e6..23b99a541c 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
On 7/27/21 11:10 AM, AKASHI Takahiro wrote:
This new configuration, which was derived from sandbox_defconfig, will be
used solely to run efi capsule authentication test as the test requires
a public key (esl file) to be embedded in U-Boot binary.
Signed-off-by: AKASHI Takahiro
---
On Wed, Jul 28, 2021 at 08:17:37PM +, Chan, Donald wrote:
> If the 'keyfile' (-G) argument is used, there is little value to require
> 'keydir' (-k) argument since the public key can also be extracted from the
> private key itself.
>
> Signed-off-by: Donald Chan
> ---
> lib/rsa/rsa-sign.c
On Wed, Jul 28, 2021 at 03:00:44PM -0500, Alex G. wrote:
> Hi Artem,
>
> I'm re-adding the u-boot mailing list to the CC field, as I see your email
> contains no sensitive information.
>
> On 7/28/21 2:30 PM, Artem Panfilov wrote:
> > We have broken CI builds on your bare-metal CentOS 7 servers
Hi Artem,
I'm re-adding the u-boot mailing list to the CC field, as I see your
email contains no sensitive information.
On 7/28/21 2:30 PM, Artem Panfilov wrote:
We have broken CI builds on your bare-metal CentOS 7 servers with latest
master. I think it is good reason to have a support. Our
On Wed, Jul 28, 2021 at 04:09:48PM -0300, Fabio Estevam wrote:
> Hi Stefano,
>
> On Wed, Jul 28, 2021 at 3:58 PM Stefano Babic wrote:
>
> > Its status was erroneously set in patchwork - I'll pick it up.
>
> Thanks. Peter Robinson's series to convert warp is also missing in master:
>
On 7/28/21 1:10 PM, Artem Panfilov wrote:
Fix LibreSSL compilation for versions before v2.7.0.
Fix following compilation issue when CONFIG_TOOLS_LIBCRYPTO is enabled:
tools/lib/ecdsa/ecdsa-libcrypto.o: In function `prepare_ctx':
ecdsa-libcrypto.c:(.text+0x94): undefined reference to
Hi Stefano,
On Wed, Jul 28, 2021 at 3:58 PM Stefano Babic wrote:
> Its status was erroneously set in patchwork - I'll pick it up.
Thanks. Peter Robinson's series to convert warp is also missing in master:
https://www.mail-archive.com/u-boot@lists.denx.de/msg403736.html
Thanks
On 28.07.21 19:40, Fabio Estevam wrote:
Hi Tom,
On Wed, Jul 28, 2021 at 2:04 PM Tom Rini wrote:
Hey all,
I'm sending this email to people that are either listed as maintainers
for the following boards, or have shown interest in that general area
before. These boards are the only ones
Hi Tom,
On Wed, 28 Jul 2021 at 11:37, Tom Rini wrote:
>
> On Wed, Jul 28, 2021 at 09:33:56AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 28 Jul 2021 at 08:35, Tom Rini wrote:
> > >
> > > On Tue, Jul 27, 2021 at 10:20:49AM -0600, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On
On Sun, Jul 18, 2021 at 09:52:03AM -0700, Chan, Donald wrote:
> If the 'keyfile' (-G) argument is used, there is little value to require
> 'keydir' (-k) argument since the public key can also be extracted from the
> private key itself.
>
> Signed-off-by: Donald Chan
> ---
> lib/rsa/rsa-sign.c
On Wed, Jul 28, 2021 at 11:19:40PM +0530, Pratyush Yadav wrote:
> +Tom, Simon,
>
> On 28/07/21 08:50PM, Bin Meng wrote:
> > When slave drivers don't set the max_read_size, the spi-mem should
> > directly use data.nbytes and not limit to any size. But current
> > logic will limit to the
+Tom, Simon,
On 28/07/21 08:50PM, Bin Meng wrote:
> When slave drivers don't set the max_read_size, the spi-mem should
> directly use data.nbytes and not limit to any size. But current
> logic will limit to the max_write_size.
With the push towards using DM, do we really need to maintain the
On Wed, Jul 28, 2021 at 02:40:41PM -0300, Fabio Estevam wrote:
> Hi Tom,
>
> On Wed, Jul 28, 2021 at 2:04 PM Tom Rini wrote:
> >
> > Hey all,
> >
> > I'm sending this email to people that are either listed as maintainers
> > for the following boards, or have shown interest in that general area
>
On 28/07/21 11:56PM, Bin Meng wrote:
> When CONFIG_SPI_FLASH_SMART_HWCAPS is on, SPI_RX_SLOW flag of the
> SPI controller is not honored. This adds the missing logic there.
>
> With this patch, SPI flash read works again with ICH SPI controller
> on Intel Crown Bay board.
>
> Signed-off-by: Bin
Hi Tom,
On Wed, Jul 28, 2021 at 2:04 PM Tom Rini wrote:
>
> Hey all,
>
> I'm sending this email to people that are either listed as maintainers
> for the following boards, or have shown interest in that general area
> before. These boards are the only ones left in tree right now that do
> not
On Wed, Jul 28, 2021 at 09:33:56AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 28 Jul 2021 at 08:35, Tom Rini wrote:
> >
> > On Tue, Jul 27, 2021 at 10:20:49AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Sun, 11 Jul 2021 at 20:19, Simon Glass wrote:
> > > >
> > > > U-Boot
Hey all,
I'm sending this email to people that are either listed as maintainers
for the following boards, or have shown interest in that general area
before. These boards are the only ones left in tree right now that do
not have CONFIG_DM enabled:
flea3 aspenite zmx25 mx28evk
Hi,My SoC configuration is as below:Core: Arm A65 (v8)U-boot version:
2021-AprExecution and debug environment: Synopsys VDK simulator
My SoC has Synopsys SDHCI. To enable the same in u-boot, I've enabled the
following options in defconfig:CONFIG_MMC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
s
> > series attempts to drop most of the code that it no-longer needed now that
> > PCI has been converted to driver model.
>
> > It also drops the UCP1020 board since it has various unique build issues.
>
> What issues are we talking about?Please name it.
>
> Toda
e name it.
Today's u-boot clone builds and runs fine in our module without any
warnings except:
> git clone https://source.denx.de/u-boot/u-boot.git u-boot-20210728
> cd u-boot-20210728
> make UCP1020_defconfig
> CROSS_COMPILE=powerpc-linux- make 2>222
> cat 222
=
Hi Michael,
On Wed, 28 Jul 2021 at 09:54, Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> On Wed, Jul 28, 2021 at 5:34 PM Simon Glass wrote:
> >
> > Hi Tom,
> >
> > On Wed, 28 Jul 2021 at 08:35, Tom Rini wrote:
> > >
> > > On Tue, Jul 27, 2021 at 10:20:49AM -0600, Simon Glass wrote:
> > > > Hi
Hi Pratyush,
On Wed, Jul 28, 2021 at 6:44 PM Pratyush Yadav wrote:
>
> On 28/07/21 06:13PM, Bin Meng wrote:
> > Hi Pratyush,
> >
> > On Sat, Jun 26, 2021 at 3:20 AM Pratyush Yadav wrote:
> > >
> > > The spi-mem layer provides a spi_mem_supports_op() function to check
> > > whether a specific
When CONFIG_SPI_FLASH_SMART_HWCAPS is on, SPI_RX_SLOW flag of the
SPI controller is not honored. This adds the missing logic there.
With this patch, SPI flash read works again with ICH SPI controller
on Intel Crown Bay board.
Signed-off-by: Bin Meng
---
The quirky stuff of ICH SPI controller
Hi
On Wed, Jul 28, 2021 at 5:34 PM Simon Glass wrote:
>
> Hi Tom,
>
> On Wed, 28 Jul 2021 at 08:35, Tom Rini wrote:
> >
> > On Tue, Jul 27, 2021 at 10:20:49AM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Sun, 11 Jul 2021 at 20:19, Simon Glass wrote:
> > > >
> > > > U-Boot provides a
Hi Tom,
On Wed, 28 Jul 2021 at 08:35, Tom Rini wrote:
>
> On Tue, Jul 27, 2021 at 10:20:49AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Sun, 11 Jul 2021 at 20:19, Simon Glass wrote:
> > >
> > > U-Boot provides a verified-boot feature based around FIT, but there is
> > > no standard way of
On Wed, Jul 28, 2021 at 05:25:48PM +0200, Pierre-Alexis Ciavaldini wrote:
> Hi,
>
> When I did, mender complained about it :
> include/config_mender.h:41:3: error: #error CONFIG_SYS_REDUNDAND_ENVIRONMENT
> is required for Mender to work. Make sure that: 1) All the instructions at
> https:
> 41
On Wed, Jul 28, 2021 at 04:41:56PM +0200, Pierre-Alexis Ciavaldini wrote:
> Hi Tom,
>
> /etc/fw_env.config has this contents:
> /boot/u-boot/uboot.env 0x 0x4000
> /boot/u-boot/uboot-redund.env 0x 0x4000
And what if you turn off redundant environment support? Mender does
strongly
Hello,
I am trying to build master for qemu-x86_64_defconfig. When I try to
boot u-boot.rom as the following everything works fine:
> qemu-system-x86_64 -nographic -bios u-boot.rom
U-Boot SPL 2021.10-rc1-00027-g22ecb12132 (Jul 28 2021 - 18:18:37 +0300)
Trying to boot from SPI
Jumping to 64-bit
On 7/28/21 3:25 AM, Zong Li wrote:
On Wed, Jul 28, 2021 at 12:29 PM Sean Anderson wrote:
On 7/27/21 4:54 AM, Zong Li wrote:
Invokes the generic cache_enable interface to execute the relative
implementation in SiFive ccache driver.
Signed-off-by: Zong Li
---
arch/riscv/cpu/fu540/Kconfig
On Tue, Jul 27, 2021 at 04:44:20PM +0200, Pierre-Alexis Ciavaldini wrote:
> Hi,
>
> I'm trying to integrate u-boot in our project that is a custom scripted build
> without yocto, for use with mender.
> The complete discussion can be found here :
>
On Tue, Jul 27, 2021 at 10:20:49AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Sun, 11 Jul 2021 at 20:19, Simon Glass wrote:
> >
> > U-Boot provides a verified-boot feature based around FIT, but there is
> > no standard way of implementing it for a board. At present the various
> > required
On Fri, Jul 23, 2021 at 12:29:18PM +, Roland Gaudig wrote:
> From: Roland Gaudig
>
> Add simple_strtoll function for converting a string containing digits
> into a long long int value.
>
> Signed-off-by: Roland Gaudig
> Reviewed-by: Simon Glass
For the series, applied to u-boot/master
Hi,
I'm trying to integrate u-boot in our project that is a custom scripted build
without yocto, for use with mender.
The complete discussion can be found here :
https://hub.mender.io/t/pi3-usb-boot-support/595/54?u=peac
The problem is that when issuing saveenv in u-boot, it responds with
If fifo_depth is 0, the driver will lock up.
If fifo-size is not defined in device tree, the driver would use 0 as
a default value. This however will cause an infinite loop and a lockup
in any read or write. Use 1 as a default FIFO size instead, no FIFO
should be zero-length anyway.
When slave drivers don't set the max_read_size, the spi-mem should
directly use data.nbytes and not limit to any size. But current
logic will limit to the max_write_size.
This commit mirrors the same changes in the dm version done in
commit 535b1fdb8e5e ("spi: spi-mem: Fix read data size issue").
The main reason for this to be implemented is capsule update.
Two memories are supported and tested which is MMC FAT based and QSPI
based.
For creating capsule these commands are used:
./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin
./tools/mkeficapsule --raw u-boot.itb --index 2
This variable is pointing to offset is qspi where u-boot image is placed.
In our case it is location of u-boot.itb file. Offset is the same as is
used by Xilinx Zynq SoC.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_virt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
When U-Boot runs in EL2 there is no access to csu_base registers that's why
this has to be done via firmware interface to find out multi boot register
value. Till now this function is called only from SPL in EL3.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 7 +--
1 file
Change multi_boot() to return multiboot value and move print out of this
function and let this function to be used by other functions without
duplicating message.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff
Hi,
this series is just for composing dfu_alt_info string for capsule update to
work automatically based on current setup.
QSPI/MMC FAT bootmodes are handled and supported. Other bootmodes are
ignored for now.
Thanks,
Michal
Michal Simek (4):
xilinx: zynqmp: Change multi_boot() to return
When env_set() is called there is no need to allocate memory for variable
which is already saved that's why free it.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
On 28/07/21 06:13PM, Bin Meng wrote:
> Hi Pratyush,
>
> On Sat, Jun 26, 2021 at 3:20 AM Pratyush Yadav wrote:
> >
> > The spi-mem layer provides a spi_mem_supports_op() function to check
> > whether a specific operation is supported by the controller or not.
> > This is much more accurate than
On Wed, Jul 28, 2021 at 12:23 PM Sean Anderson wrote:
>
> On 7/27/21 4:54 AM, Zong Li wrote:
> > This driver is currently responsible for enabling all ccache ways.
>
> Can you expand on this a little? Perhaps describe the hardware a little. For
> example,
> you could describe what a way/bank is,
Since commit 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection")
SPI flash on Intel Crown Bay board does not work anymore.
Disable CONFIG_SPI_FLASH_SMART_HWCAPS until a proper fix is made to
the spi-nor core.
Signed-off-by: Bin Meng
---
configs/crownbay_defconfig | 1 +
1 file
Since commit 43c145b8b3ee ("spi: ich: Correct max-size bug in
ich_spi_adjust_size()")
(in v2020.04-rc1), SPI flash read no longer works with ICH SPI controller
in software sequencer mode.
ICH controller can only transfer a small number of bytes at once.
Before commit 43c145b8b3ee, the logic
Hi Pratyush,
On Sat, Jun 26, 2021 at 3:20 AM Pratyush Yadav wrote:
>
> The spi-mem layer provides a spi_mem_supports_op() function to check
> whether a specific operation is supported by the controller or not.
> This is much more accurate than the hwcaps selection logic based on
> SPI_{RX,TX}_
On Wed, Jul 28, 2021 at 5:03 PM Heinrich Schuchardt wrote:
>
nits: missing
From: Heinrich Schuchardt
> We should not use /dev/sda and /dev/sdb in our examples. Users might
> inadvertently mess up their workstation. Use /dev/sdX instead.
>
> Remove console output like '# ' and '> ' which makes
On 30.01.20 09:05, Roger Quadros wrote:
> NB0 is bridge to SRAM and NB1 is bridge to DDR.
>
> To ensure that SRAM transfers are not stalled due to
> delays during DDR refreshes, SRAM traffic should be higher
> priority (threadmap=2) than DDR traffic (threadmap=0).
>
> This patch does just that.
We should not use /dev/sda and /dev/sdb in our examples. Users might
inadvertently mess up their workstation. Use /dev/sdX instead.
Remove console output like '# ' and '> ' which makes copying hard.
Set example language to bash for correct syntax-highlighting.
Signed-off-by: Heinrich Schuchardt
LX2160A-RDB/QDS has micron mt35xu512aba flash which requires flag
CONFIG_SPI_FLASH_MT35XU on to probe flash successfully.
Signed-off-by: Kuldeep Singh
---
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160aqds_tfa_defconfig | 1 +
> -Original Message-
> From: Tom Rini
> Sent: 2021年7月27日 21:08
> To: Z.Q. Hou
> Cc: Michael Walle ; Heinrich Schuchardt
> ; u-boot@lists.denx.de; Priyanka Jain
>
> Subject: Re: [PATCH] configs: layerscape: Disable the EFI_LOADER feature
>
> On Tue, Jul 27, 2021 at 05:42:51AM +,
Hi,
I've tested this update on the DeveloperBox platform.
Tested-by: Masami Hiramatsu
Thank you,
2021年7月27日(火) 18:12 AKASHI Takahiro :
>
> With this enhancement, mkeficapsule will be able to sign a capsule
> file when it is created. A signature added will be used later
> in the verification
Hi Ashok
On 7/27/21 2:36 PM, Ashok Reddy Soma wrote:
> Currently xilinx sdhci driver is using zynqmp_mmio_write() to set
> tapdelay values. Use xilinx_pm_request() using appropriate arguments
> to set input/output tapdelays for zynqmp. Where tapdelay setting is
> done by firmware. Host driver
On Wed, Jul 28, 2021 at 12:29 PM Sean Anderson wrote:
>
> On 7/27/21 4:54 AM, Zong Li wrote:
> > Invokes the generic cache_enable interface to execute the relative
> > implementation in SiFive ccache driver.
> >
> > Signed-off-by: Zong Li
> > ---
> > arch/riscv/cpu/fu540/Kconfig |
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