On Wed, Aug 11, 2021 at 12:05:39PM +0900, Masahisa Kojima wrote:
> On Tue, 10 Aug 2021 at 11:19, AKASHI Takahiro
> wrote:
> >
> > On Fri, Aug 06, 2021 at 04:02:12PM +0900, Masahisa Kojima wrote:
> > > TCG PC Client PFP spec requires to measure "Boot"
> > > and "BootOrder" variables, EV_SEPARAT
On 10.08.21 08:53, Tony Dinh wrote:
Change maintainer to me. Suriyan no longer has this board and wishes
to see someone maintaining it actively.
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
board/Seagate/goflexhome/MAINTAINERS | 2 +-
1 file changed, 1 inserti
On 10.08.21 08:10, Tony Dinh wrote:
Change maintainer to me. Eric no longer has this board and wishes
to see someone maintaining it actively.
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
board/Seagate/dockstar/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+)
On 09.08.21 09:53, Pali Rohár wrote:
Returning fabricated CRS value (0x0001) by PCIe Root Complex to OS is
allowed only for 4-byte PCI_VENDOR_ID config read request and only when
CRSSVE bit in Root Port PCIe device is enabled. In all other error PCIe
Root Complex must return all-ones.
So imp
On 09.08.21 17:44, Pali Rohár wrote:
If ddr3_init() fails then DDR was not initialized and we cannot load and
execute U-Boot. We cannot continue, we cannot do anything in this case, so
hang.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/mach-mvebu/spl.c
On 30.07.21 05:02, Tony Dinh wrote:
In DM Ethernet, the old "egiga0" name is no longer valid,
so replace these with Ethernet PHY names from device tree. Also, read
Ethernet PHY address from device tree.
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
board/Seagate
On 30.07.21 05:02, Tony Dinh wrote:
Enable DM SATA in board file.
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
include/configs/goflexhome.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
in
On 30.07.21 05:02, Tony Dinh wrote:
Add DM_ETH, SATA_MV and associated configs to goflexhome_defconfig.
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
configs/goflexhome_defconfig | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/configs/go
On 11/08/2021 08.10, Stefan Roese wrote:
> Hi Rasmus,
>
> On 11.08.21 08:05, Rasmus Villemoes wrote:
>> Ping. Stefan, any chance you could pick up this series? Simon has nodded
>> to the v4 version of patch 7, so now they all have at least one R-b tag.
>
> Actually I'm waiting on a reply from you
Hi Rasmus,
On 11.08.21 08:05, Rasmus Villemoes wrote:
Ping. Stefan, any chance you could pick up this series? Simon has nodded
to the v4 version of patch 7, so now they all have at least one R-b tag.
Actually I'm waiting on a reply from you here. As I already tried to
integrate all patches in
Ping. Stefan, any chance you could pick up this series? Simon has nodded
to the v4 version of patch 7, so now they all have at least one R-b tag.
Rasmus
On 11/08/21 1:19 am, Dave Gerlach wrote:
> Add a note to the automatically generated clk-data and dev-data files
> for j721e and j7200 to indicate that they are in fact auto-generated and
> should not be hand edited.
>
> Signed-off-by: Dave Gerlach
Are there any guidelines/README to do this a
Hello Tom,
On 10.08.21 23:34, Tom Rini wrote:
> Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS in
> order to not further add to the CONFIG namespace.
>
> Cc: Heiko Schocher
> Signed-off-by: Tom Rini
> ---
> include/configs/aristainetos2.h | 6 +++---
> 1 file changed, 3 ins
Hi Fabio,
It might work. But why? I mean the imx8mm-evk has already switched to
binman on the mainline.
So we should do the same. If you can't get into U-boot prompt using binman
I can give you more detailed information.
Yours,
Paul
On Wed, 11 Aug 2021 at 07:13, Fabio Estevam wrote:
> Hi Pau
On Tue, 10 Aug 2021 at 11:19, AKASHI Takahiro
wrote:
>
> On Fri, Aug 06, 2021 at 04:02:12PM +0900, Masahisa Kojima wrote:
> > TCG PC Client PFP spec requires to measure "Boot"
> > and "BootOrder" variables, EV_SEPARATOR event prior
> > to the Ready to Boot invocation.
> > Since u-boot does not
Hi Akashi-san,
Thank you for your comment.
On Tue, 10 Aug 2021 at 10:44, AKASHI Takahiro
wrote:
>
> Kojima-san,
>
> On Fri, Aug 06, 2021 at 04:02:11PM +0900, Masahisa Kojima wrote:
> > TCG PC Client PFP spec requires to measure the secure
> > boot policy before validating the UEFI image.
> > Thi
Hi Paul,
On Tue, Aug 10, 2021 at 10:06 PM Paul Liu wrote:
>
> Hi Fabio,
>
> It might work. But why? I mean the imx8mm-evk has already switched to binman
> on the mainline.
> So we should do the same. If you can't get into U-boot prompt using binman I
> can give you more detailed information.
T
Hi Paul,
Thanks for your response.
On Thu, Jul 1, 2021 at 6:38 PM Paul Liu wrote:
>
> Hi Fabio,
>
> We have dfu_alt_info set. So that we can capsule update from UEFI.
> First, "setenv -e -nv -bs -rt -v OsIndications =0x04"
> And then we can "efidebug capsule update -v ${loadaddr}".
>
> To make t
Rework the default environment a bit to not use non-standard
CONFIG_ENV_... names and similar one-off CONFIG names.
Cc: Jaehoon Chung
Signed-off-by: Tom Rini
---
include/configs/exynos4-common.h| 2 +-
include/configs/s5pc210_universal.h | 26 +-
include/configs/tra
Rename CONFIG_ENV_KS2_BOARD_SETTINGS to ENV_KS2_BOARD_SETTINGS so that
it better fits with the rest of the environment addition macros.
Cc: Vitaly Andrianov
Signed-off-by: Tom Rini
---
include/configs/k2e_evm.h| 2 +-
include/configs/k2g_evm.h| 2 +-
include/configs/k2hk
Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS in
order to not further add to the CONFIG namespace.
Cc: Heiko Schocher
Signed-off-by: Tom Rini
---
include/configs/aristainetos2.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/arista
On Tue, Aug 10, 2021 at 10:53:02PM +0200, Marek Vasut wrote:
> On 8/10/21 10:47 PM, Tom Rini wrote:
> > On Tue, Aug 10, 2021 at 10:11:08PM +0200, Marek Vasut wrote:
> > > On 8/10/21 10:05 PM, Tom Rini wrote:
> > > > None of the CONFIG_HPS namespace options are changed via the board
> > > > config.h
On 8/10/21 10:47 PM, Tom Rini wrote:
On Tue, Aug 10, 2021 at 10:11:08PM +0200, Marek Vasut wrote:
On 8/10/21 10:05 PM, Tom Rini wrote:
None of the CONFIG_HPS namespace options are changed via the board
config.h file, nor does it make sense to move them to Kconfig. Rename
these options to the H
On Tue, Aug 10, 2021 at 10:11:08PM +0200, Marek Vasut wrote:
> On 8/10/21 10:05 PM, Tom Rini wrote:
> > None of the CONFIG_HPS namespace options are changed via the board
> > config.h file, nor does it make sense to move them to Kconfig. Rename
> > these options to the HPS namespace instead.
> >
Hi Sean,
On Mon, 9 Aug 2021 at 16:31, Sean Anderson wrote:
>
>
>
> On 8/7/21 6:23 PM, Simon Glass wrote:
> > Hi,
> >
> > U-Boot can be configured to build the source multiple times to product
multiple
> > 'phases'. The main phase is the full U-Boot, but an 'SPL' (Secondary
Program
> > Loader) bui
On Tue, Aug 10, 2021 at 10:11:08PM +0200, Marek Vasut wrote:
> On 8/10/21 10:05 PM, Tom Rini wrote:
> > None of the CONFIG_HPS namespace options are changed via the board
> > config.h file, nor does it make sense to move them to Kconfig. Rename
> > these options to the HPS namespace instead.
> >
Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS in
order to not further add to the CONFIG namespace.
Cc: Heiko Schocher
Signed-off-by: Tom Rini
---
include/configs/aristainetos2.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/arista
There are a number of DWC2 configuration options that are set in dwc2.h
and referenced in dwc2.c only. Move these out of the CONFIG_DWC2
namespace and in to the DWC2 namespace. Note that hikey was defining an
option that was already always enabled, so we can remove that hunk.
Cc: Marek Vasut
Si
On 8/10/21 10:05 PM, Tom Rini wrote:
None of the CONFIG_HPS namespace options are changed via the board
config.h file, nor does it make sense to move them to Kconfig. Rename
these options to the HPS namespace instead.
Cc: Marek Vasut
Cc: Simon Goldschmidt
Cc: Tien Fong Chee
Signed-off-by: To
Hi,
I have an U_Boot tailored for a specific board.
In this U_Boot we have a command: “*myperipheral*"
U_BOOT_CMD(
myperipheral, 6, 0, do_my_periph,
"my peripheral info",
/* */"info - important hw
info\n"
It appears that RPi firmware has already added framebuffer
node under /chosen, at least on RPi 2 versions. So check
for this and don't add duplicate node.
Signed-off-by: Ivan T. Ivanov
---
board/raspberrypi/rpi/rpi.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a
From: Suman Anna
The K3 SoCs have some PLL output clocks (POSTDIV clocks) which in
turn serve as inputs to other HSDIV output clocks. These clocks use
the actual value to compute the divider clock rate, and need to be
registered with the CLK_DIVIDER_ONE_BASED flags. The current k3-clk
driver and
From: Suman Anna
The TI K3 Fractional PLLs use two programmable POSTDIV1 and POSTDIV2
divisors to generate the final FOUTPOSTDIV clock. These are in sequence
with POSTDIV2 following the POSTDIV1 clock. The current J721E clock data
has the POSTDIV2 clock as the parent for the POSTDIV1 clock, which
From: Suman Anna
The TI K3 Fractional PLLs use two programmable POSTDIV1 and POSTDIV2
divisors to generate the final FOUTPOSTDIV clock. These are in sequence
with POSTDIV2 following the POSTDIV1 clock. The current J7200 clock data
has the POSTDIV2 clock as the parent for the POSTDIV1 clock, which
There are three different divider values in the DIV_CTRL register
controlled by the k3-pll driver. Currently the ti_pll_clk_set_rate
function writes the entire register when programming plld, even though
plld only resides in the lower 6 bits.
Change the plld programming to read-modify-write to onl
Hi,
This series contains several fixes for TI j721e and j7200 platforms data
and also some fixes for TI clock drivers that make use of this data.
All fixes are related to PLL post dividers reporting the wrong frequency,
and now the new frequencies for below clocks match what registers are
actually
Add a note to the automatically generated clk-data and dev-data files
for j721e and j7200 to indicate that they are in fact auto-generated and
should not be hand edited.
Signed-off-by: Dave Gerlach
---
arch/arm/mach-k3/j7200/clk-data.c | 2 ++
arch/arm/mach-k3/j7200/dev-data.c | 2 ++
arch/arm/m
On Tue, Aug 10, 2021 at 08:58:46AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Mon, 9 Aug 2021 at 13:11, Tom Rini wrote:
> >
> > On Sat, Aug 07, 2021 at 04:23:36PM -0600, Simon Glass wrote:
> > > Hi,
> > >
> > > U-Boot can be configured to build the source multiple times to product
> > > multiple
On iMX8MM with Fast Boot fuse blown, the SIT and A-copy image are
placed at different offset than on iMX8MM with Fast Boot fuse NOT
blown. List both options and both offsets to avoid confusion.
Signed-off-by: Marek Vasut
Cc: Marcel Ziswiler
Cc: Peng Fan
Cc: Stefano Babic
Cc: Ye Li
Cc: uboot-i
The PERSIST_SECONDARY_BOOT is in GPR10 address 0x30390098, adjust the
text which currently says it is in GPR0 while using the correct address
of GPR10.
Signed-off-by: Marek Vasut
Cc: Marcel Ziswiler
Cc: Peng Fan
Cc: Stefano Babic
Cc: Ye Li
Cc: uboot-imx
---
doc/imx/misc/psb.rst | 2 +-
1 fi
Simon. Sorry for the late reply.
Tested on Virtualbox and on real hardware (DFI GHF51).
Works for me.
On 7/11/21 5:15 AM, Simon Glass wrote:
> This is a revert of a recent logic change in setup_zimage(). We do
> actually need to install this information always. Change it to install
> from the Core
Hi Tom,
On Mon, 9 Aug 2021 at 13:11, Tom Rini wrote:
>
> On Sat, Aug 07, 2021 at 04:23:36PM -0600, Simon Glass wrote:
> > Hi,
> >
> > U-Boot can be configured to build the source multiple times to product
> > multiple
> > 'phases'. The main phase is the full U-Boot, but an 'SPL' (Secondary Progr
One of the "dma_addr_t" instances was left out when
converting to "caam_dma_addr_t".
Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on
ARM64")
Signed-off-by: Horia Geantă
---
drivers/crypto/fsl/jobdesc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
The first name is taken from command name that's why shouldn't be listed in
help. And commands shouldn't be listed with <> which means value but value
itself is command name.
Also add description for commands to make it clear what it does.
Before
pwm pwm
pwm
...
After:
pwm invert- in
From: T Karthik Reddy
Enable CONFIG_DISPLAY_CPUINFO to display SoC family & revision.
Signed-off-by: T Karthik Reddy
Reviewed-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
configs/xilinx_versal_virt_defconfig | 1 -
configs/xilinx_zynqmp_virt_defconfig | 1 -
2 files changed, 2 delet
From: T Karthik Reddy
Add print_cpuinfo() to print SoC info like family & revision.
This function depends on CONFIG_DISPLAY_CPUINFO config.
Signed-off-by: T Karthik Reddy
Reviewed-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
---
board/xilinx/common/board.c | 26 +
From: T Karthik Reddy
soc_xilinx_zynqmp driver allows identification of family & revision
of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP.
Add this config to xilinx_zynqmp_virt_defconfig file.
Probe this driver using platdata U_BOOT_DEVICE structure which is
specified in mach-z
From: T Karthik Reddy
soc_xilinx_versal driver allows identification of family & revision
of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL.
Probe this driver using platdata U_BOOT_DEVICE structure which is
defined at mach-versal/cpu.c.
Add this config to xilinx_versal_virt_defco
Hi,
This patch series adds support for SoC Xilinx driver to get SoC family
and revision. Print SoC info using print_cpuinfo() at booting stage.
Thanks,
Michal
T Karthik Reddy (4):
soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driver
soc: xilinx: versal: Add soc_xilinx_versal driver
xilinx: c
On Tue, Aug 10, 2021 at 12:04:23PM +0200, Harald Seiler wrote:
> Hi,
>
> On Sat, 2021-08-07 at 14:17 +0300, Matwey V. Kornilov wrote:
> > USB nodes were mistakenly disabled in
> >
> > commit 942853dd96df ("arm: dts: Resync BeagleBone device trees")
>
> To be precise, the problem is that only
The ds1307 driver also supports the DS1339 and DS1340.
However, in ds1307_rtc_reset the register writes assume that the chip
is a DS1307. This is evident in the writing of bits SQWE, RS1, RS0 to
the control register. While this applies correctly to the DS1307, on a
DS1340 the control register doesn
The DS1307 driver also supports the DS1337, DS1339 and DS1340 rtc.
However the reset registers between these rtc devices are not the same.
This means calling the rtc reset routine for a DS1307 clock on a DS1340
device will cause the clock to be calibrated incorrectly rather than
correctly reset.
D
On 8/9/21 6:31 PM, Tom Rini wrote:
> On Mon, Aug 09, 2021 at 08:24:48AM +0200, Michal Simek wrote:
>>
>>
>> On 8/6/21 8:46 PM, Tom Rini wrote:
>>> On Fri, Aug 06, 2021 at 02:22:56PM +0200, Michal Simek wrote:
>>>
Based on DT spec you can have one memory node which multiple ranges or
mu
On 10.08.21 13:30, Rasmus Villemoes wrote:
On 10/08/2021 09.13, Stefan Roese wrote:
+/* This implementation handles overlaps and supports both memcpy and memmove
+ from a single entry point. It uses unaligned accesses and branchless
Any reason not to take advantage of that, i.e. provide me
On 10/08/2021 09.13, Stefan Roese wrote:
> +/* This implementation handles overlaps and supports both memcpy and memmove
> + from a single entry point. It uses unaligned accesses and branchless
Any reason not to take advantage of that, i.e. provide memmove as an
alias for memcpy and thus get a
Use moveconfig.py script to convert CONFIG_SYS_FMAN_FW_ADDR,
CONFIG_SYS_QE_FW_ADDR and CONFIG_SYS_QE_FMAN_FW_LENGTH to Kconfig and
move these entries to defconfigs.
Signed-off-by: Rajesh Bhagat
---
configs/P2041RDB_NAND_defconfig | 1 +
configs/P2041RDB_SDCARD_defconfig
Hi,
On Sat, 2021-08-07 at 14:17 +0300, Matwey V. Kornilov wrote:
> USB nodes were mistakenly disabled in
>
> commit 942853dd96df ("arm: dts: Resync BeagleBone device trees")
To be precise, the problem is that only half of the device tree files
were synced. am33xx.dtsi (and seemingly some mo
On 10.08.21 11:27, Rasmus Villemoes wrote:
On 10/08/2021 09.13, Stefan Roese wrote:
The optimized memset uses the dc opcode, which causes problems when the
cache is disabled. This patch adds a check if the cache is disabled and
uses a very simple memset implementation in this case. Otherwise the
On 10/08/2021 09.13, Stefan Roese wrote:
> The optimized memset uses the dc opcode, which causes problems when the
> cache is disabled. This patch adds a check if the cache is disabled and
> uses a very simple memset implementation in this case. Otherwise the
> optimized version is used.
>
> Signe
On 05/08/2021 17:17, Mattijs Korpershoek wrote:
> The SEI-610 and SEI-510 boards are well supported in the
> Android Open Source project via the yukawa [1] platform.
>
> Their U-Boot version, despite being public [2] is not in mainline.
>
> Android 10 and higher have significantly reworked the bo
Hi,
On 06/08/2021 17:56, Tom Rini wrote:
> On Fri, Aug 06, 2021 at 05:36:41PM +0200, Mattijs Korpershoek wrote:
>> Hi Neil, Tom,
>>
>> Neil Armstrong writes:
>>
>>> On 05/08/2021 19:23, Tom Rini wrote:
On Thu, Aug 05, 2021 at 05:17:19PM +0200, Mattijs Korpershoek wrote:
> The SEI-61
Add kernel-doc description for fdt_fixup_memory_banks() because it is
implemented in one specific way and this information should be available
for others to decide if their SoC conforms to it.
If you don't want U-Boot to update your memory DT layout please disable
CONFIG_ARCH_FIXUP_FDT_MEMORY.
Sig
This patch enables the use of the optimized memset() & memcpy() versions
recently added on ARM64.
Signed-off-by: Stefan Roese
---
(no changes since v1)
arch/arm/Kconfig | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index caa
On an NXP LX2160 based platform it has been noticed, that the currently
implemented memset/memcpy functions for aarch64 are suboptimal.
Especially the memset() for clearing the NXP MC firmware memory is very
expensive (time-wise).
By using optimized functions, a speedup of ~ factor 6 has been me
Ported from https://github.com/ARM-software/optimized-routines
These files are included from this repository, including the latest
git commit ID:
string/aarch64/memcpy.S: afd6244a1f8d
string/aarch64/memset.S: e823e3abf5f8
string/asmdefs.h: e823e3abf5f8
Please note that when adding these optimized
The optimized memset uses the dc opcode, which causes problems when the
cache is disabled. This patch adds a check if the cache is disabled and
uses a very simple memset implementation in this case. Otherwise the
optimized version is used.
Signed-off-by: Stefan Roese
---
Changes in v2:
- New pa
On Tue, Aug 10, 2021 at 12:55 PM Sean Anderson wrote:
>
> > Re: [PATCH v2 5/6] riscv: lib: move platform-related libraries to sperate
> > folder
>
> nit: separate
>
Thanks for catching it. Fix it in the next version.
> On 8/3/21 12:44 AM, Zong Li wrote:
> > Put the platform-related implementati
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