[PATCH] arm64: zynqmp: Record ID code for XCZU1EG device

Add ID code for 1eg device. Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 5 + 1 file changed, 5 insertions(+) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index d791689f1141..668ea4b3c128 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++

Re: [PATCH] doc: mmc dev

On 3/29/22 23:01, Patrick Delaunay wrote: > Provide human readable descriptions of the speed nodes instead of the name > of constants from the code as it is already done for 'mmc rescan' > command in commit 212f078496e4 ("doc: mmc rescan speed mode"). > > Signed-off-by: Patrick Delaunay

Re: [PATCH 5/6] net: add MV88E61xx DSA driver

On Tue, 29 Mar 2022 15:52:39 -0700 Tim Harvey wrote: > Add a DSA driver for the MV88E61xx compatible GbE Ethernet switches. > > Signed-off-by: Tim Harvey Is this final version that should be accepted? The drivers seems to support not only 61xx, but 6xxx (6096, 6250, 6352, ...). Also there

[PATCH 5/6] net: add MV88E61xx DSA driver

Add a DSA driver for the MV88E61xx compatible GbE Ethernet switches. Signed-off-by: Tim Harvey --- drivers/net/Kconfig | 7 + drivers/net/Makefile| 1 + drivers/net/mv88e61xx.c | 982 3 files changed, 990 insertions(+) create mode 100644

[PATCH 3/6] net: mdio-uclass: add wrappers for read/write/reset operations

Add wrappers dm_mdio_read(), dm_mdio_write() and dm_mdio_reset() for DM MDIO's .read(), .write() and .reset() operations. Signed-off-by: Marek Behún Reviewed-by: Ramon Fried --- include/miiphy.h | 31 +++ net/mdio-uclass.c | 31 +++ 2

[PATCH 6/6] board: gw_ventana: enable MV88E61XX DSA support

Add MV88E61XX DSA support: - update dt: U-Boot dsa driver requires different device-tree syntax than the linux driver in order to link the dsa ports to the mdio bus. - update defconfig - replace mv88e61xx_hw_reset weak override with board_phy_config support for mv88e61xx configuration

[PATCH 4/6] net: fec: add support for DM_MDIO

Add support for DM_MDIO by registering a UCLASS_MDIO driver and attempting to use it. This is necessary if wanting to use a DSA driver for example hanging off of the FEC MAC. Care is taken to fallback to non DM_MDIO as several boards define DM_MDIO without having the proper device-tree

[PATCH 2/6] net: dsa: move cpu port probe to dsa_post_probe

In order to ensure that a DSA driver probe gets called before dsa_ops->port_probe move the port_probe of the cpu_port to a post-probe function. Signed-off-by: Tim Harvey --- net/dsa-uclass.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/net/dsa-uclass.c

[PATCH 0/6] Add MV88E61xx DSA driver and use on gwventana

This series adds a DSA driver for the MV88E61xx based on drivers/net/phy/mv88e61xx and uses in on the gwventana_gw5904_defconfig. The hope is that the other three boards that use the MV88E61xx driver can move to this as well eventually so that we can remove the non-dm driver and the 4 Kconfig

[PATCH 1/6] net: mdio-uclass: scan for dm mdio children on post-bind

If a DM_MDIO driver is used we need to scan the subnodes as well. Signed-off-by: Tim Harvey Signed-off-by: Vladimir Oltean --- net/mdio-uclass.c | 4 1 file changed, 4 insertions(+) diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index e74e34f78f9c..190cb08b31d8 100644 ---

[PATCH] armv8/fsl-lsch3: Suppress spurious warning on Layerscape CPUs

From: Stephen Carlson NXP/Freescale Layerscape CPUs support high-speed serial interfaces (SERDES) that can be configured for the application. Interfaces not used by the application can be set to protocol 0 to turn them off and save power, but U-Boot would emit a warning that 0 was invalid for a

Re: [PATCH 1/2] net: dsa: fix phydev->speed being uninitialized for the CPU port fixed PHY

On Mon, Mar 28, 2022 at 5:03 PM Vladimir Oltean wrote: > > On Mon, Mar 28, 2022 at 03:23:02PM -0700, Tim Harvey wrote: > > On Mon, Mar 28, 2022 at 2:26 AM Vladimir Oltean > > wrote: > > > > > > On Fri, Mar 25, 2022 at 02:03:56PM -0700, Tim Harvey wrote: > > > > On Fri, Mar 25, 2022 at 11:07 AM

TFTP hangs with fragmented IP packets

Hello, I've banged my head a few days ago trying to debug an issue with a TFTP transfer hanging in the middle. I'm testing U-Boot 2022-rc5 on a Toradex Verdin i.MX8MP module (using the verdin-imx8mp defconfig). My local network MTU is 1500 bytes, and the board uses the EQoS ethernet controller.

[PATCH u-boot-net v3 09/14] treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA

From: Marek Behún Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make it compatible with Linux' naming. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese Reviewed-by: Ramon Fried --- board/freescale/corenet_ds/eth_hydra.c | 2 +-

[PATCH u-boot-net v3 14/14] net: phy: don't require PHY interface mode during PHY creation

From: Marek Behún Currently we require PHY interface mode to be known when finding/creating the PHY - the functions * phy_device_create() * create_phy_by_mask() * search_for_existing_phy() * get_phy_device_by_mask() * phy_find_by_mask() (this is the only one global) all require the

[PATCH u-boot-net v3 13/14] bcmgenet, sun8i_emac: Don't connect PHY two times

From: Marek Behún The bcmgenet and sun8i_emac drivers call phy_connect(), which finds / creates the PHY and also connects it to the eth device via phy_connect_dev(), then set some phydev members (bcmgenet only), and then call phy_connect_dev() explicitly again. Drop the second

[PATCH u-boot-net v3 07/14] net: introduce helpers to get PHY interface mode from a device/ofnode

From: Marek Behún Add helpers ofnode_read_phy_mode() and dev_read_phy_mode() to parse the "phy-mode" / "phy-connection-type" property. Add corresponding UT test. Use them treewide. This allows us to inline the phy_get_interface_by_name() into ofnode_read_phy_mode(), since the former is not

[PATCH u-boot-net v3 11/14] net: phy: xilinx: Check interface type in ->config(), not ->probe()

From: Marek Behún We want to be able to have phydev->interface uninitialized during ->probe(). We should assume that phydev->interface is initialized only before ->config(). Signed-off-by: Marek Behún Reviewed-by: Ramon Fried --- drivers/net/phy/xilinx_gmii2rgmii.c | 10 +- 1 file

[PATCH u-boot-net v3 12/14] net: phy: use ->is_c45 instead of is_10g_interface()

From: Marek Behún Use phydev->is_c45 instead of is_10g_interface(phydev->interface) to determine whether clause 45 protocol should be used. Signed-off-by: Marek Behún Reviewed-by: Ramon Fried --- drivers/net/phy/phy.c | 8 include/phy.h | 12 2 files changed, 4

[PATCH u-boot-net v3 10/14] phy: Move PHY_INTERFACE_MODE_NA to the beginning of the enum definition

From: Marek Behún Move PHY_INTERFACE_MODE_NA to the beginning of the enum definition to make it have zero value. This makes it possible (although not encouraged) to test for invalid/nonexistent interface mode with !val instead of val == PHY_INTERFACE_MODE_NA. The comment near the definition

[PATCH u-boot-net v3 08/14] treewide: Rename PHY_INTERFACE_MODE_COUNT to PHY_INTERFACE_MODE_MAX

From: Marek Behún Rename constant PHY_INTERFACE_MODE_COUNT to PHY_INTERFACE_MODE_MAX to make it compatible with Linux' naming. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese --- drivers/core/ofnode.c | 2 +- drivers/net/phy/aquantia.c | 2 +- include/phy_interface.h| 2 +- 3

[PATCH u-boot-net v3 05/14] treewide: use dm_mdio_read/write/reset() wrappers

From: Marek Behún Use the new dm_mdio_read/write/reset() wrappers treewide, instead of always getting and dereferencing MDIO operations structure pointer. Signed-off-by: Marek Behún Reviewed-by: Ramon Fried --- drivers/net/mdio_mux_sandbox.c | 6 ++ net/mdio-mux-uclass.c | 16

[PATCH u-boot-net v3 03/14] net: introduce helpers to get PHY ofnode from MAC

From: Marek Behún Add helpers ofnode_get_phy_node() and dev_get_phy_node() and use it in net/mdio-uclass.c function dm_eth_connect_phy_handle(). Also add corresponding UT test. This is useful because other part's of U-Boot may want to get PHY ofnode without connecting a PHY. Signed-off-by:

[PATCH u-boot-net v3 06/14] net: phy: fix parsing wrong property

From: Marek Behún The "phy-interface-type" property should be "phy-connection-type". Signed-off-by: Marek Behún Reviewed-by: Ramon Fried --- drivers/net/phy/phy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index

[PATCH u-boot-net v3 04/14] net: mdio-uclass: add wrappers for read/write/reset operations

From: Marek Behún Add wrappers dm_mdio_read(), dm_mdio_write() and dm_mdio_reset() for DM MDIO's .read(), .write() and .reset() operations. Signed-off-by: Marek Behún Reviewed-by: Ramon Fried --- include/miiphy.h | 31 +++ net/mdio-uclass.c | 31

[PATCH u-boot-net v3 02/14] net: mdio-uclass: use ARRAY_SIZE()

From: Marek Behún Use the ARRAY_SIZE() macro instead of hardcoding sizes of arrays in macros. Signed-off-by: Marek Behún --- net/mdio-uclass.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index 5735afe49e..649dc60f73

[PATCH u-boot-net v3 01/14] net: mdio-uclass: fix type for phy_mode_str and phy_handle_str

From: Marek Behún These global variables should both have type static const char * const Signed-off-by: Marek Behún Reviewed-by: Ramon Fried --- net/mdio-uclass.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index

[PATCH u-boot-net v3 00/14] u-boot-net refactors, fixes, cleanups

From: Marek Behún Hello, this is v3 of https://patchwork.ozlabs.org/project/uboot/list/?series=290889. Changes since v2: - added UT tests for ofnode_get_phy_node() and ofnode_get_phy_mode(), as requested by Simon Marek Behún (14): net: mdio-uclass: fix type for phy_mode_str and

[RFC PATCH] mips: dts: add initial support for ls1c300 SoC

Loongson 1C is a cost-effective SOC chip for industrial control and the Internet of Things. The Loongson 1C includes a floating-point processing unit, supports multiple types of memory, and supports high-capacity MLC NAND Flash. Loongson 1C provides developers with a wealth of peripheral

Re: [PATCH 1/1] arm: apple: Add M1 Ultra support

> From: Janne Grunau > Date: Tue, 29 Mar 2022 13:29:35 +0200 > > The M1 Ultra consists of two M1 Max dies. The second die's I/O is at > a consistent offset of 0x20. > > Signed-off-by: Janne Grunau I think that's the way to do it. Technically we could probably get away with mapping

[PATCH] treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used

If .bss does not immediately follow the end of the image, then CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an option to use an

Re: [PATCH 3/3] doc: usage: Convert README.plan9 to reST

On 3/28/22 04:43, Bin Meng wrote: This converts the existing README.plan9 to reST, and puts it under the doc/usage/os directory. Signed-off-by: Bin Meng --- doc/usage/index.rst | 1 + doc/{README.plan9 => usage/os/plan9.rst} | 12 2 files changed, 9

Re: [PATCH 2/3] doc: usage: Update vxworks doc to mention RISC-V support

On 3/28/22 04:43, Bin Meng wrote: At present the doc only mentions Arm, PowerPC and x86. RISC-V support has been added since VxWorks SR0650 support for a while, and U-Boot supports loading a RISC-V VxWorks kernel too. Let's document it. Signed-off-by: Bin Meng --- doc/usage/os/vxworks.rst |

[PATCH v2 18/18] virtio: pci: Make use of dm_pci_map_bar()

The virtio PCI capabilities describe regions of memory that should be mapped. Map those with dm_pci_map_bar() which will ensure they are valid PCI regions. Signed-off-by: Andrew Scull --- drivers/virtio/virtio_pci_modern.c | 18 -- 1 file changed, 8 insertions(+), 10

[PATCH v2 15/18] pci: Update dm_pci_bus_to_virt() parameters

Add mask parameter and reorder length parameter to match the other PCI address conversion functions. Using PCI_REGION_TYPE as the mask gives the old behaviour. It's converted from a macro to an inline function as the length parameter is now used twice, but should only be calculated once.

[PATCH v2 12/18] test: pci: Test PCI address conversion functions

Add tests for the functions dm_pci_bus_to_phys() and dm_pci_phys_to_bus() which convert between PCI bus addresses and physical addresses based on the ranges declared for the PCI controller. The ranges of bus#1 are used for the tests, adding a translation to one of the ranges to cover more cases.

[PATCH v2 08/18] pci: Fix use of flags in dm_pci_map_bar()

The flags parameter of dm_pci_map_bar() is used for PCI region flags rather than memory mapping flags. Fix the type to match that of the region flags and stop using the regions flags as memory mapping flags. Signed-off-by: Andrew Scull --- drivers/pci/pci-uclass.c | 10 +- include/pci.h

[PATCH v2 10/18] pci: Check region ranges are addressable

When parsing the `ranges` DT node, check that both extremes of the regions are addressable without overflow. This assumption can then be safely made when processing the regions. Signed-off-by: Andrew Scull Reviewed-by: Bin Meng --- drivers/pci/pci-uclass.c | 17 - 1 file

[PATCH v2 07/18] virtio: pci: Read entire capability into memory

Read the virtio PCI capability out of the device configuration space to a struct rather than accessing fields directly from the configuration space as they are needed. This both makes access to the fields easier and avoids re-reading fields. Re-reading fields could result in time-of-check to

[PATCH v2 06/18] virtio: pci: Check virtio capability is in bounds

Ensure the virtio PCI capabilities are contained within the bounds of the device's configuration space. The expected size of the capability is passed when searching for the capability to enforce this check. Signed-off-by: Andrew Scull --- drivers/virtio/virtio_pci_modern.c | 20

[PATCH v2 04/18] virtio: pci: Bounds check notification writes

Make sure virtio notifications are written within their allocated buffer. Signed-off-by: Andrew Scull Reviewed-by: Bin Meng --- drivers/virtio/virtio_pci_modern.c | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/virtio/virtio_pci_modern.c

[PATCH v2 05/18] virtio: pci: Check virtio common config size

Check that the common config is at least as large as the struct it is expected to contain. Only then is it safe to cast the pointer and be safe from out-of-bounds accesses. Signed-off-by: Andrew Scull Reviewed-by: Bin Meng --- drivers/virtio/virtio_pci_modern.c | 8 1 file changed, 8

[PATCH v2 03/18] virtio: pci: Bounds check device config access

The device config is optional, so check it was present and mapped before trying to use the pointer. Bounds violations are an error, not just a warning, so bail if the checks fail. Signed-off-by: Andrew Scull Reviewed-by: Bin Meng --- drivers/virtio/virtio_pci_modern.c | 16 1

[PATCH v2 00/18] virtio: pci: Add and fix consistency checks

The virtio PCI drivers forgo a number of consistency checks, particularly around pointer validation and bounds checking. This series focuses on the modern driver to add those checks. The start of the series adds and fixes some basic bounds checks. Later patches ensure PCI addresses fall within

Re: [PATCH 1/3] doc: usage: Convert README.vxworks to reST

On 3/28/22 04:43, Bin Meng wrote: This converts the existing README.vxworks to reST, and puts it under the doc/usage/os directory. Signed-off-by: Bin Meng --- doc/usage/index.rst | 8 +++ doc/{README.vxworks => usage/os/vxworks.rst} | 22 ++--

Re: [PATCH] doc: usage: Group all shell command docs into cmd/ sub-direcotry

On 3/28/22 05:02, Bin Meng wrote: Currently all shell command docs are put in the doc/usage root. Let's group them into cmd/ sub-direcotry. %s/direcotry/directory/ I will fix that. Signed-off-by: Bin Meng --- doc/usage/{ => cmd}/acpi.rst | 0 doc/usage/{ => cmd}/addrmap.rst

Re: [PATCH] net: phy: Fix rgmii-id phy reset timeout issue

On Tue, Mar 29, 2022 at 10:06 PM Michal Simek wrote: > > From: T Karthik Reddy > > While creating a phy device using phy_device_create(), we need to > provide a valid phyaddr instead of 0 causing phy address being > registered as 0 with mdio bus and shows mdio phy list as below > > ZynqMP> mdio

[PATCH 3/6] arm_ffa: introduce the FF-A Sandbox driver

From: Abdellatif El Khlifi Provide a Sandbox driver to emulate the FF-A ABIs The emulated ABIs are those supported by the FF-A core driver and according to FF-A specification v1.0. The Sandbox driver provides operations allowing the test application to read the status of all the inspected ABIs

[PATCH 6/6] arm_ffa: introduce FF-A MM communication

From: Abdellatif El Khlifi Add MM communication support using FF-A transport FF-A MM communication allows exchanging data with StandAlonneMM or smm-gateway secure partitions which run in OP-TEE. An MM shared buffer and a door bell event are used to exchange this data. The data is used by EFI

[PATCH 1/6] arm_ffa: introduce Arm FF-A low-level driver

From: Abdellatif El Khlifi Add the driver implementing Arm Firmware Framework for Armv8-A v1.0 The Firmware Framework for Arm A-profile processors (FF-A) describes interfaces (ABIs) that standardize communication between the Secure World and Normal World leveraging TrustZone technology. This

[PATCH 4/6] arm_ffa: introduce Sandbox test cases for UCLASS_FFA

From: Abdellatif El Khlifi Add functional test cases for the FF-A core driver These tests rely on the FF-A Sandbox driver which helps in inspecting the FF-A core driver. Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini --- MAINTAINERS | 2 + test/dm/Makefile | 1 + test/dm/ffa.c

[PATCH 5/6] arm_ffa: introduce armffa command Sandbox test

From: Abdellatif El Khlifi Add Sandbox test for the armffa command Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini --- MAINTAINERS | 2 ++ test/cmd/Makefile | 1 + test/cmd/armffa.c | 33 + test/cmd/armffa.h | 13 + 4 files changed, 49

[PATCH 2/6] arm_ffa: introduce armffa command

From: Abdellatif El Khlifi Provide armffa command showcasing the use of the FF-A driver The armffa command allows to query secure partitions data from the secure world and exchanging messages with the partitions. Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini --- MAINTAINERS |

[PATCH 0/6] introduce Arm FF-A support

From: Abdellatif El Khlifi This patchset adds support for Arm FF-A (Arm Firmware Framework for Armv8-A v1.0). FF-A support is generic by design and can be used by any Arm platform. The features added are as follows: 1/ FF-A device driver 2/ armffa command 3/ FF-A Sandbox driver 4/ FF-A

Re: [PATCH] doc: mmc dev

On Tue, Mar 29, 2022 at 10:01 PM Patrick Delaunay wrote: > > Provide human readable descriptions of the speed nodes instead of the name > of constants from the code as it is already done for 'mmc rescan' > command in commit 212f078496e4 ("doc: mmc rescan speed mode"). > > Signed-off-by: Patrick

Re: [PATCH] mtd: nand: mxs_nand_spl: Remove the page aligned access

On Mon, Mar 28, 2022 at 2:14 AM Ye Li wrote: > > The mxs_nand_spl driver can support to read from page unaligned offset, > so don't need to set bl_len to ask spl_load_simple_fit to handle > the page unaligned access. > > Actually spl_load_simple_fit has two parts of reading: > spl_simple_fit_read

Re: [PATCH] board: gw_ventana: gsc: fix GSC read/write functions

On Mon, Mar 28, 2022 at 12:53 PM Fabio Estevam wrote: > > Hi Tim, > > On Mon, Mar 28, 2022 at 4:24 PM Tim Harvey wrote: > > > Any other feedback on this? Regardless of if I2C drivers should return > > the same error code as Linux on a NAK, I would like to get this patch > > applied to fix the

Re: [PATCH] doc: mmc dev

Hi Patrick, On 29/03/22 19:31, Patrick Delaunay wrote: > Provide human readable descriptions of the speed nodes instead of the name > of constants from the code as it is already done for 'mmc rescan' > command in commit 212f078496e4 ("doc: mmc rescan speed mode"). > > Signed-off-by: Patrick

[PATCH] net: phy: Fix rgmii-id phy reset timeout issue

From: T Karthik Reddy While creating a phy device using phy_device_create(), we need to provide a valid phyaddr instead of 0 causing phy address being registered as 0 with mdio bus and shows mdio phy list as below ZynqMP> mdio list eth0: 0 - TI DP83867 <--> ethernet@ff0b eth1: 0 - TI

Re: [PATCH] mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver

Hi Ye Li, On Tue, Mar 29, 2022 at 5:38 AM Ye Li wrote: > > Because mxs_nand_spl driver does not support DM, to use the minimum ECC > layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC. > > Signed-off-by: Ye Li > --- > drivers/mtd/nand/raw/mxs_nand.c | 4 > 1 file changed, 4

Re: [PATCH v6 0/3] Add a clock driver for the imx8mq

Please ignore. I introduced some unused variables. v7 sent. Angus On 2022-03-29 06:52, Angus Ainslie wrote: This is a DM clock driver for the imx8mq based on the linux kernel driver and the u-boot imx8mm clock driver. It also removes some code duplication in the imx8m[nmp] clock drivers.

[PATCH v7 3/3] clk: imx8m: reduce rate table duplication

Re-factor the imx8m[nmpq] rate tables into the common pll1416x clock driver. 43cdaa1567ad3 ("clk: imx8mm: Move 1443X/1416X PLL clock structure to common place") Signed-off-by: Angus Ainslie Tested-by: Adam Ford #imx8mm-beacon --- drivers/clk/imx/clk-imx8mm.c | 60

[PATCH v7 2/3] clk: imx8mq: Add a clock driver for the imx8mq

This is a DM clock driver based off the imx8mm u-boot driver and the linux kernel driver. All of the PLLs and clocks are initialized so the subsystems below are functional and tested. 1) USB host and peripheral 2) ECSPI 3) UART 4) I2C all busses 5) USDHC for eMMC support 6) USB storage 7) GPIO

[PATCH v7 1/3] dt-bindings: imx8mq-clock: add mainline definitions

Sync the clock ids with the mainline kernel 077de6e1c9f ("clk: imx8mq: add PLL monitor output") Signed-off-by: Angus Ainslie Reviewed-by: Marek Vasut --- include/dt-bindings/clock/imx8mq-clock.h | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git

[PATCH v7 0/3] Add a clock driver for the imx8mq

This is a DM clock driver for the imx8mq based on the linux kernel driver and the u-boot imx8mm clock driver. It also removes some code duplication in the imx8m[nmp] clock drivers. Changes since v6 Fixed unused variable warning Changes since v5 Added UART clocks Added video clocks Added DRAM

Re: [PATCH] mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver

On 22/03/29 04:38PM, Ye Li wrote: > Because mxs_nand_spl driver does not support DM, to use the minimum ECC > layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC. Yes, spl also need the CONFIG_NAND_MXS_USE_MINIMUM_ECC flag. Reviewed-by: Han Xu > > Signed-off-by: Ye Li > --- >

[PATCH] doc: mmc dev

Provide human readable descriptions of the speed nodes instead of the name of constants from the code as it is already done for 'mmc rescan' command in commit 212f078496e4 ("doc: mmc rescan speed mode"). Signed-off-by: Patrick Delaunay --- doc/usage/mmc.rst | 36

[PATCH v6 3/3] clk: imx8m: reduce rate table duplication

Re-factor the imx8m[nmpq] rate tables into the common pll1416x clock driver. 43cdaa1567ad3 ("clk: imx8mm: Move 1443X/1416X PLL clock structure to common place") Signed-off-by: Angus Ainslie Tested-by: Adam Ford #imx8mm-beacon --- drivers/clk/imx/clk-imx8mm.c | 60

[PATCH v6 2/3] clk: imx8mq: Add a clock driver for the imx8mq

This is a DM clock driver based off the imx8mm u-boot driver and the linux kernel driver. All of the PLLs and clocks are initialized so the subsystems below are functional and tested. 1) USB host and peripheral 2) ECSPI 3) UART 4) I2C all busses 5) USDHC for eMMC support 6) USB storage 7) GPIO

[PATCH v6 1/3] dt-bindings: imx8mq-clock: add mainline definitions

Sync the clock ids with the mainline kernel 077de6e1c9f ("clk: imx8mq: add PLL monitor output") Signed-off-by: Angus Ainslie Reviewed-by: Marek Vasut --- include/dt-bindings/clock/imx8mq-clock.h | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git

[PATCH v6 0/3] Add a clock driver for the imx8mq

This is a DM clock driver for the imx8mq based on the linux kernel driver and the u-boot imx8mm clock driver. It also removes some code duplication in the imx8m[nmp] clock drivers. Changes since v5 Added UART clocks Added video clocks Added DRAM clocks Changes since v4 Rebased onto [1] so

[PATCH v3 2/3] tee: optee: bind rng optee driver

In U-Boot, the discovery of TA based on its UUID on the TEE bus is not supported. This patch only binds the driver associated to the new supported OP-TEE TA = TA_HWRNG when this driver is enable. Signed-off-by: Patrick Delaunay --- (no changes since v1) drivers/tee/optee/core.c | 13

[PATCH v3 3/3] configs: add support of OPTEE RNG in stm32mp15 defconfig

When the RNG device is secured with OP-TEE, it is only accessible with the HWRNG TA, the CONFIG_RNG_OPTEE is needed for STM32MP15 targets with OP-TEE support. The probe of this RNG driver fails when the TA is not available in OP-TEE and the previous driver can be used, as CONFIG_RNG_STM32MP1 is

[PATCH v3 1/3] rng: add OP-TEE based Random Number Generator

Add driver for OP-TEE based Random Number Generator on ARM SoCs where hardware entropy sources are not accessible to normal world and the RNG service is provided by a HWRNG Trusted Application (TA). This driver is based on the linux driver: char/hw_random/optee-rng.c Signed-off-by: Patrick

[PATCH/RFC u-boot 3/3] renesas: Fix RPC-IF compatible values

The compatible values used for device nodes representing Renesas Reduced Pin Count Interfaces were based on preliminary versions of the Device Tree Bindings. Correct them in both DTSi files and drivers, to match the final DT Bindings. Note that there are no DT bindings for RPC-IF on RZ/A1 yet,

[PATCH u-boot 2/3] ARM: renesas: Propagate RPC-IF enablement to subsequent software

As the Renesas Reduced Pin Count Interface may be locked by TF-A, it is disabled by default[1]. When unlocked, TF-A passes a DT fragment to enable it, which is applied to the U-Boot DT[2]. Unlike the memory layout, the RPC-IF enablement is not propagated to subsequent software. Hence e.g. Linux

[PATCH u-boot 1/3] ARM: dts: rmobile: Fix RPC-IF device node names

According to the Generic Names Recommendation in the Devicetree Specification Release v0.3, and the DT Bindings for the Renesas Reduced Pin Count Interface, the node name for a Renesas RPC-IF device should be "spi". Especially on R-Car Gen3 and RZ/G2, the node name matters, as the node is enabled

[PATCH u-boot 0/3] renesas: Fix RPC-IF enablement

Hi all, On Renesas R-Car Gen3 platforms, the SPI Multi I/O Bus Controllers (RPC-IF) provide access to HyperFlash or QSPI storage. On production systems, they are typically locked by the TF-A firmware, unless TF-A is built with RCAR_RPC_HYPERFLASH_LOCKED=0. When unlocked, TF-A

[PATCH 1/1] arm: apple: Add M1 Ultra support

The M1 Ultra consists of two M1 Max dies. The second die's I/O is at a consistent offset of 0x20. Signed-off-by: Janne Grunau --- arch/arm/mach-apple/board.c | 167 1 file changed, 167 insertions(+) diff --git a/arch/arm/mach-apple/board.c

[PATCH] clk: zynqmp: Add support for for DP audio/video clocks

Add support for getting rate for DP audio and video clocks. Signed-off-by: Michal Simek --- drivers/clk/clk_zynqmp.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c index 9038fb8befd9..45c679a627b3 100644 ---

Re: [ANN] U-Boot v2022.04-rc5 released

Hi Stefano On Tue, Mar 29, 2022 at 12:47 PM Stefano Babic wrote: > > On 29.03.22 12:01, Michael Nazzareno Trimarchi wrote: > > Hi all > > > > On Mon, Mar 28, 2022 at 4:31 PM Tom Rini wrote: > >> > >> On Mon, Mar 28, 2022 at 04:29:41PM +0200, Michael Nazzareno Trimarchi > >> wrote: > >>> Hi >

[PATCH] xilinx: Increase max size of image from 60 to 100MB

Recently big Linux kernels can have more then 60MB that's why increase this limit to also cover these large kernels. Signed-off-by: Michal Simek --- include/configs/xilinx_versal.h | 2 +- include/configs/xilinx_zynqmp.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [ANN] U-Boot v2022.04-rc5 released

On 29.03.22 12:01, Michael Nazzareno Trimarchi wrote: Hi all On Mon, Mar 28, 2022 at 4:31 PM Tom Rini wrote: On Mon, Mar 28, 2022 at 04:29:41PM +0200, Michael Nazzareno Trimarchi wrote: Hi On Mon, Mar 28, 2022 at 4:22 PM Tom Rini wrote: On Mon, Mar 28, 2022 at 04:19:49PM +0200, Michael

Re: [ANN] U-Boot v2022.04-rc5 released

Hi all On Mon, Mar 28, 2022 at 4:31 PM Tom Rini wrote: > > On Mon, Mar 28, 2022 at 04:29:41PM +0200, Michael Nazzareno Trimarchi wrote: > > Hi > > > > On Mon, Mar 28, 2022 at 4:22 PM Tom Rini wrote: > > > > > > On Mon, Mar 28, 2022 at 04:19:49PM +0200, Michael Nazzareno Trimarchi > > > wrote:

Re: [EXT] [PATCH] ARM: imx: romapi: Repair FlexSPI NOR boot offset

On Tue, 2022-03-29 at 11:01 +0200, Marek Vasut wrote: > Caution: EXT Email > > On 3/29/22 04:49, Ye Li wrote: > > Hi, > > > > > > > > > > > > > > If you change the ROM API driver, that will break our design. > > > > You > > > > can > > > > try to overwrite spl_romapi_get_uboot_base for your

Re: [EXT] [PATCH] ARM: imx: romapi: Repair FlexSPI NOR boot offset

On 3/29/22 04:49, Ye Li wrote: Hi, If you change the ROM API driver, that will break our design. You can try to overwrite spl_romapi_get_uboot_base for your board only. Since there are no users which boot from flexspi upstream, this design can still be fixed such that it does not require

[PATCH] mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver

Because mxs_nand_spl driver does not support DM, to use the minimum ECC layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC. Signed-off-by: Ye Li --- drivers/mtd/nand/raw/mxs_nand.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/nand/raw/mxs_nand.c

Re: [PATCH] mmc: zynq_sdhci: Fix SDx_BASECLK configuration

pá 25. 3. 2022 v 13:11 odesílatel Michal Simek napsal: > > From: Ashok Reddy Soma > > The DLL mode supported SD reference clocks are 50 MHz, 100 MHz and > 200 MHz. When user select SD frequency as 200MHz in the design, the > actual frequency is going to come around ~187MHz (<= 200MHz considering

Re: [PATCH] serial: zynq: Change fifor behavior in debug mode

pá 25. 3. 2022 v 11:50 odesílatel Michal Simek napsal: > > Serial IP has output buffer which status is indicated by two bits. If fifo > if empty or full. Default configuration is that chars are pushed to fifo > till it is full. Time to time it is visible that chars are scambled and > logs are not

Re: [PATCH] arm64: zynqmp: Remove low level UART setting cont

čt 24. 3. 2022 v 13:31 odesílatel Michal Simek napsal: > > There is no reason to do serial initialization. Uart driver does it already > based on DT. Good effect is that it is clear which interface is console. > The same change was done in past by commit 84d2bbf082fa ("arm64: zynqmp: > Remove low

Re: [PATCH] dt-bindings: phy: Sync phy.h with Linux kernel

čt 24. 3. 2022 v 10:17 odesílatel Michal Simek napsal: > > Make sure that both files are in sync to have the same values in DTs. > The patch is fixing SPDX license as is used in the kernel and adding new > values for PHY_TYPE_DPHY and PHY_TYPE_CPHY. > > SPDX license change was done by: > Link:

Re: [PATCH] arm64: versal: Do not place u-boot to reserved memory location

čt 17. 3. 2022 v 15:25 odesílatel Michal Simek napsal: > > Versal can also have reserved space in DT which u-boot has to avoid to > placing self to that location. The same change was done in ZynqMP by commit > ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") > and also for

Re: [PATCH 00/14] video: Drop old CFB code

On Sun, 23 Jan 2022 07:04:01 -0700 Simon Glass s...@chromium.org wrote: ... > Simon Glass (14): > video: Drop cfg_console > video: nokia_rx51: Drop obsolete video code > video: siemens: Drop unused video code > video: nexell: Drop unused and invalid code > video: Drop video_fb header >