On Sun, Sep 18, 2022 at 01:23:27PM +0200, Pali Rohár wrote:
> 32-bit U-Boot builds cannot use more than around 2 GB of DDR memory. But on
> some platforms/boards it is possible to connect also 4 GB SODIMM DDR memory.
> U-Boot currently prints only effective size of RAM which can use, which may
> b
On Mon, Sep 12, 2022 at 09:02:27PM +0200, Pali Rohár wrote:
> Function print_size() round size to the nearst value with one decimal
> fraction number. But in special cases also unit order may overflow.
>
> For example value 1073689396 is printed as "1024 MiB" and value 1073741824
> as "1 GiB".
>
On Fri, Sep 09, 2022 at 05:32:38PM +0200, Pali Rohár wrote:
> CONFIG_MAX_MEM_MAPPED when defined specifies upper memory mapped limit.
> So check for it always, and not only when CONFIG_VERY_BIG_RAM is defined.
>
> Signed-off-by: Pali Rohár
For the series, applied to u-boot/next, thanks!
--
To
From: Ye Li
Move init_clk_usdhc to non-clk driver case, since assigned-clocks properties
will initialize the clocks by clk driver.
Signed-off-by: Ye Li
Signed-off-by: Marek Vasut
---
NOTE: Was MLK-21848-5 fsl_esdhc: fix problem when using clk driver
NOTE: Fixes SD SDR104 mode instability on MX
On Fri, Sep 23, 2022 at 10:54:40PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi Tom
>
> On Fri, Sep 23, 2022 at 8:18 PM Michael Nazzareno Trimarchi
> wrote:
> >
> > HI Tom
> >
> > On Fri, Sep 23, 2022 at 8:08 PM Tom Rini wrote:
> > >
> > > On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trim
Hi Tom
On Fri, Sep 23, 2022 at 8:18 PM Michael Nazzareno Trimarchi
wrote:
>
> HI Tom
>
> On Fri, Sep 23, 2022 at 8:08 PM Tom Rini wrote:
> >
> > On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trimarchi wrote:
> >
> > > The max size is defined at architectural level
> > >
> > > Signed-off-by:
On Fri, 9 Sep 2022 19:59:05 +0800, Weijie Gao wrote:
> This patch series add support for MediaTek MT7981/MT7986 SoCs with their
> reference boards and related drivers.
>
> This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for these
> boards. The clock, pinctrl drivers and the S
This adds fallbacks for the various dm_rtc_* functions. This allows
common code to use these functions without ifdefs.
Fixes: c8ce7ba87d1 ("misc: Add support for nvmem cells")
Signed-off-by: Sean Anderson
---
include/rtc.h | 31 ---
1 file changed, 28 insertions(+),
HI Tom
On Fri, Sep 23, 2022 at 8:08 PM Tom Rini wrote:
>
> On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trimarchi wrote:
>
> > The max size is defined at architectural level
> >
> > Signed-off-by: Michael Trimarchi
> > ---
> > configs/evb-px30_defconfig | 1 -
> > 1 file changed, 1 deletio
On Fri, Sep 23, 2022 at 08:07:36PM +0200, Michael Trimarchi wrote:
> The max size is defined at architectural level
>
> Signed-off-by: Michael Trimarchi
> ---
> configs/evb-px30_defconfig | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defc
The max size is defined at architectural level
Signed-off-by: Michael Trimarchi
---
configs/evb-px30_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 240a044b2a..4f88879e18 100644
--- a/configs/evb-px30_defconfig
+++ b/con
On Fri, Sep 23, 2022 at 07:32:47PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi
>
> On Fri, Sep 23, 2022 at 7:23 PM Tom Rini wrote:
> >
> > On Fri, Sep 23, 2022 at 07:10:03PM +0200, Michael Nazzareno Trimarchi wrote:
> >
> > > Hi Tom
> > >
> > > In uboot 2022.01 we had tpl max size for px30 to
Hi
On Fri, Sep 23, 2022 at 7:23 PM Tom Rini wrote:
>
> On Fri, Sep 23, 2022 at 07:10:03PM +0200, Michael Nazzareno Trimarchi wrote:
>
> > Hi Tom
> >
> > In uboot 2022.01 we had tpl max size for px30 to 10240 but now after
> > some conversion I can see TPL_MAX_SIZE 0x2 for the same CPU. Now I
On Fri, Sep 23, 2022 at 07:10:03PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi Tom
>
> In uboot 2022.01 we had tpl max size for px30 to 10240 but now after
> some conversion I can see TPL_MAX_SIZE 0x2 for the same CPU. Now I
> think that internal memory is 16Kb for this cpu.
> Do you have
Hi Tom
In uboot 2022.01 we had tpl max size for px30 to 10240 but now after
some conversion I can see TPL_MAX_SIZE 0x2 for the same CPU. Now I
think that internal memory is 16Kb for this cpu.
Do you have any explanation?
Michael
On Fri, Sep 23, 2022 at 06:07:03PM +0200, Pali Rohár wrote:
> On Friday 23 September 2022 11:57:30 Tom Rini wrote:
> > On Fri, Sep 23, 2022 at 05:45:07PM +0200, Pali Rohár wrote:
> > > On Thursday 22 September 2022 17:06:31 Heinrich Schuchardt wrote:
> > > > On 9/22/22 15:14, Pali Rohár wrote:
> >
On Friday 23 September 2022 11:57:30 Tom Rini wrote:
> On Fri, Sep 23, 2022 at 05:45:07PM +0200, Pali Rohár wrote:
> > On Thursday 22 September 2022 17:06:31 Heinrich Schuchardt wrote:
> > > On 9/22/22 15:14, Pali Rohár wrote:
> > > > On Thursday 22 September 2022 13:27:51 Simon Glass wrote:
> > >
This enables eDMA snooping on the LS1043A and LS1046A. This will allow
marking the I2C, LPUART, and SPI devices on these SoCs as DMA coherent.
Oddly, this bit is only documented for the LS1043A, and is marked as
"reserved" in the LS1046ARM. I have tested this patch on the LS1046A
and found that mar
On Fri, Sep 23, 2022 at 05:45:07PM +0200, Pali Rohár wrote:
> On Thursday 22 September 2022 17:06:31 Heinrich Schuchardt wrote:
> > On 9/22/22 15:14, Pali Rohár wrote:
> > > On Thursday 22 September 2022 13:27:51 Simon Glass wrote:
> > > > Hi,
> > > >
> > > > On Wed, 21 Sept 2022 at 15:56, Tom Rin
On Thursday 22 September 2022 17:06:31 Heinrich Schuchardt wrote:
> On 9/22/22 15:14, Pali Rohár wrote:
> > On Thursday 22 September 2022 13:27:51 Simon Glass wrote:
> > > Hi,
> > >
> > > On Wed, 21 Sept 2022 at 15:56, Tom Rini wrote:
> > > >
> > > > On Wed, Sep 21, 2022 at 03:54:13PM +0200, Pal
On 9/21/22 11:50, Simon Glass wrote:
On 7/17/22 10:12, Simon Glass wrote:
Hi Marek,
Hi,
[...]
Applied to u-boot-dm, thanks!
This patch is still not in u-boot/master ?
Applied to u-boot-dm, thanks!
Applied to u-boot-dm, thanks!
Can you point me to this patch in the u-boot-dm repository
On Mon, 2022-08-29 at 19:59 +0200, Philippe Schenker wrote:
> From: Philippe Schenker
>
> With this call the following attributes get set to the device-tree
> and are then accessible from linux in /proc/device-tree/
>
> serial-number: The serial number that is stored in config-block
> toradex,bo
On Mon, 2022-08-29 at 19:59 +0200, Philippe Schenker wrote:
> From: Philippe Schenker
>
> With this call the following attributes get set to the device-tree
> and are then accessible from linux in /proc/device-tree/
>
> serial-number: The serial number that is stored in config-block
> toradex,bo
On Thu, Sep 22, 2022 at 04:17:54PM +0200, Stefano Babic wrote:
> Hi Tom,
>
> Please pull from u-boot-imx, just some fixes for releases, thanks !
>
>
> The following changes since commit 12ed6d4911ced1df099a365e0a994b54211b60f3:
>
> Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb (2
Hi Patrick
On 9/23/22 13:40, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 9/21/22 09:37, Patrick Delaunay wrote:
>> Remove the unnecessary nodes for TFABOOT and keep the mandatory part
>> in SOC dtsi, only the DDRCTRL and DDRPHY addresses.
>> This patch allows to manage the DDR configuration settin
Hi Patrick
On 9/19/22 08:42, Patrice CHOTARD wrote:
> Hi PAtrick
>
> On 9/16/22 16:52, Patrick Delaunay wrote:
>> Remove the unnecessary comment after the CONFIG_SYS_BOOTM_LEN
>> migration to Kconfig.
>>
>> Fixes: c45568cc4e51 ("Convert CONFIG_SYS_BOOTM_LEN to Kconfig")
>> Signed-off-by: Patrick
Hi Patrick
On 9/15/22 18:11, Patrick Delaunay wrote:
>
> And support the 2 keys for STM32MP13x
> - PKHTH : Hash of the 8 ECC Public Keys Hashes Table
> (ECDSA is the authentication algorithm)
> - EDMK : Encryption/Decryption Master Key
>
> Only one key is supported for STM32MP15x
> -
From: Samuel Obuch
The maximum length is capped similarly to the emaclite_send function.
Avoid integer underflow for values of ip->ip_len < 30, the minimum
length of an IP packet is 21 bytes.
Signed-off-by: Samuel Obuch
---
drivers/net/xilinx_emaclite.c | 4 +++-
1 file changed, 3 insertions(+
From: Samuel Obuch
Use __raw_read* and __raw_write* functions to ensure read/write
is passed to the memory-mapped regions, as non-volatile accesses
may get optimised out.
Signed-off-by: Samuel Obuch
---
drivers/net/xilinx_emaclite.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-
From: Samuel Obuch
Function ioremap_nocache seems to be defined only for mips and microblaze
architectures. Therefore, the function call in the emaclite driver causes
this driver to be unusable with other architectures, for example riscv.
v2: Use ioremap function instead of ioremap_nocache. Swit
Hi Patrick
On 9/23/22 13:38, Patrice CHOTARD wrote:
> Hi
>
> On 9/12/22 17:40, Patrick Delaunay wrote:
>> From: Christophe Kerello
>>
>> Current compatible string used to update SPI NAND and SPI NOR devices
>> can lead to a wrong partitions update (for example, SPI NAND partitions
>> added to SP
HI Patrick
On 9/12/22 08:43, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 9/9/22 17:22, Patrick Delaunay wrote:
>> Improve the partitioning trace done in command stm32prog:
>> - remove the trace "partition: Done" when the GPT partitioning is not done
>> - indicate the mmc instance used for each 'gp
Hi Patrick
On 9/23/22 13:37, Patrice CHOTARD wrote:
> Hi Patrick
>
> On 9/21/22 09:53, Patrick DELAUNAY wrote:
>> Hi,
>>
>> On 9/7/22 13:42, Patrick Delaunay wrote:
>>> Device tree alignment with Linux kernel v6.0-rc3:
>>> - ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp15xx-dkx
Hello,
I am trying to figure out whether ASIX AX88179A-based Ethernet
dongles are supported by U-Boot. There is a driver for AX88179
(note: without 'A') and it seems to recognize the dongle but
that's as far as it gets.
Specifically, when I boot, it is recognized as Ethernet controller
and ethact
Hi Patrick
For the series: applied on u-boot-stm32/next
Thanks
Patrice
On 9/6/22 18:53, Patrick Delaunay wrote:
> When the STM32CubeProgrammer sent a empty flashlayout.tsv
> file, the command stm32prog correctly parse the file
> but data->dev_nb = 0 and the stm32prog_devices_init
> operations sh
Hi Patrick
On 9/21/22 09:37, Patrick Delaunay wrote:
> Remove the unnecessary nodes for TFABOOT and keep the mandatory part
> in SOC dtsi, only the DDRCTRL and DDRPHY addresses.
> This patch allows to manage the DDR configuration setting in U-Boot
> device tree only if it is needed, when CONFIG_SP
Hi
On 9/12/22 17:40, Patrick Delaunay wrote:
> From: Christophe Kerello
>
> Current compatible string used to update SPI NAND and SPI NOR devices
> can lead to a wrong partitions update (for example, SPI NAND partitions
> added to SPI NOR node in the device tree). To avoid this wrong behavior,
>
This patch adds a new documentation for all released CZ.NIC Turris routers.
Signed-off-by: Pali Rohár
---
doc/board/CZ.NIC/index.rst | 9 +
doc/board/CZ.NIC/turris.rst | 323
doc/board/index.rst | 1 +
3 files changed, 333 insertions(+)
create m
Hi Patrick
On 9/21/22 09:53, Patrick DELAUNAY wrote:
> Hi,
>
> On 9/7/22 13:42, Patrick Delaunay wrote:
>> Device tree alignment with Linux kernel v6.0-rc3:
>> - ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp15xx-dkx
>> - ARM: dts: stm32: Add alternate pinmux for RCC pin
>> - AR
Device tree alignment with kernel v6.0-rc4.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
arch/arm/dts/stm32746g-eval.dts | 18 -
arch/arm/dts/stm32f4-pinctrl.dtsi| 2 +-
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 4 +-
arch/arm/dts/
Hi,
On 9/23/22 11:17, Samuel Obuch wrote:
Hi, I tested both versions to be sure, but the results are as can be expected:
1. both __raw_readl/__raw_writel and readl/writel functions work ok on riscv -
only the original nonvolatile accesses were problematic
2. the additional barrier in readl/wri
Hi, using linux/io.h and ioremap works well for us, thanks. I will update
the patch.
S
On Mon, Aug 8, 2022 at 9:44 AM Michal Simek wrote:
> Hi,
>
> On 8/8/22 09:35, Michal Simek wrote:
> >
> >
> > On 8/6/22 19:31, Ramon Fried wrote:
> >> On Wed, Jul 13, 2022 at 5:02 PM Samuel Obuch
> wrote:
>
Hi, I tested both versions to be sure, but the results are as can be
expected:
1. both __raw_readl/__raw_writel and readl/writel functions work ok on
riscv - only the original nonvolatile accesses were problematic
2. the additional barrier in readl/writel functions can introduce
noticeable slowdow
Hi,
On Sun, 18 Sep 2022 18:17:01 +0200, Edoardo Tomelleri wrote:
> Implement setbrg in amlogic/meson serial device with driver model
> similar to how the meson_uart.c driver does it in Linux. Also
> configure (probe) the serial device with the new reg5 register.
>
>
Thanks, Applied to https://s
On 23/09/2022 10:23, Neil Armstrong via groups.io wrote:
Hi,
On 22/09/2022 20:51, Edoardo Tomelleri wrote:
Hello,
Il giorno gio 22 set 2022 alle ore 18:51 Neil Armstrong
ha scritto:
Hi,
Sorry for the delay...
No problem, don't worry
Looks good !
If someone can test it ? otherwise I'll t
Hi,
On 22/09/2022 20:51, Edoardo Tomelleri wrote:
Hello,
Il giorno gio 22 set 2022 alle ore 18:51 Neil Armstrong
ha scritto:
Hi,
Sorry for the delay...
No problem, don't worry
Looks good !
If someone can test it ? otherwise I'll take it for next release.
...does it count if I've tested
On Thu, 15 Sept 2022 at 23:02, Heinrich Schuchardt
wrote:
>
> Fill the media ID in the block IO protocol from the block device descriptor
> of the driver model.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> lib/efi_loader/efi_disk.c | 6 +-
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
To enable semihosting we also need to enable the following
configs in defconfigs:
CONFIG_SEMIHOSTING
CONFIG_SPL_SEMIHOSTING
CONFIG_SEMIHOSTING_SERIAL
CONFIG_SERIAL_PROBE_ALL
CONFIG_SPL_FS_EXT4
CONFIG_SPL_FS_FAT
Signed-off-by: Kautuk Consul
---
configs/qemu-riscv32_defconfig | 4
confi
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv/inclu
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul
---
arch/arm/Kconfig | 46 -
arch/arm/lib/semihosting.c | 181 +---
include/sem
Semihosting is a mechanism that enables code running on
a target to communicate and use the Input/Output
facilities on a host computer that is running a debugger.
This patchset adds support for semihosting in u-boot
for RISCV64 targets.
CHANGES since v4:
- Check arch dependencies for SEMIHOS
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