Hi
Il mer 28 set 2022, 13:42 Roger Quadros ha scritto:
> This fixes the below build error if nand.c is included in
> an SPL build.
>
> /work/u-boot/drivers/mtd/nand/raw/nand.c: In function ‘nand_init_chip’:
> /work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: error: ‘nand_chip’
> undeclared (first
On Thu, 29 Sept 2022 at 00:59, Jassi Brar wrote:
>
> On Wed, Sep 28, 2022 at 1:00 AM Sughosh Ganu wrote:
> >
> > On Tue, 27 Sept 2022 at 21:55, Jassi Brar wrote:
> > >
> > > On Tue, Sep 27, 2022 at 2:14 AM Sughosh Ganu
> > > wrote:
> > > >
> > > > On Mon, 26 Sept 2022 at 20:12, Jassi Brar
>
On 9/26/22 06:56, Ilias Apalodimas wrote:
Hi Sean
On Sat, 17 Sept 2022 at 19:55, Sean Anderson wrote:
On 9/16/22 16:30, Ilias Apalodimas wrote:
Hi Simon,
[...]
Signed-off-by: Ilias Apalodimas
---
lib/smbios.c | 17 +++--
1 file changed, 3 insertions(+), 14 deletions(-)
On 9/28/22 22:36, Simon Glass wrote:
Hi Sean,
On Wed, 28 Sept 2022 at 15:50, Sean Anderson wrote:
On 9/28/22 17:06, Simon Glass wrote:
Hi Sean,
On Wed, 28 Sept 2022 at 11:18, Sean Anderson wrote:
On 9/6/22 22:27, Simon Glass wrote:
It is helpful to test that out-of-memory checks work co
On Wed, Sep 28, 2022 at 04:20:37AM -0600, Simon Glass wrote:
> Hi Marty,
>
> On Thu, 22 Sept 2022 at 00:47, Marty E. Plummer
> wrote:
> >
> > The meat of my problem. rk3399 has the ability to redirect uart2 to
> > sdcard pins. This setup half works; I can push input into the uart, but
> > not se
Hi Christian,
On Wed, 28 Sept 2022 at 18:20, Christian Kohlschütter
wrote:
>
> With CONFIG_DISPLAY_CPUINFO=y and CONFIG_CPU=y, the initcall sequence
> may fail (and therefore hang the boot process) with an -ENODEV (err=-19)
> error code.
>
> This is caused by either cpu_get_current_dev/cpu_get_de
On Wed, 28 Sept 2022 at 18:09, Christian Kohlschütter
wrote:
>
> Currently, device trees can only specify an asset tag for the
> "baseboard" type, not for the "chassis" (system enclosure) type, which
> usually carries the more user-visible asset tag.
>
> Add support for the chassis asset-tag, and
Hi Sean,
On Wed, 28 Sept 2022 at 15:50, Sean Anderson wrote:
>
> On 9/28/22 17:06, Simon Glass wrote:
> > Hi Sean,
> >
> > On Wed, 28 Sept 2022 at 11:18, Sean Anderson wrote:
> >>
> >> On 9/6/22 22:27, Simon Glass wrote:
> >>> It is helpful to test that out-of-memory checks work correctly in cod
On Wed, 28 Sept 2022 at 18:15, Christian Kohlschütter
wrote:
>
> Provide human-readable manufacturer and product names for the
> FriendlyELEC NanoPi R4S.
>
> Enable CONFIG_SYSINFO and CONFIG_SYSINFO_SMBIOS by default.
>
> Signed-off-by: Christian Kohlschütter
> ---
> arch/arm/dts/rk3399-nanopi-r
Hi Takahiro,
On Wed, 28 Sept 2022 at 18:51, AKASHI Takahiro
wrote:
>
> Hi Simon,
>
> On Wed, Sep 28, 2022 at 04:20:56AM -0600, Simon Glass wrote:
> > Hi Takahiro,
> >
> > On Sun, 25 Sept 2022 at 18:17, AKASHI Takahiro
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > On Sun, Sep 25, 2022 at 09:02:17A
Hi Simon,
On Wed, Sep 28, 2022 at 04:20:56AM -0600, Simon Glass wrote:
> Hi Takahiro,
>
> On Sun, 25 Sept 2022 at 18:17, AKASHI Takahiro
> wrote:
> >
> > Hi Simon,
> >
> > On Sun, Sep 25, 2022 at 09:02:17AM -0600, Simon Glass wrote:
> > > At present we have functions called blk_dread(), etc., wh
Hello, I want to define my own default environment, so I have enabled
CONFIG_USE_DEFAULT_ENV_FILE. The next step appears to be setting the path to
the default environment file via CONFIG_DEFAULT_ENV_FILE. My questions are as
follows:
* Am I expected to provide an absolute path to the file,
With CONFIG_DISPLAY_CPUINFO=y and CONFIG_CPU=y, the initcall sequence
may fail (and therefore hang the boot process) with an -ENODEV (err=-19)
error code.
This is caused by either cpu_get_current_dev/cpu_get_desc failing to
return CPU information.
If no CPU information can be obtained, fall-back
Provide human-readable manufacturer and product names for the
FriendlyELEC NanoPi R4S.
Enable CONFIG_SYSINFO and CONFIG_SYSINFO_SMBIOS by default.
Signed-off-by: Christian Kohlschütter
---
arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 22 ++
configs/nanopi-r4s-rk3399_defconfi
Currently, device trees can only specify an asset tag for the
"baseboard" type, not for the "chassis" (system enclosure) type, which
usually carries the more user-visible asset tag.
Add support for the chassis asset-tag, and update the documentation.
Signed-off-by: Christian Kohlschütter
---
do
On 2022/9/28 23:23, Pankaj Raghav wrote:
This line probably got in by mistake as there is no fs_mutex member in
the btrfs_fs_info struct.
Signed-off-by: Pankaj Raghav
Reviewed-by: Qu Wenruo
Thanks,
Qu
---
For UBOOT.
The patch I sent the first time is not showing up in the uboot mailing
On 9/28/22 17:06, Simon Glass wrote:
Hi Sean,
On Wed, 28 Sept 2022 at 11:18, Sean Anderson wrote:
On 9/6/22 22:27, Simon Glass wrote:
It is helpful to test that out-of-memory checks work correctly in code
that calls malloc().
Add a simple way to force failure after a given number of malloc(
Hi Sean,
On Wed, 28 Sept 2022 at 11:18, Sean Anderson wrote:
>
> On 9/6/22 22:27, Simon Glass wrote:
> > It is helpful to test that out-of-memory checks work correctly in code
> > that calls malloc().
> >
> > Add a simple way to force failure after a given number of malloc() calls.
> >
> > Fix a
Fix the MMC env device for boards with eMMC by adding a
board_mmc_get_env_dev override to return the boot device as the
MMC env device.
Signed-off-by: Tim Harvey
---
board/gateworks/gw_ventana/gw_ventana.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/gateworks/gw_ventana/gw_ven
On Wed, Sep 28, 2022 at 12:56 PM Fabio Estevam wrote:
>
> Hi Tim,
>
> On Wed, Sep 28, 2022 at 4:37 PM Tim Harvey wrote:
> >
> > Add MV88E61XX DSA support:
> > - update dt: U-Boot dsa driver requires different device-tree syntax
> >than the linux driver in order to link the dsa ports to the m
Hi Tim,
On Wed, Sep 28, 2022 at 4:37 PM Tim Harvey wrote:
>
> Add MV88E61XX DSA support:
> - update dt: U-Boot dsa driver requires different device-tree syntax
>than the linux driver in order to link the dsa ports to the mdio bus.
Shouldn't the U-Boot dts version (imx6qdl-gw5904-u-boot.dtsi
Add a DSA driver for the MV88E61xx compatible GbE Ethernet switches.
Cc: Marek Behún
Cc: Vladimir Oltean
Signed-off-by: Tim Harvey
Reviewed-by: Vladimir Oltean
---
v4:
- rename to mv88e6xxx
- sort includes alphabetically
- remove dsa term from function names
- reduce indentation level and
Add MV88E61XX DSA support:
- update dt: U-Boot dsa driver requires different device-tree syntax
than the linux driver in order to link the dsa ports to the mdio bus.
- update defconfig
- replace mv88e61xx_hw_reset weak override with board_phy_config support
for mv88e61xx configuration that
Add support for DM_MDIO by registering a UCLASS_MDIO driver and
attempting to use it. This is necessary if wanting to use a DSA
driver for example hanging off of the FEC MAC.
Care is taken to fallback to non DM_MDIO mii bus as several boards define
DM_MDIO without having the proper device-tree con
Remove the unnecessary xmit and recv functions.
Signed-off-by: Tim Harvey
Reviewed-by: Vladimir Oltean
---
v4:
- no changes
v3:
- added Vladimir's rb tag
v2: new patch
---
drivers/net/ksz9477.c | 23 ---
1 file changed, 23 deletions(-)
diff --git a/drivers/net/ksz9477.c b
Allow rcv() and xmit() dsa driver ops to be optional in case a driver
does not care to mangle a packet as in U-Boot only one network port is
enabled at a time and thus no packet mangling is necessary.
Suggested-by: Vladimir Oltean
Signed-off-by: Tim Harvey
Reviewed-by: Vladimir Oltean
---
v4:
Add a function to sanity check a dsa driver having proper ops.
Suggested-by: Vladimir Oltean
Signed-off-by: Tim Harvey
Reviewed-by: Vladimir Oltean
---
v4:
- no changes
v3:
- added Vladimir's rb tag
v2: new patch
---
net/dsa-uclass.c | 17 +
1 file changed, 17 insertions(+)
In order to ensure that a DSA driver probe gets called before
dsa_ops->port_probe move the port_probe of the cpu_port to
a post-probe function.
Signed-off-by: Tim Harvey
Reviewed-by: Ramon Fried
Reviewed-by: Vladimir Oltean
---
v4:
- no changes
v3:
- added Vladimir's rb tag
v2:
- added Ramon
This series adds a DSA driver for the MV88E6xxx based on
drivers/net/phy/mv88e61xx and uses it in the gwventana_gw5904_defconfig.
The hope is that the other three boards that use the MV88E61xx driver
can move to this as well eventually so that we can remove the non-dm
driver and the 4 Kconfig opti
If a DM_MDIO driver is used we need to scan the subnodes as well.
Signed-off-by: Tim Harvey
Signed-off-by: Vladimir Oltean
Reviewed-by: Ramon Fried
---
v4:
- no changes
v3:
- no changes
v2:
- added Ramon's rb tag
---
net/mdio-uclass.c | 4
1 file changed, 4 insertions(+)
diff --git a/
On Wed, Sep 28, 2022 at 1:00 AM Sughosh Ganu wrote:
>
> On Tue, 27 Sept 2022 at 21:55, Jassi Brar wrote:
> >
> > On Tue, Sep 27, 2022 at 2:14 AM Sughosh Ganu
> > wrote:
> > >
> > > On Mon, 26 Sept 2022 at 20:12, Jassi Brar
> > > wrote:
> > > >
> > > > On Mon, Sep 26, 2022 at 5:00 AM Sughosh G
On Tue, Aug 02, 2022 at 07:33:41AM -0400, Tom Rini wrote:
> This platform needs to be converted to use DM_ETH as the deadline is 2
> years passed due. Disable networking support for now.
Oh well, my bad. There are too many patches accumulated.
Please see bellow for original version for reference
This line probably got in by mistake as there is no fs_mutex member in
the btrfs_fs_info struct.
Signed-off-by: Pankaj Raghav
---
For UBOOT.
The patch I sent the first time is not showing up in the uboot mailing list
because of the missing approval. So, resending the patch.
fs/btrfs/disk-io.c |
Hello Gaurav,
> -Original Message-
> From: U-Boot On Behalf Of Gaurav Jain
> Sent: Wednesday, September 28, 2022 12:40 PM
> To: u-boot@lists.denx.de; Stefano Babic
> Cc: Fabio Estevam ; Peng Fan ; Ye Li
> ; NXP i . MX U-Boot Team ; Horia Geanta
> ; Varun Sethi ; Gaurav Jain
>
> Subject:
On 8/29/22 05:11, Julien Masson wrote:
According to clk_ops struct definition, the callback `get_rate()`
return current clock rate value as ulong.
`clk_get_rate()` should handle the clock rate returned as ulong also.
Otherwise we may have invalid/truncated clock rate value returned by
`clk_get_r
On 5/31/22 12:09, Etienne Carriere wrote:
Update SCMI clock driver to get its assigned SCMI channel during
initialization. This change allows SCMI clock protocol to use a
dedicated channel when defined in the DT. The reference is saved
in SCMI clock driver private data.
Cc: Lukasz Majewski
Cc:
On 9/6/22 22:27, Simon Glass wrote:
It is helpful to test that out-of-memory checks work correctly in code
that calls malloc().
Add a simple way to force failure after a given number of malloc() calls.
Fix a header guard to avoid a build error on sandbox_vpl.
Signed-off-by: Simon Glass
---
(
On 9/18/22 08:17, Jit Loon Lim wrote:
From: Siew Chin Lim
Add clock manager driver for Diamond Mesa. Provides clock
initialization and get_rate functions.
It appears that you are doing a static configuration of the
clocks (with no provision for later modifying clocks). Can
you add some commen
On 9/27/22 04:45, Jim Liu wrote:
Add clock controller driver for NPCM845
Signed-off-by: Jim Liu
---
drivers/clk/nuvoton/Makefile | 1 +
drivers/clk/nuvoton/clk_npcm8xx.c | 98 +++
2 files changed, 99 insertions(+)
create mode 100644 drivers/clk/nuvoton/cl
With sf update fixed to support unaligned start offset, use plain
sf update to update the bootloader in SPI NOR. This also helps
avoid the case where not enough SPI NOR has been erased and the
bootloader has been written to unerased area, and thus corrupted.
Signed-off-by: Marek Vasut
---
Cc: Fab
Currently the 'sf update' command fails in case the 'start' offset is
not aligned to SPI NOR erase block size. Add the missing alignment
calculation. In case the start offset is in the middle of erase block,
round start address down to the nearest aligned one, compare only the
updated data between
On 9/28/22 04:45, Dario Binacchi wrote:
Add missing stub for functions [devm_]clk_...() when CONFIG_CLK is
deactivated.
Signed-off-by: Dario Binacchi
---
include/clk.h | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/include/clk.h b/includ
Hi Roger,
On Wed, 28 Sept 2022 at 06:12, Roger Quadros wrote:
>
> We will need ti-gpmc driver for SPL. Allow memory drivers
> do be built for SPL.
>
> Signed-off-by: Roger Quadros
> ---
> scripts/Makefile.spl | 1 +
> 1 file changed, 1 insertion(+)
Please can you use the existing drivers/ram d
Hi,
On Wed, 28 Sept 2022 at 01:24, AKASHI Takahiro
wrote:
>
> On Wed, Sep 28, 2022 at 08:57:43AM +0200, Heinrich Schuchardt wrote:
> >
> >
> > On 9/28/22 03:54, Simon Glass wrote:
> > > Hi,
> > >
> > > On Tue, 27 Sept 2022 at 00:53, Heinrich Schuchardt
> > > wrote:
> > > >
> > > >
> > > >
> > >
On Wed, 28 Sept 2022 at 04:38, Michal Suchanek wrote:
>
> All functions getting and setting clock rate use ulong for rate, only
> clk_get_parent_rate is an exception. Change the return value to match
> other clock rate funcrions.
>
> Most users directly assign the rate to unsigned long anyway, and
On 9/28/22 06:37, Michal Suchanek wrote:
All functions getting and setting clock rate use ulong for rate, only
clk_get_parent_rate is an exception. Change the return value to match
other clock rate funcrions.
Most users directly assign the rate to unsigned long anyway, and the few
users that use
The btrfs filesystem provides advanced functionality like copy-on-write
and snapshots, as well as metadata and data duplication and checksumming.
Enable btrfs in U-Boot to permit even the primary partition to be btrfs
and let system boot from it.
Signed-off-by: Marek Vasut
---
Cc: Fabio Estevam
On Wed, 28 Sep 2022, Michal Suchánek wrote:
> On Wed, Sep 28, 2022 at 10:26:35AM +0100, Lee Jones wrote:
> > On Fri, 09 Sep 2022, Kever Yang wrote:
> >
> > > Hi Lee Jones,
> > >
> > > On 2022/9/8 15:44, Lee Jones wrote:
> > > > On Thu, 11 Aug 2022, Lee Jones wrote:
> > > >
> > > > > This set fi
Hi Etienne,
On Wed, Sep 28, 2022 at 2:30 AM Etienne Carriere
wrote:
> Hello Jassi, Sughosh and all,
>
> >>> But a malicious user may force some old vulnerable image back into use
> >>> by updating all but that image.
>
> When the system boots with accepted images (referring to fwu-mdata
> regul
On Wed, Sep 28, 2022 at 10:26:35AM +0100, Lee Jones wrote:
> On Fri, 09 Sep 2022, Kever Yang wrote:
>
> > Hi Lee Jones,
> >
> > On 2022/9/8 15:44, Lee Jones wrote:
> > > On Thu, 11 Aug 2022, Lee Jones wrote:
> > >
> > > > This set fixes several issues found on the Rock Pi 4.
> > > >
> > > > For
Partial sync of rk3288.dtsi from Linux version 5.18
Changed:
only properties and functions that are not yet included
swap some clocks positions
fix some irq numbers
style and sort nodes
Signed-off-by: Johan Jonker
---
Changed V2:
rebase
---
arch/arm/dts/rk3288-veyron-jerry.dts | 6
In order to better compare the Linux rk3288.dtsi version
with the u-boot version update the cpu and gpu nodes.
Changed:
use operating-points-v2
update thermal for all cpus
add labels to all cpus
change gpu compatible
change gpu interrupt names
Signed-off-by: Johan Jonker
Reviewed-by: K
In order to better compare the Linux rk3288.dtsi version
with the u-boot version move thermal sub nodes to the dtsi
file and remove rk3288-thermal.dtsi
Changed:
replace underscore in nodename
remove comments about sensor and ID
use gpu phandle
add #cooling-cells to gpu node
lower critica
Hi Alice,
On Wed, Sep 28, 2022 at 4:52 AM Alice Guo (OSS) wrote:
> Hi Fabio,
>
> Thanks for your reply. When compiling without "#include ", the
> following error will appear:
> In file included from ./arch/arm/include/asm/gpio.h:2,
> from drivers/gpio/adp5585_gpio.c:10:
> ./arc
Hi,
There's no kernel rk3128.dtsi
Submitting can better be done by someone with hardware.
There are known hardware boards:
rk3128-evb
Firefly-RK3128
For the rk3128-evb I might produce something, but someone from Rockchip has to
give a "Tested-by:" and a quick respons if changes needed or submit
Hi Johan,
I think it would be good to sync to kernel dts as you have done for
other SoCs,
but not only change the dts separately,
Thansk,
- Kever
On 2022/9/10 04:19, Johan Jonker wrote:
The rk3128 DT node names should be generic.
Rename them to the pattern defined in the DT bindings.
On 2022/9/10 04:18, Johan Jonker wrote:
Bulk convert rk3128 DT gpios to their constant counterparts.
sed -i -f script.sed rk3128.dtsi
sed -i -f script.sed rk3128-evb.dts
/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend
On 2022/8/18 22:52, Jagan Teki wrote:
Edge Compute Module 0 Carrier is an industrial form factor evaluation
board from Edgeble AI.
General features:
- microSD slot
- 2x MIPI CSI2 connectors
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
On 2022/8/18 22:52, Jagan Teki wrote:
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.
Both eMMC and SD boot are tested in Edge Compute Module 0.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
arch/arm/
Hi Jagan,
On 2022/8/18 22:52, Jagan Teki wrote:
Edge Compute Module 0 Carrier is an industrial form factor evaluation
board from Edgeble AI.
General features:
- microSD slot
- 2x MIPI CSI2 connectors
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, R
Hi Jagan,
On 2022/8/18 22:52, Jagan Teki wrote:
Edge Compute Module 0 is a 96boards SoM-CB compute module based
on Rockchip RV1126 from Edgeble AI.
General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 16GB eMMC
- Fn-link 8223A-SR WiFi/BT
Edge Compute Module 0 needs to mount on top of Edgeble A
On 2022/8/18 22:52, Jagan Teki wrote:
Add support for rv1126 package header in mkimage tool.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcom
Hi Jagan,
This patch should be squash to patch 21/28.
Thanks,
- Kever
On 2022/8/18 22:52, Jagan Teki wrote:
Add common rv1126 include config.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
include/configs/rv1126_common.h | 42 +
1 file changed,
On 2022/8/18 22:52, Jagan Teki wrote:
Unsecure the dram area so that MMC, USB, and SFC controllers
can able to read data from dram.
Signed-off-by: Jason Zhu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- use IS_ENABLED
arch/arm/mach-rockchip/rv
On 2022/8/18 22:52, Jagan Teki wrote:
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.
Add arch core support for it.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
arch/arm/incl
On 2022/8/18 22:52, Jagan Teki wrote:
Add pinctrl definitions for Rockchip RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
arch/arm/dts/rv1126-pinctrl.dtsi | 302 +++
1 file changed, 302 insertions(+)
c
On 2022/8/18 22:52, Jagan Teki wrote:
Add GRF header for Rockchip RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
.../include/asm/arch-rockchip/grf_rv1126.h| 251 ++
1 file changed, 251 insertions(+)
create mod
On 2022/8/18 22:52, Jagan Teki wrote:
Add power-domain header for RV1126 SoC from description in TRM.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- update filename
.../dt-bindings/power/rockchip,rv1126-power.h | 35
On 2022/8/18 22:52, Jagan Teki wrote:
Add clock driver support for Rockchip RV1126 SoC.
Signed-off-by: Joseph Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- update cru header
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchi
On 2022/8/18 22:52, Jagan Teki wrote:
Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.
Signed-off-by: Finley Xiao
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
-
On 2022/8/18 22:52, Jagan Teki wrote:
Add clock and reset unit header include for rv1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
.../include/asm/arch-rockchip/cru_rv1126.h| 459 ++
1 file changed, 459 insertions
On 2022/8/18 22:52, Jagan Teki wrote:
Add pinctrl driver for Rockchip RV1126.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rv1
On 2022/8/18 22:52, Jagan Teki wrote:
Some pins in rockchip are routed via Top GRF and PMU GRF
instead of direct regmap.
Add support to handle all these routing paths so that the
SoC pinctrl drivers will use them accordingly.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by:
On 2022/8/18 22:52, Jagan Teki wrote:
Add LPDDR4 detection timings and support for RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
.../sdram-rv1126-lpddr4-detect-1056.inc | 78 +++
.../sdram-rv1126-lpddr4-detec
On 2022/8/18 22:52, Jagan Teki wrote:
Control the ddr init print messages via RAM_ROCKCHIP_DEBUG
instead of printing by default.
This gives an option to configs to enable these prints or
not.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
On 2022/8/18 22:52, Jagan Teki wrote:
Add DDR loader parameters for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
.../rockchip/sdram-rv1126-loader_params.inc | 198 ++
1 f
On 2022/8/18 22:52, Jagan Teki wrote:
Add DDR3 detection timings for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
.../sdram-rv1126-ddr3-detect-1056.inc | 72 +++
..
On 2022/8/18 22:52, Jagan Teki wrote:
Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2:
- none
.../asm/arch-rockchip/sdram_pctl_px30.h | 100 +-
dr
On 2022/8/18 22:52, Jagan Teki wrote:
High row detection for non-8bit bw requires axi split.
So, update the existing high row detection code in order
to support full bw chips.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes for v2
On 2022/8/18 22:52, Jagan Teki wrote:
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-
Hi Johan,
patch 3/3 of this series is not able to apply, could you please
resend this patch set with rebase?
Thanks,
- Kever
On 2022/9/1 21:06, Kever Yang wrote:
On 2022/7/30 07:48, Johan Jonker wrote:
In order to better compare the Linux rk3288.dtsi version
with the u-boot version m
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based
GPMC stands for General Purpose Memory Controller and it is
present on many Texas Instruments SoCs.
It supports a number of Asynchronous and Synchronous interfaces
and has various settings to configure the bus interface.
The DT bindings define all the various GPMC settings.
As the GPMC supports
We will need ti-gpmc driver for SPL. Allow memory drivers
do be built for SPL.
Signed-off-by: Roger Quadros
---
scripts/Makefile.spl | 1 +
1 file changed, 1 insertion(+)
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 3bafeb4fe9..110076b22f 100644
--- a/scripts/Makefile.spl
+++
Hi,
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GP
Hi
This is not a complete patch, please clean the code and send the
full patch.
Thanks,
- KEver
On 2022/7/27 08:05, h3lmut wrote:
The NanoPi R4S 1GB version (rk3399) doesnt boot up with current u-boot. Armbian
team has done some patches which will work with both versions (1GB and 4GB)
On 2022/9/15 17:14, Quentin Schulz wrote:
From: Quentin Schulz
The offset of the SPL payload on Lion is different than for other
Rockchip devices in that it is stored at offset 256K instead of much
further away in the MMC.
Flashing one binary instead of two at different offsets is much more
Hello,
this patch series fixes the simple uclass iterators to be usable for
iterating uclasses even if some devices fail to probe.
Before this series when a probe error happens an error is returned
without any device pointer, and iteration cannot continue to devices
that happen to be after the fa
This fixes the below build error if nand.c is included in
an SPL build.
/work/u-boot/drivers/mtd/nand/raw/nand.c: In function ‘nand_init_chip’:
/work/u-boot/drivers/mtd/nand/raw/nand.c:82:28: error: ‘nand_chip’ undeclared
(first use in this function)
82 | struct nand_chip *nand = &nand_chip[i
Fixes: bbda2ed584 ("rockchip: clk: pll: add common pll setting funcs")
Signed-off-by: Michal Suchanek
---
drivers/clk/rockchip/clk_pll.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 8d2aaf5b84..09b
Hello,
For info, this patch currently applies on branch 'next'.
It depends on commit 94ccfb78a4d6 ("drivers: tee: optee: discover
OP-TEE services") not yet merged in 'master'.
br,
etienne
On Wed, 28 Sept 2022 at 09:48, Etienne Carriere
wrote:
>
> This change makes OP-TEE to enumerate both stand
modified caam descriptor to support black key blob.
Signed-off-by: Gaurav Jain
---
changes in v2:
- rebase to latest
cmd/blob.c| 12
drivers/crypto/fsl/desc.h | 1 +
drivers/crypto/fsl/fsl_blob.c | 21 +
drivers/crypto/fsl/jobdesc.c | 2
All functions getting and setting clock rate use ulong for rate, only
clk_get_parent_rate is an exception. Change the return value to match
other clock rate funcrions.
Most users directly assign the rate to unsigned long anyway, and the few
users that use u64 (not s64) multiply the rate so they ma
Hi Takahiro,
On Sun, 25 Sept 2022 at 18:17, AKASHI Takahiro
wrote:
>
> Hi Simon,
>
> On Sun, Sep 25, 2022 at 09:02:17AM -0600, Simon Glass wrote:
> > At present we have functions called blk_dread(), etc., which take a
> > struct blk_desc * to refer to the block device. Add some functions which
>
+Marek Vasut
+Tom Rini
On Sun, 25 Sept 2022 at 23:07, Janne Grunau wrote:
>
> On 2022-08-10 21:54:22 +0200, Janne Grunau wrote:
> > Fixes a crash during probing of sd card readers without medium present.
> >
> > Link: https://github.com/AsahiLinux/linux/issues/44
> > Link: https://lists.denx.de/p
Hi Heinrich,
On Mon, 26 Sept 2022 at 00:56, Heinrich Schuchardt wrote:
>
> On 9/25/22 17:02, Simon Glass wrote:
> > At present we normally write tests either in Python or in C. But most
> > Python tests end up doing a lot of checks which would be better done in C.
> > Checks done in C are orders
Hi Heinrich,
On Mon, 26 Sept 2022 at 00:35, Heinrich Schuchardt wrote:
>
> On 9/25/22 17:02, Simon Glass wrote:
> > Binman needs this module to build sandbox_vpl so install it in the
> > before_script and in the world build. The existing pip install is too
> > late for the buildman invocation.
>
On Wed, 21 Sept 2022 at 08:06, Stefan Roese wrote:
>
> This patch migrates the bootstage code from using the boot specific
> timer_get_boot_us() timer function to the common timer_get_us()
> function. This can only be done, also supporting the early boot phase,
> when CONFIG_TIMER_EARLY is enabled
On Sun, 25 Sept 2022 at 07:31, Fabio Estevam wrote:
>
> Hi Michal,
>
> On 25/09/2022 10:28, Michal Suchanek wrote:
>
> > In a couple of places the document says u-boot,pre-reloc but all
> > examples show u-boot,dm-pre-reloc, use the latter consistently.
> >
> > Signed-off-by: Michal Suchanek
>
>
On Thu, 22 Sept 2022 at 00:47, Marty E. Plummer wrote:
>
> Not even used as far as I can see, but still.
>
> Signed-off-by: Marty E. Plummer
> ---
>
> arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass
>
> diff --g
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