On 07/11/22 06:46PM, Gole, Dhruva wrote:
> Hey Pratyush,
>
> On 11/7/2022 4:16 AM, Pratyush Yadav wrote:
> > Hi Dhruva :-)
> >
> > On 25/10/22 11:50AM, Dhruva Gole wrote:
> > > Remove the extra conditions that cause some cases to fail prematurely
> > > like if the data number of bytes is odd.
Heinrich reports that on RISC-V unaligned access is emulated by OpenSBI
which is very slow. Performance wise it's better if we skip the calls
to u16_strdup() -- which in turn calls u16_strsize() and just allocate/copy the
memory directly. The access to dp.length may still be unaligned, but
On 11/11/2022 17:57, Rafał Miłecki wrote:
On 17.10.2022 09:17, Rafał Miłecki wrote:
From: Rafał Miłecki
Broadcom uses U-Boot for a lot of their bcmbca familiy chipsets. They
decided to store U-Boot environment data inside U-Boot partition and to
use a custom header (with "uEnv" magic and
On 17.10.2022 09:17, Rafał Miłecki wrote:
From: Rafał Miłecki
Broadcom uses U-Boot for a lot of their bcmbca familiy chipsets. They
decided to store U-Boot environment data inside U-Boot partition and to
use a custom header (with "uEnv" magic and env data length).
Add support for Broadcom's
On Fri, Nov 11, 2022 at 2:40 PM Fabio Estevam wrote:
> I removed SPL support, which does not seems to be needed as the scufw
> handles DDR init.
>
> I don't have access to an imx8qm/qxp board here.
>
> Could you try removing SPL support from your board and see if it boots
> with binman support?
Hi Oliver,
On Fri, Nov 11, 2022 at 9:54 AM Oliver Graute wrote:
> imx8mm_evk_defconfig
> apalis-imx8_defconfig
>
> But where is the difference here?
With the change below, the imx8qm_mek_defconfig builds without errors
in the absence of the blobs:
diff --git a/arch/arm/dts/imx8qm-u-boot.dtsi
Hi Abdel,
From: U-Boot on behalf of Abdellatif El Khlifi
Date: Monday, 7 November 2022 at 19:22
To: Abdellatif El Khlifi
Cc: Drew Reed , Achin Gupta ,
ilias.apalodi...@linaro.org ,
jens.wiklan...@linaro.org , nd ,
s...@chromium.org , tr...@konsulko.com ,
u-boot@lists.denx.de , Vishnu
Closing the files uses the EFI protocol and specifically it's .close
callback. This needs to be wrapped on an EFI_CALL()
Signed-off-by: Ilias Apalodimas
---
lib/efi_loader/efi_file.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_file.c
In some situations the GSC firmware where the EEPROM containing the
model and DRAM configuration may not be ready by the time the SoC
is ready to talk to it over I2C.
Instead of a hard delay, poll the I2C lines to wait until they are
released to avoid the I2C drivers 'Arbitation lost' error
Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.
Signed-off-by: Tim Harvey
---
Note this is taken from an upstream Linux commit
---
arch/arm/dts/imx8mm-venice-gw700x.dtsi | 24 +++--
The first patch brings the dts up to date with upstream Linux commits.
The second patch implements polling the I2C lines to wait for the
Gateworks System Controller to be ready before reading the board EEPROM.
Tim Harvey (2):
arm: dts: imx8m*-venice-*: add I2C GPIO bus recovery support
board:
Add gpio pins present on new board revision:
* LTE modem support (imx8mm-gw7902 only)
- lte_pwr#
- lte_rst
- lte_int
* M2 power enable
- m2_pwr_en
* off-board 4.0V supply
- vdd_4p0_en
Signed-off-by: Tim Harvey
---
arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi | 14 ++
With the attached patch, plus (only) the DTSI and defconfig patch from
armbian [1], mainline uboot gets at least as far as the TPL on the Rock
Pi 4B booting from the soldered-down SPI flash.
[1]
On Fri, Nov 11, 2022 at 10:28:43AM -0500, Detlev Casanova wrote:
> On Thursday, October 27, 2022 2:30:51 P.M. EST Tom Rini wrote:
> > On Thu, Oct 27, 2022 at 11:22:52AM -0400, Detlev Casanova wrote:
> > > In commit d0399a46e7cda63c07e3eb8558bef84cfb068028, the device tree was
> > > synchronized
On Thursday, October 27, 2022 2:30:51 P.M. EST Tom Rini wrote:
> On Thu, Oct 27, 2022 at 11:22:52AM -0400, Detlev Casanova wrote:
> > In commit d0399a46e7cda63c07e3eb8558bef84cfb068028, the device tree was
> > synchronized from linux and the aliases were dropped.
> >
> > They need to be kept so
On Mon, Nov 07, 2022 at 07:20:45PM +, Abdellatif El Khlifi wrote:
> Adding support for Arm FF-A v1.0 (Arm Firmware Framework for Armv8-A) [7].
>
> FF-A describes interfaces (ABIs) that standardize communication
> between the Secure World and Normal World. These interfaces enable a pair of
>
On Wed, Nov 09, 2022 at 12:51:26PM +0100, Jens Wiklander wrote:
> On Mon, Nov 07, 2022 at 07:20:48PM +, Abdellatif El Khlifi wrote:
> > Add the core driver implementing Arm Firmware Framework for Armv8-A v1.0
> >
> > The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
> >
On 09/11/22, Fabio Estevam wrote:
> Hi Oliver and Stefano,
>
> On Wed, Nov 9, 2022 at 1:19 PM Oliver Graute wrote:
>
> > For my imx8qm boards I need to manually place these imx firmware blobs with
> > expected names for sucessfull image creation.
> >
> > As I understood the CI creates somes
[...]
> +/**
> + * prepare_signature_list_menu() - create the signature list menu entry
> + *
> + * @efimenu: pointer to the efimenu structure
> + * @varname: pointer to the variable name
> + * @db: pointer to the variable raw data
> + * @db_size: variable data size
> + * @func:
On Fri, 11 Nov 2022 at 14:32, Abdellatif El Khlifi
wrote:
>
> On Tue, Nov 08, 2022 at 03:47:46PM +0200, Ilias Apalodimas wrote:
> > Hi Abdellatif,
> >
> > On Mon, Nov 07, 2022 at 07:20:47PM +, Abdellatif El Khlifi wrote:
> > > convert UUID string to little endian binary data
> > >
> > >
Hello Kojima-san!
[...]
> + file_info.current_path = calloc(1, EFICONFIG_FILE_PATH_BUF_SIZE);
> + if (!file_info.current_path) {
> + ret = EFI_OUT_OF_RESOURCES;
> + goto out;
> + }
> +
> + ret = eficonfig_process_select_file(_info);
> + if (ret !=
On Tue, Nov 08, 2022 at 03:47:46PM +0200, Ilias Apalodimas wrote:
> Hi Abdellatif,
>
> On Mon, Nov 07, 2022 at 07:20:47PM +, Abdellatif El Khlifi wrote:
> > convert UUID string to little endian binary data
> >
> > Signed-off-by: Abdellatif El Khlifi
> > Cc: Tom Rini
> > Cc: Simon Glass
>
Hi,
I have a system issue and I was not able to send out the patch through git-mail.
Because of the system issue, I am sending you the patch directly from my email.
Please find the attached patch.
Regards,
Victor Lim
GigaDevice Semiconductor USA, Inc
From
clrsetbits_le32(>glb_rst_con, 0x3, 0x3);
+
return 0;
}
---
base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3
change-id: 2022-px30-wdt-1-glb-rst-0ce41249727d
Best regards,
--
Quentin Schulz
r a first global reset */
+ clrsetbits_le32(>glb_rst_con, 0x3, 0x3);
+
return 0;
}
---
base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3
change-id: 2022-px30-wdt-1-glb-rst-0ce41249727d
Best regards,
--
Quentin Schulz
Fix the issue where some flash chips like cypress S25HS256T for example
return the value of the same register once a SPI transaction starts. So
for example if read reg of 0x2 is requested and we start reading
registers in DAC mode we start reading 4 byte aligned ie. 0x0, 0x1, 0x2
and then 0x3. In
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