Hi Roger,
I really appreciate the help!
On Thu, May 18, 2023 at 01:55:38PM +0300, Roger Quadros wrote:
> Hi Colin,
>
> On 17/05/2023 22:39, Colin Foster wrote:
> >
> > I swapped in just U-Boot (not the SPL) with your patch, and everything
> > seems to work!
> >
> > The issue of Uncorrectable
From: Fabio Estevam
According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:
sck-gpios, miso-gpios and mosi-gpios.
gpio-sck, gpio-mosi and gpio-miso are considered deprecated.
Update the bindings to suggest the recommeded
From: Fabio Estevam
According to Documentation/devicetree/bindings/spi/spi-gpio.yaml
from Linux, the recommended spio-gpio properties are:
sck-gpios, miso-gpios and mosi-gpios.
gpio-sck, gpio-mosi and gpio-miso are considered deprecated.
Currently, U-Boot only supports the deprecated
On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
> On 5/18/23 10:06, Conor Dooley wrote:
> > On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote:
> >> On Thu, May 18, 2023 at 4:02 PM Andrew Jones
> >> wrote:
> >> > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley
On 2023-05-08 1:20 p.m., Tom Rini wrote:
Here's the latest defect report:
-- Forwarded message -
From:
Date: Mon, May 8, 2023, 2:29 PM
Subject: New Defects reported by Coverity Scan for Das U-Boot
To:
Hi,
Please find the latest report on new defect(s) introduced to Das
Hi Stefan,
On Wed, May 17, 2023 at 1:26 AM Stefan Roese wrote:
>
> Hi Pali,
>
> On 5/17/23 00:30, Pali Rohár wrote:
> > On Tuesday 16 May 2023 14:56:46 Tom Rini wrote:
> >> On Tue, May 16, 2023 at 08:52:23PM +0200, Pali Rohár wrote:
> >>> On Tuesday 16 May 2023 11:36:20 Tom Rini wrote:
> On
On Thu, May 18, 2023 at 05:01:23PM +0200, Marek Vasut wrote:
> The following changes since commit 5d0b3dde115b0d26d414199678983d01b738ad1b:
>
> Merge branch '2023-05-15-build-system-updates' into next (2023-05-15
> 15:26:54 -0400)
>
> are available in the Git repository at:
>
>
From: Sean Edmond
Change VCI string from "U-boot" to "U-Boot".
Signed-off-by: Sean Edmond
---
net/dhcpv6.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/dhcpv6.h b/net/dhcpv6.h
index 80ca520432..65c8e4c71d 100644
--- a/net/dhcpv6.h
+++ b/net/dhcpv6.h
@@ -38,7 +38,7
From: Sean Edmond
CID 453851 : sprintf() shouldn't copy from/to tmp
CID 436278 : DHCP6 option_len should be checked before use
Signed-off-by: Sean Edmond
---
cmd/net.c| 12 ++--
net/dhcpv6.c | 5 +
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/cmd/net.c
From: Sean Edmond
Resolves 2 issues:
- coverity CID 453851 and 436278
- Change DHCP6 VCI string from "U-boot" to "U-Boot" (this was found
by more detailed testing on our end)
Sean Edmond (2):
net: ipv6: Fix CID 453851 and CID 436278
net: dhcp6: Fix VCI string
cmd/net.c| 12
On 5/18/23 10:06, Conor Dooley wrote:
> On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote:
>> On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote:
>> > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote:
>
>> > > - riscv,isa:
>> > > -description:
>> > > - Identifies
From: Ehsan Mohandesi
This series addresses the following.
1. Coverity Issue (CID 450971): Loop boundary variables should be
checked to be within appropriate limits.
2. Making the structure icmp6_ra_prefix_info packed because it
contains network protocol
From: Ehsan Mohandesi
The structure icmp6_ra_prefix_info needs to be packed because it is read
from a network stream.
Signed-off-by: Ehsan Mohandesi
---
include/net6.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/net6.h b/include/net6.h
index beafc05..1e766aa
From: Ehsan Mohandesi
The argument len passed to function process_ra is the length of the IPv6
router advertisement message and needs to be between 0 and MTU because
it is assigned to remaining_option_len and used as a loop variable.
Addresses-Coverity-ID: 450971 ("TAINTED_SCALAR")
On Thu, May 18, 2023 at 07:41:17AM -0700, Palmer Dabbelt wrote:
> On Thu, 18 May 2023 07:06:17 PDT (-0700), Conor Dooley wrote:
> > On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote:
> > > On Thu, May 18, 2023 at 4:02 PM Andrew Jones
> > > wrote:
> > > > On Thu, May 18, 2023 at
On 5/18/23 9:27 AM, Neha Malcom Francis wrote:
From: Kamlesh Gurudasani
AM64x family of SoCs by default will have some level of security
enforcement checking. Enable CONFIG_TI_SECURE_DEVICE by default so all
levels of secure SoCs will boot with binman.
Signed-off-by: Kamlesh Gurudasani
On 5/18/23 9:26 AM, Neha Malcom Francis wrote:
By providing entries in the binman node of the device tree, binman will
be able to find and package board config artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
It will also pick out the R5 SPL and sign it
On 5/18/23 18:39, Jonas Karlman wrote:
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 5 Model B.
Similar to RK3568 the BootRom in RK3588 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.
Use the
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 5 Model B.
Similar to RK3568 the BootRom in RK3588 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.
Use the rksd format and modify the mkimage offset
On 5/17/23 06:23, Heinrich Schuchardt wrote:
> The return value of smh_flen() is written to size and not to ret. But ret
> is checked. We can avoid calling smh_flen() by setting maxsize to LONG_MAX
> if it is not set yet.
>
> Check input parameters.
>
> Fixes: f676b45151c3 ("fs: Add semihosting
The following changes since commit 5d0b3dde115b0d26d414199678983d01b738ad1b:
Merge branch '2023-05-15-build-system-updates' into next (2023-05-15
15:26:54 -0400)
are available in the Git repository at:
git://source.denx.de/u-boot-usb.git next
for you to fetch changes up to
On Thu, 18 May 2023 07:06:17 PDT (-0700), Conor Dooley wrote:
On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote:
On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote:
> On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote:
> > - riscv,isa:
> > -description:
> > -
From: Tom Rini
Now that buildman has a requirements.txt file we need to make use of it.
Signed-off-by: Tom Rini
Reviewed-by: Simon Glass
[n-fran...@ti.com: Adding missing command from .azure-pipelines.yml]
Signed-off-by: Neha Malcom Francis
---
.azure-pipelines.yml | 4
.gitlab-ci.yml
From: Kamlesh Gurudasani
AM64x family of SoCs by default will have some level of security
enforcement checking. Enable CONFIG_TI_SECURE_DEVICE by default so all
levels of secure SoCs will boot with binman.
Signed-off-by: Kamlesh Gurudasani
Signed-off-by: Neha Francis
Signed-off-by: Neha
From: Tom Rini
At this point, buildman requires a few different modules and so we need
a requirements.txt to track what modules are needed.
Cc: Simon Glass
Cc: Neha Malcom Francis
Signed-off-by: Tom Rini
Reviewed-by: Simon Glass
Signed-off-by: Neha Malcom Francis
---
Earlier documentation specified builds for generating bootloader images
using an external TI repository k3-image-gen and core-secdev-k3. Modify
this to using the binman flow so that user understands how to build the
final boot images.
Signed-off-by: Neha Malcom Francis
Reviewed-by: Simon Glass
Since binman is used to package bootloader images for all K3 devices, we
do not have to rely on the earlier methods to package them.
Scripts that were used to generate x509 certificate for tiboot3.bin and
generate tispl.bin, u-boot.img have been removed.
Signed-off-by: Neha Malcom Francis
Support added for HS and GP boot binaries for AM62ax.
tiboot3.bin, tispl.bin and u-boot.img: For HS-SE devices
tiboot3.bin_fs, tispl.bin and u-boot.img: For HS-FS devices
tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed
Move to using binman to generate tispl.bin which is used to generate the
final flash.bin bootloader for iot2050 boards.
Signed-off-by: Neha Malcom Francis
Cc: Jan Kiszka
---
arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 76 +++-
1 file changed, 74 insertions(+), 2 deletions(-)
Added YAML configs for AM62ax
Signed-off-by: Neha Malcom Francis
---
board/ti/am62ax/board-cfg.yaml | 36 +
board/ti/am62ax/pm-cfg.yaml| 12 +
board/ti/am62ax/rm-cfg.yaml| 1151
board/ti/am62ax/sec-cfg.yaml | 375 +++
4 files changed, 1574
Support added for HS and GP boot binaries for AM62
tiboot3.bin, tispl.bin and u-boot.img: For HS-SE devices
tiboot3.bin_fs, tispl.bin and u-boot.img: For HS-FS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by
Added YAML configs for AM62
Signed-off-by: Neha Malcom Francis
---
board/ti/am62x/board-cfg.yaml | 36 ++
board/ti/am62x/pm-cfg.yaml| 12 +
board/ti/am62x/rm-cfg.yaml| 1088 +
board/ti/am62x/sec-cfg.yaml | 375
4 files changed, 1511
Added YAML configs for J721S2
Signed-off-by: Neha Malcom Francis
---
board/ti/j721s2/board-cfg.yaml | 37 +
board/ti/j721s2/pm-cfg.yaml| 12 +
board/ti/j721s2/rm-cfg.yaml| 2901
board/ti/j721s2/sec-cfg.yaml | 375 +
4 files changed, 3325
Support added for HS and GP boot binaries for J721S2.
tiboot3.bin, tispl.bin and u-boot.img: For HS-SE devices
tiboot3.bin_fs, tispl.bin and u-boot.img: For HS-FS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed by
Added YAML configs for AM64xx
Signed-off-by: Neha Malcom Francis
---
board/ti/am64x/board-cfg.yaml | 37 +
board/ti/am64x/pm-cfg.yaml| 12 +
board/ti/am64x/rm-cfg.yaml| 1400 +
board/ti/am64x/sec-cfg.yaml | 378 +
4 files changed, 1827
Added YAML configs for AM65x
Signed-off-by: Neha Malcom Francis
---
board/ti/am65x/board-cfg.yaml | 36 +
board/ti/am65x/pm-cfg.yaml| 12 +
board/ti/am65x/rm-cfg.yaml| 2068 +
board/ti/am65x/sec-cfg.yaml | 375 ++
4 files changed, 2491
Support added for HS and GP boot binaries for AM64x.
tiboot3.bin, tispl.bin and u-boot.img: For HS-SE devices
tiboot3.bin_fs, tispl.bin and u-boot.img: For HS-FS devices
tiboot3.bin_unsigned, tispl.bin_unsigned, u-boot.img_unsigned: For GP
devices
Note that the bootflow followed by AM64x
Support added for HS and GP boot binaries for AM65x.
tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img: For HS devices
tiboot3.bin_unsigned, sysfw.itb, tispl.bin_unsigned,
u-boot.img_unsigned: For GP devices
Note that the bootflow followed by AM65x requires:
tiboot3.bin:
* R5 SPL
Added YAML configs for J7200
Signed-off-by: Neha Malcom Francis
---
board/ti/j721e/board-cfg_j7200.yaml | 36 +
board/ti/j721e/pm-cfg_j7200.yaml| 12 +
board/ti/j721e/rm-cfg_j7200.yaml| 2065 +++
board/ti/j721e/sec-cfg_j7200.yaml | 378 +
4 files
Support added for HS and GP boot binaries for J7200.
tiboot3.bin, tispl.bin and u-boot.img: For HS-SE devices
tiboot3.bin_fs, tispl.bin and u-boot.img: For HS-FS devices
tiboot3.bin_unsigned, tispl.bin_unsigned and u-boot.img_unsigned: For GP
devices
It is to be noted that the bootflow followed
By providing entries in the binman node of the device tree, binman will
be able to find and package board config artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
It will also pick out the R5 SPL and sign it with the help of TI signing
entry and generate
Board config binary artifacts must be generated to be used by binman to
package sysfw.itb and tiboot3.bin for all K3 devices.
For devices that follow combined flow, these board configuration
binaries must again be packaged into a combined board configuration
blobs to be used by binman to package
The ti-secure entry contains certificate for binaries that will be
loaded or booted by system firmware whereas the ti-secure-rom entry
contains certificate for binaries that will be booted by ROM. Support
for both these types of certificates is necessary for booting of K3
devices.
Signed-off-by:
The ti-board-config entry loads and validates a given YAML config file
against a given schema, and generates the board config binary. K3
devices require these binaries to be packed into the final system
firmware images.
Signed-off-by: Neha Malcom Francis
Reviewed-by: Simon Glass
---
This series aims to eliminate the use of additional custom repositories
such as k3-image-gen (K3 Image Generation) repo and core-secdev-k3 (K3
Security Development Tools) that was plumbed into the U-Boot build flow
to generate boot images for TI K3 platform devices. And instead, we move
towards
On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote:
> On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote:
> > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote:
> > > - riscv,isa:
> > > -description:
> > > - Identifies the specific RISC-V instruction set architecture
On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote:
>
> On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote:
> > intro
> > =
> >
> > When the RISC-V dt-bindings were accepted upstream in Linux, the base
> > ISA etc had yet to be ratified. By the ratification of the base ISA,
> >
Hi Simon,
Thanks,
A Santosh Sagar.
> -Original Message-
> From: Simon Glass
> Sent: Tuesday, April 25, 2023 11:31 PM
> To: Abbarapu, Venkatesh
> Cc: u-boot@lists.denx.de; Simek, Michal ;
> g...@xilinx.com; Algapally, Santosh Sagar
> Subject: Re: [PATCH v3 1/2] serial: zynqmp: Fetch
On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote:
> intro
> =
>
> When the RISC-V dt-bindings were accepted upstream in Linux, the base
> ISA etc had yet to be ratified. By the ratification of the base ISA,
> incompatible changes had snuck into the specifications - for example the
As per [1], dfu_alt_info is mentioned to be as semicolon separated
string of information on each alternate and the parsing logic in
the dfu.c is based on this.
Typically, the dfu_alt_info_* is defined in .h files as preprocessor
macros with 'alt' info separated by semicolon.
But when
On 5/17/23 16:11, Stefan Herbrechtsmeier wrote:
Am 17.05.2023 um 14:12 schrieb Michal Simek:
On 5/16/23 16:05, Stefan Herbrechtsmeier wrote:
From: Stefan Herbrechtsmeier
Move the permission to change a config object message from
zynqmp_pmufw_load_config_object function to
On Thu, May 18, 2023 at 12:31:51PM +0200, Andrew Jones wrote:
> > + # Additional Standard Extensions, sorted by category then alphabetically
>
> Can we just do pure alphabetically? And the single-letter extensions above
> don't have a "sorted by" comment above them. I guess they need one, or
>
Hey Drew,
On Thu, May 18, 2023 at 12:31:51PM +0200, Andrew Jones wrote:
> On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote:
> > - riscv,isa:
> > -description:
> > - Identifies the specific RISC-V instruction set architecture
> > - supported by the hart. These are
Hi Colin,
On 17/05/2023 22:39, Colin Foster wrote:
> Hi Roger,
>
> Thanks for the tests. I attached the files and commented in line... but
> at the bottom of this email I have some findings...
>
> On Wed, May 17, 2023 at 04:30:55PM +0300, Roger Quadros wrote:
>> Hi Colin,
>>
>> I just tested
Hi Kever,
On 2023-05-18 02:41, Kever Yang wrote:
> Hi Jonas,
>
>
> On 2023/5/18 02:26, Jonas Karlman wrote:
>> Add sfc and flash node to device tree and config options to enable
>> support for booting from SPI NOR flash on Radxa ROCK 5 Model B.
>>
>> Signed-off-by: Jonas Karlman
>>
intro
=
When the RISC-V dt-bindings were accepted upstream in Linux, the base
ISA etc had yet to be ratified. By the ratification of the base ISA,
incompatible changes had snuck into the specifications - for example the
Zicsr and Zifencei extensions were spun out of the base ISA.
Fast
K3 GP devices allows booting the secure binaries on them by bypassing
the x509 header on them.
ATF and OPTEE firewalling required the rproc_load to be called before
authentication. This change caused the failure for GP devices that
strips off the headers. The boot vector had been set before the
SPL runs on the L2 LIM, which is 2M in size mapped at 0x800.This
region consists of 16 0x2 sized regions, each one can be used as
either L2 cache way or SRAM (not both).From top to bottom, you have way
0-15.The way 0 is always enabled, so SPL can only use at most 0x1e
bytes of
The per-hart stack,malloc space and global variable 'gd' sits between
__bss_end and L2_LIM_MEM_END.Zeroing this region could overwrite the
hart's stack, and other harts' stacks.If it were to save and restore
`ra` register, then we would crash in function epilogue. Also, we are
having data-races
Hi Stefan,
We haven't seen any instability issue so far on ZynqMP boards and no one
reported any such issue till now.
We are already taking care of card detection stability issue with below
waiting logic.
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/mmc/zynq_sdhci.c#L1161
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