[PATCH v2 2/2] arm64: Enable CONFIG_64BIT for static analysis

In the Makefile there is a line that says this: # the checker needs the correct machine size CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32) Set CONFIG_64BIT for ARM64 so that we pass -m64 to the static checkers instead of -m32. Signed-off-by: Dan Carpenter --- v2: split the patch into tw

[PATCH v2 1/2] Kconfig: move CONFIG_32/64BIT to arch/Kconfig

These configs are used in multiple places so put them in a shared Kconfig file. Signed-off-by: Dan Carpenter --- v2: split the patch into two patches arch/Kconfig | 6 ++ arch/mips/Kconfig | 6 -- arch/riscv/Kconfig | 6 -- 3 files changed, 6 insertions(+), 12 deletions(-) d

[PATCH v2 0/2] arm64: Enable CONFIG_64BIT for static analysis

The makefiles currently pass -m32 to Smatch static checker when I'm building on arm64. Also the arch is set to "arm" and Smatch thinks "arm" is 32 bits and "arm64" is 64 bits. With this patchset we pass -m64 and Smatch works correctly. Changes since v1: Break up the patch into two patches. Dan

Re: [PATCH v3 11/13] Makefile: remove hardcoded device tree source directory

+ Fabio Hi Tom, On Tue, 27 Feb 2024 at 02:49, Bryan Brattlof wrote: > > Some boards that choose to utilize the OF_UPSTREAM directory for their > device tree files will need to specify that directory instead of the > traditional arch/$(ARCH)/dts/* path. > > Include the correct path to the board's

Re: [PATCH v6 00/11] An effort to bring DT bindings compliance within U-Boot

Hi Fabio, On Fri, 1 Mar 2024 at 22:20, Fabio Estevam wrote: > > Hi Sumit, > > On Fri, Mar 1, 2024 at 9:57 AM Tom Rini wrote: > > > > On Thu, 22 Feb 2024 15:05:56 +0530, Sumit Garg wrote: > > > > > Changes in v6: > > > -- > > > - v6_dt: https://github.com/b49020/u-boot/tree/v6_dt > >

Re: 回覆: [PATCH] net: phy: ncsi: Correct the endian of the checksum

On Sun, Mar 03, 2024 at 02:14:43AM +, Jacky Chou wrote: > Hi Dan Carpenter, > > I have verified it on the little-endian platform, such as ASPEED AST2600. Awesome. Thanks for this. > I think put_unaligned_be32() and htonl() functions have no effect on > big-endian platforms. > And keep put_

[PATCH] efi_loader: accept append write with valid size and data

Current "variables" efi_selftest result is inconsistent between the U-Boot file storage and the tee-based StandaloneMM RPMB secure storage. U-Boot file storage implementation does not accept SetVariale call to non-existent variable with EFI_VARIABLE_APPEND_WRITE attribute and valid size and data, h

Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL

Hi Wadim, On 26/02/24 19:00, Wadim Egorov wrote: > Texas Instruments has begun enabling security settings on the SoCs it > produces to instruct ROM and TIFS to begin protecting the Security > Management Subsystem (SMS) from other binaries we load into the chip by > default. > > One way ROM and TI

[PATCH v11 7/8] spi: Add the spi advance options for non SPL

Adding the config option SPI_ADVANCE for non SPL code. Signed-off-by: Venkatesh Yadav Abbarapu --- drivers/spi/Kconfig | 7 +++ drivers/spi/spi-uclass.c | 3 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 69b184b0d9..e56

[PATCH v11 8/8] config: xea: Enable the SPI_ADVANCE config option

Disable the config SPI_ADVANCE, as getting the below error ../arm-xilinx-linux-gnueabi-ld.bfd.real: drivers/core/ofnode.o: in function `ofnode_get_property': /u-boot/drivers/core/ofnode.c:1185: undefined reference to `fdt_getprop' make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1 Sig

[PATCH v11 6/8] spi: zynq_qspi: Add parallel memories support in QSPI driver

Add support for parallel memories in zynq_qspi.c driver. In case of parallel memories STRIPE bit is set and sent to the qspi ip, which will send data bits to both the flashes in parallel. However for few commands we should not use stripe, instead send same data to both the flashes. Those commands a

[PATCH v11 3/8] mtd: spi-nor: Add parallel and stacked memories support in read_bar and write_bar

From: Ashok Reddy Soma Add support for parallel memories and stacked memories configuration in read_bar and write_bar functions. Signed-off-by: Ashok Reddy Soma Signed-off-by: Venkatesh Yadav Abbarapu --- drivers/mtd/spi/spi-nor-core.c | 55 +- 1 file changed,

[PATCH v11 5/8] spi: zynqmp_gqspi: Add parallel memories support in GQSPI driver

Add support for parallel memories in zynqmp_gqspi.c driver. In case of parallel memories STRIPE bit is set and sent to the qspi ip, which will send data bits to both the flashes in parallel. However for few commands we should not use stripe, instead send same data to both the flashes. Those command

[PATCH v11 4/8] spi: spi-uclass: Read chipselect and restrict capabilities

From: Ashok Reddy Soma Read chipselect properties from DT which are populated using 'reg' property and save it in plat->cs[] array for later use. Also read multi chipselect capability which is used for parallel-memories and return errors if they are passed on using DT but driver is not capable o

[PATCH v11 2/8] mtd: spi-nor: Add parallel memories support for read_sr and read_fsr

From: Ashok Reddy Soma Add support for parallel memories flash configuration in read status register and read flag status register functions. Signed-off-by: Ashok Reddy Soma Signed-off-by: Venkatesh Yadav Abbarapu --- drivers/mtd/spi/spi-nor-core.c | 50 -- 1 f

[PATCH v11 1/8] mtd: spi-nor: Add parallel and stacked memories support

From: Ashok Reddy Soma In parallel mode, the current implementation assumes that a maximum of two flashes are connected. The QSPI controller splits the data evenly between both the flashes so, both the flashes that are connected in parallel mode should be identical. During each operation SPI-NOR

[PATCH v11 0/8] spi-nor: Add parallel and stacked memories support

This series adds support for Xilinx qspi parallel and stacked memeories. In parallel mode, the current implementation assumes that a maximum of two flashes are connected. The QSPI controller splits the data evenly between both the flashes so, both the flashes that are connected in parallel mode sh

[PATCH v2] arm: dts: armada-37xx: update devicetrees from linux

Update existing armada-37xx DTS files with those in linux v6.8 and add devicetree for ESPRESSObin Ultra device. Signed-off-by: Benjamin Schneider --- Changes in v2: - upstream is missing a patch for PCIe mem arch/arm/dts/armada-3720-db.dts | 6 +- .../arm/dts/armada-3720-espres

Re: [PATCH v3] test/py: reset: Add a test for reset command

Hi Tom, On Tue, Feb 20, 2024 at 01:11:38PM +0530, Love Kumar wrote: Add a test for reset commands which performs resetting of CPU, It does COLD reset by default and WARM reset with -w option. Signed-off-by: Love Kumar Reviewed-by: Tom Rini --- Changes in v2: - Set bootmode through boardenv

Re: [PATCH] fdt: Fix bootm_low handling

Hi Marek, Thank you for the patch. On Sat, Mar 02, 2024 at 11:54:02PM +0100, Marek Vasut wrote: > According to README CFG_SYS_BOOTMAPSZ section, in case both "bootm_low" and > "bootm_size" variables are defined, "bootm_mapsize" variable is not defined > and CFG_SYS_BOOTMAPSZ macro is not defined,

[PATCH] arm: dts: armada-37xx: update devicetrees from linux

Update existing armada-37xx DTS files with those in linux v6.8 and add devicetree for ESPRESSObin Ultra device. Signed-off-by: Benjamin Schneider --- arch/arm/dts/armada-3720-db.dts | 6 +- .../arm/dts/armada-3720-espressobin-ultra.dts | 167 ++ arch/arm/dts/arma

Re: [PATCH 1/2] arm: socfpga: arria10: add option to reprogram the FPGA every reboot

On 2/22/24 09:20, Michał Barnaś wrote: Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10. This option allows to change the bitstream on the filesystem and apply changes with warm reboot without the need for a power cycle. Signed-off-by: Michał Barnaś --- arch/arm/mach

[PATCH v2 2/2] cli: allow users to determine history buffer allocation method

This commit allows users to choose the appropriate memory allocation method between static allocated and dynamically calloc. The previous static-array way will not obviously contribute to the final binary size since it is uninitialized, and might have better performance than the dynamical one. Now

[PATCH v2 1/2] cli: panic when failed to allocate memory for the history buffer

This commit simply modifies the history initialize function, replacing the return value by panic with reasons. The calling chains of hist_init don't have steps explicitly throwing or dealing with the ENOMEM error, and once the init fails, the whole system is died. Using panic here to provide error

Re: [PATCH 1/1] doc: invalid escape sequences in maintainers_include.py

On Sun, Mar 03, 2024 at 02:40:22PM +0100, Heinrich Schuchardt wrote: > Update maintainers_include.py from Linux next-20240202. Is there no better upstream tag/commit to base this from? -- Tom signature.asc Description: PGP signature

[PATCH 1/1] doc: invalid escape sequences in maintainers_include.py

Update maintainers_include.py from Linux next-20240202. Signed-off-by: Heinrich Schuchardt --- doc/sphinx/maintainers_include.py | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/doc/sphinx/maintainers_include.py b/doc/sphinx/maintainers_include.py index dc8fed48d3c

[RFC 5/5] doc: describe Milk-V Mars board

Add instructions to build U-Boot for the Milk-V Mars board Signed-off-by: Heinrich Schuchardt --- doc/board/starfive/index.rst | 1 + doc/board/starfive/milk-v_mars.rst | 93 ++ 2 files changed, 94 insertions(+) create mode 100644 doc/board/starfive/milk-v_mar

[RFC 4/5] riscv: starfive: avoid including common.h

The usage of common.h is deprecated. Remove it from board files. Signed-off-by: Heinrich Schuchardt --- board/starfive/visionfive2/spl.c| 1 - board/starfive/visionfive2/starfive_visionfive2.c | 1 - board/starfive/visionfive2/visionfive2-i2c-eeprom.c | 1 - 3 files changed

[RFC 3/5] board: starfive: support Milk-V Mars board

The differences between the Milk-V Mars board and the VisionFive 2 board are small enough that we can support both using the same U-Boot build. * The model and compatible property are taken from proposed Linux patches. * The EEPROM is atmel,24c02 according to the vendor U-Boot. * The second Ethern

[RFC 2/5] riscv: set fdtfile on Milk-V Mars

Set environment variable fdtfile to the correct value for the Milk-V Mars board. Signed-off-by: Heinrich Schuchardt --- .../visionfive2/starfive_visionfive2.c| 43 +-- 1 file changed, 30 insertions(+), 13 deletions(-) diff --git a/board/starfive/visionfive2/starfive_visi

[RFC 1/5] eeprom: starfive: function get_product_id_from_eeprom()

Export a function get_product_id_from_eeprom() to read the product ID. This value can be used for fixing up the device-tree on JH7110 based products. Signed-off-by: Heinrich Schuchardt --- arch/riscv/include/asm/arch-jh7110/eeprom.h | 9 + board/starfive/visionfive2/visionfive2-i

[RFC 0/5] riscv: add support for Milk-V Mars board

The Milk-V Mars board is technically very close to the StarFive VisionFive 2 board. With this patch series the VisionFive 2 U-Boot SPL will detect that it is runing on a Milk-V board and patch the device-tree accordingly. This is the same approach that has been taken to handle the differences betw

[PATCH v4 RESEND] cmd: add FDT setup for bootelf by flag

From: Maxim Moskalets Added the ability to use FDT for ELF applications, required to run some OS. To make FDT setup, you need to set the -d fdt_addr_r cmd option for bootelf command. Signed-off-by: Maxim Moskalets Cc: Tom Rini --- cmd/elf.c | 27 --- 1 file changed, 2