Set my current personal email in the MAINTAINERS file.
Signed-off-by: Bhupesh Sharma
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 536df4a896..b1f5ae0591 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1597,7 +1597,7 @@ T
On 9/9/23 8:24 AM, Marek Vasut wrote:
The "#include " is being phased out in favor of more fine
grained header management, i.e. ideally include a subset of headers
that are really needed. Remove it from this driver.
Signed-off-by: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Neha Malc
On Thu, 31 Aug 2023 at 19:01, Tom Rini wrote:
>
> On Thu, Aug 31, 2023 at 10:24:07AM +0200, Michal Simek wrote:
> >
> >
> > On 8/30/23 20:52, Tom Rini wrote:
> > > On Tue, Aug 22, 2023 at 01:21:12PM +0530, Bhupesh Sharma wrote:
> > >
> > > >
Right now xhci header file defines XHCI_MAX_HALT_USEC macro
twice. Fix the same.
Cc: Bin Meng
Signed-off-by: Bhupesh Sharma
---
include/usb/xhci.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
index 4a4ac10229..958c94bfa7 100644
--- a/include/usb
On 8/11/23 7:31 PM, Tom Rini wrote:
On Fri, Aug 11, 2023 at 11:12:28AM +0530, Bhupesh Sharma wrote:
> If CONFIG_SYS_ICACHE_OFF and CONFIG_SYS_DCACHE_OFF are set, we see the
> following errors while compiling u-boot:
>
>arch/arm/cpu/armv8/cpu.c:60: undefined reference to `ic
well.
Compile-tested for:
- qemu arm64
- imx8
- stm32
and run-tested on:
- Qualcomm RB3 platform
Cc: Tom Rini
Cc: Simon Glass
Cc: Peng Fan
Signed-off-by: Bhupesh Sharma
---
arch/arm/Kconfig| 2 ++
arch/arm/cpu/armv8/Makefile | 4 ++--
2 files changed, 4 insertions(+), 2 deletions
While 23e20b2fa6 ("arm: stm32mp: Fix compilation issue when
SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled") tried fixing
this issue, fix it really by adding #if checks for SYS_ICACHE_OFF
and SYS_DCACHE_OFF.
Cc: Patrice Chotard
Cc: Patrick Delaunay
Signed-off-by: Bhupesh Sharma
---
an compilation issue for stm32mp when
SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled.
Cc: Patrice Chotard
Cc: Patrick Delaunay
Cc: Tom Rini
Cc: Simon Glass
Cc: Peng Fan
Bhupesh Sharma (2):
arm: stm32mp: Really fix compilation issue when SYS_DCACHE_OFF and/or
SYS_DCACHE_SYS are enabled
: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Faiz Abbas
---
V2: No change
---
drivers/ufs/ufs.c | 42 +-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 041caee714f..7c48d57f99d 100644
--- a/drivers/ufs
On 8/16/23 8:35 PM, Marek Vasut wrote:
Use utp_transfer_req_desc pointer to reference to utrdl queue
instead of referencing the queue directly. This makes the code
more consistent. No functional change.
Signed-off-by: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Faiz Abbas
---
V2: No change
On 8/16/23 8:35 PM, Marek Vasut wrote:
Pass the hba pointer itself to ufshcd_prepare_req_desc_hdr()
instead of duplicating utp_transfer_req_desc access at each
call site. No functional change.
Signed-off-by: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Faiz Abbas
---
V2: No change
---
drivers
On 8/16/23 8:35 PM, Marek Vasut wrote:
Extend the version check to handle UFS 3.0 controllers as well.
Tested on R-Car S4 UFS 3.0 controller.
Signed-off-by: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Faiz Abbas
---
V2: No change
---
drivers/ufs/ufs.c | 3 ++-
drivers/ufs/ufs.h | 1 +
2
-by: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Faiz Abbas
---
V2: Use BIT() macro
---
drivers/ufs/ufs.c | 9 +++--
drivers/ufs/ufs.h | 6 ++
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index da0550d98c6..261ae2843c2 100644
--- a/d
on U-Boot generic bounce buffer.
Signed-off-by: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Faiz Abbas
---
V2: Use BIT() macro
---
drivers/ufs/ufs.c | 26 ++
drivers/ufs/ufs.h | 6 ++
2 files changed, 32 insertions(+)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/u
On 8/16/23 8:35 PM, Marek Vasut wrote:
Use BIT() macro for quirks, no functional change.
Signed-off-by: Marek Vasut
---
Cc: Bhupesh Sharma
Cc: Faiz Abbas
---
V2: New patch
---
drivers/ufs/ufs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ufs/ufs.h b/drivers
On Thu, 17 Aug 2023 at 17:42, Neha Malcom Francis wrote:
>
> Hi all,
>
> On 17/08/23 17:03, Nishanth Menon wrote:
> > On 15:40-20230817, Bhupesh Sharma wrote:
> >> Hi Neha,
> >>
> >> On Thu, 17 Aug 2023 at 10:26, Neha Malcom Francis wrote:
> >&g
On Thu, 17 Aug 2023 at 17:04, Nishanth Menon wrote:
>
> On 15:40-20230817, Bhupesh Sharma wrote:
> > Hi Neha,
> >
> > On Thu, 17 Aug 2023 at 10:26, Neha Malcom Francis wrote:
> > >
> > > Hi Bhupesh, Marek
> > >
> > > On 16/08/23 02:16,
Hi Neha,
On Thu, 17 Aug 2023 at 10:26, Neha Malcom Francis wrote:
>
> Hi Bhupesh, Marek
>
> On 16/08/23 02:16, Marek Vasut wrote:
> > On 8/15/23 19:48, Bhupesh Sharma wrote:
> >> On Tue, 15 Aug 2023 at 04:01, Marek Vasut wrote:
> >>>
> >>> O
On Wed, 16 Aug 2023 at 03:10, Marek Vasut wrote:
>
> On 8/15/23 23:08, Bhupesh Sharma wrote:
> > On Wed, 16 Aug 2023 at 02:31, Marek Vasut wrote:
> >>
> >> On 8/15/23 22:04, Bhupesh Sharma wrote:
> >>> Hi Marek,
> >>>
&
On Wed, 16 Aug 2023 at 02:31, Marek Vasut wrote:
>
> On 8/15/23 22:04, Bhupesh Sharma wrote:
> > Hi Marek,
> >
> > On 8/14/23 5:22 AM, Marek Vasut wrote:
> >> Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for host controllers which do not
> >> support 64-bit addr
On Wed, 16 Aug 2023 at 02:31, Marek Vasut wrote:
>
> On 8/15/23 19:14, Bhupesh Sharma wrote:
> > On Mon, 14 Aug 2023 at 05:23, Marek Vasut
> > wrote:
> >>
> >> Extend the version check to handle UFS 3.0 controllers as well.
> >> Tested on R-Car S
Hi Marek,
On 8/14/23 5:22 AM, Marek Vasut wrote:
Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for host controllers which do not
support 64-bit addressing.
Ported from Linux kernel commit
6554400d6f66 ("scsi: ufs: core: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS")
with ufs_scsi_buffer_aligned() based on U-B
ba, &upiu_flags, pccb->dma_dir);
ufshcd_prepare_utp_scsi_cmd_upiu(hba, pccb, upiu_flags);
prepare_prdt_table(hba, pccb);
Reviewed-and-Tested-by: Bhupesh Sharma
Thanks.
p_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
LGTM, so:
Reviewed-and-Tested-by: Bhupesh Sharma
Thanks.
t_desc(&prd_table[table_length - i - 1], buf, datalen - 1);
req_desc->prd_table_length = table_length;
+ ufshcd_cache_flush_and_invalidate(prd_table, sizeof(*prd_table) *
table_length);
+ ufshcd_cache_flush_and_invalidate(req_desc, sizeof(*req_desc));
}
static int ufs_scsi_exec(struct udevice *scsi_dev, struct scsi_cmd *pccb)
LGTM, so:
Reviewed-and-Tested-by: Bhupesh Sharma
Thanks.
On Tue, 15 Aug 2023 at 04:01, Marek Vasut wrote:
>
> On 8/14/23 23:54, Bhupesh Sharma wrote:
> > Since Faiz Abbas's email ID is no longer valid,
> > drop him from UFS Maintainer list.
> >
> > Since I am using the UFS framework now extensively
> > on Qual
On Tue, 15 Aug 2023 at 04:03, Marek Vasut wrote:
>
> On 8/14/23 23:54, Bhupesh Sharma wrote:
> > This patchset enables the UFS controller on DragonBoard845c
> > board which houses Qualcomm SDM845 Snapdragon SoC.
> >
> > In addition to enabling the UFS HC and UFS QMP
On Mon, 14 Aug 2023 at 05:23, Marek Vasut
wrote:
>
> Extend the version check to handle UFS 3.0 controllers as well.
> Tested on R-Car S4 UFS 3.0 controller.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Faiz Abbas
> ---
> drivers/ufs/ufs.c | 3 ++-
> drivers/ufs/ufs.h | 1 +
> 2 files changed, 3
Signed-off-by: Bhupesh Sharma
---
configs/dragonboard845c_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/dragonboard845c_defconfig
b/configs/dragonboard845c_defconfig
index e2676a37b5..0dd5ce6159 100644
--- a/configs/dragonboard845c_defconfig
+++ b/configs
ff-by: Bhupesh Sharma
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2db052961b..3b2acb5167 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1584,7 +1584,7 @@ T:git
https://source.denx.de/u-boot/custodians/u-boot-ubi.g
Signed-off-by: Bhupesh Sharma
---
configs/dragonboard845c_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/dragonboard845c_defconfig
b/configs/dragonboard845c_defconfig
index a69d82761a..e2676a37b5 100644
--- a/configs/dragonboard845c_defconfig
+++ b/configs
Add UFS HC and PHY nodes in Qualcomm SDM845 dtsi.
Signed-off-by: Bhupesh Sharma
---
arch/arm/dts/sdm845.dtsi | 62
1 file changed, 62 insertions(+)
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi
index 056a1674d5..9ef41e3c84 100644
Add 'reset' controller node in Qualcomm SDM845 dtsi.
Signed-off-by: Bhupesh Sharma
---
arch/arm/dts/sdm845.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi
index 3b86b9328f..056a1674d5 100644
--- a/arch/arm/dts/sdm845.
Add Support for the Host Controller driver for UFS HC
present on Qualcomm Snapdragon SoCs.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/Kconfig | 7 +
drivers/ufs/Makefile | 1 +
drivers/ufs/qcom-ufshcd.c | 880 ++
drivers/ufs/ufs-qcom.h
Minor typo fix and rewording of printf message
inside 'ufs_start' which announces the availability
of the UFS device.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index
Add missing wmb() and mb() barriers in the u-boot UFS core
framework driver to allow registers updates to happen before
follow-up read operations.
This makes the barrier placement similar to the Linux UFS driver.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.c | 11 +++
1 file
Sync u-boot UFS driver to add all possible UFS Quirks
as supported by Linux UFS driver as well.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.h | 129 +++---
1 file changed, 121 insertions(+), 8 deletions(-)
diff --git a/drivers/ufs/ufs.h b/drivers
Add more verbose debug capabilities and vops to allow dumping
UFS debug registers / regions, similar to how the UFS Linux driver
does it.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.c | 71 +++
drivers/ufs/ufs.h | 9 ++
2 files changed, 80
UFS Host Controllers on Qualcomm Snapdragon SoCs support versions
newer/ greater than UFSHCI_VERSION_21. So, modify the driver
to just print the UFS HC version and not bail-out for newer versions.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.c | 7 +--
1 file changed, 1 insertion(+), 6
Clear UECPA once in u-boot UFS driver due to LINERESET has happened
during LINK_STARTUP. This makes the u-boot ufs driver behavior related
to UECPA similar to Linux UFS driver.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/ufs
Add definition of 'ufshcd_rmwl()' helper function
which would be later used by Qualcomm UFS driver
to read-modify-write registers.
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/ufs/ufs.h b/drivers
Add Qualcomm QMP UFS PHY driver which is available on the following
Snapdragon SoCs - SDM845, SM6115 and SM8250 SoCs.
Signed-off-by: Bhupesh Sharma
---
drivers/phy/qcom/Kconfig| 6 +
drivers/phy/qcom/Makefile | 1 +
drivers/phy/qcom/phy-qcom-qmp-ufs.c | 996
Import SM6115 and SM8250 related clock header files from Linux,
which would be included in the Qualcomm QMP PHY driver.
Signed-off-by: Bhupesh Sharma
---
include/dt-bindings/clock/qcom,gcc-sm6115.h | 201 +++
include/dt-bindings/clock/qcom,gcc-sm8250.h | 271
2
Import Qualcomm QMP phy related header files from Linux.
Signed-off-by: Bhupesh Sharma
---
drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v2.h| 25 ++
drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v3.h| 21 ++
drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v4.h| 31 +++
drivers/phy/qcom/phy-qcom-qmp-pcs
Add support for SDM845 SoC reset table
Signed-off-by: Bhupesh Sharma
---
drivers/reset/reset-qcom.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
index 94315e76d5..0d37305e10 100644
--- a/drivers
->
review, test and fix UFS issues in u-boot framework.
Bhupesh Sharma (17):
reset: qcom: Add support for SDM845 SoC reset table
phy: qcom: Import QMP phy related header files from Linux
dt-bindings: clock: Import SM6115 and SM8250 related clock header
files from Linux
phy: qco
arch/arm/cpu/armv8/cache_v8.c:697:2: error:
#error Please describe your MMU layout in CONFIG_SYS_MEM_MAP and enable
dcache.
the rest of the compilation errors should be fixed.
Cc: Tom Rini
Cc: Simon Glass
Cc: Peng Fan
Signed-off-by: Bhupesh Sharma
---
arch/arm/cpu/armv8/Makefile |
Hi Jonas,
On Mon, 3 Jul 2023 at 01:18, Jonas Karlman wrote:
>
> On 2023-07-02 20:47, Bhupesh Sharma wrote:
> > Since function 'phy_get_counts()' can return NULL,
> > add handling for that error path inside callers of
> > this function.
>
> Do you have
TASK_TAG as 0 inside u-boot ufs framework. So, instead we
should use the macro value directly.
[1].
https://github.com/torvalds/linux/blob/master/drivers/ufs/core/ufshcd.c#L2705
Signed-off-by: Bhupesh Sharma
---
drivers/ufs/ufs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Since function 'phy_get_counts()' can return NULL,
add handling for that error path inside callers of
this function.
Signed-off-by: Bhupesh Sharma
---
drivers/phy/phy-uclass.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/phy/phy-uclass.c b/drive
On Tue, 4 Apr 2023 at 02:03, Bhupesh Sharma wrote:
>
> Enable support for HighSpeed QUSB2 PHY transceiver for USB controllers
> on Qualcomm chips.
>
> This patchset adds driver support for the high-speed PHY which is usually
> paired with either the ChipIdea or Synopsys DWC3 U
-off-by: Bhupesh Sharma
---
doc/board/qualcomm/qcs404.rst | 4 ++--
doc/board/qualcomm/sdm845.rst | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/doc/board/qualcomm/qcs404.rst b/doc/board/qualcomm/qcs404.rst
index bbb40b043b..0cb71d97c9 100644
--- a/doc/board/qualcomm
Currently a few 'board/qualcomm/../Makefile' point to incorrect
path of sdm845 board file.
Fix the same.
Signed-off-by: Bhupesh Sharma
---
board/qualcomm/dragonboard845c/Makefile | 2 +-
board/samsung/starqltechn/Makefile | 2 +-
2 files changed, 2 insertions(+), 2 deletion
Signed-off-by: Bhupesh Sharma
---
drivers/phy/qcom/Kconfig | 7 +
drivers/phy/qcom/Makefile | 1 +
drivers/phy/qcom/phy-qcom-qusb2.c | 423 ++
3 files changed, 431 insertions(+)
create mode 100644 drivers/phy/qcom/phy-qcom-qusb2.c
diff --git a/dri
Import phy-qcom-qusb2.h from Linux to allow standard macros to be
used for Qualcomm QUSB2 PHY ids.
Signed-off-by: Bhupesh Sharma
---
include/dt-bindings/phy/phy-qcom-qusb2.h | 37
1 file changed, 37 insertions(+)
create mode 100644 include/dt-bindings/phy/phy-qcom
Enable support for HighSpeed QUSB2 PHY transceiver for USB controllers
on Qualcomm chips.
This patchset adds driver support for the high-speed PHY which is usually
paired with either the ChipIdea or Synopsys DWC3 USB IPs on Qualcomm
Snapdragon SOCs like SM6115 and SDM845.
Bhupesh Sharma (2
.
For detailed build and boot instructions, refer to
doc/board/qualcomm/qrb4210-rb2.rst.
Signed-off-by: Bhupesh Sharma
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/qrb4210-rb2-uboot.dtsi | 24
arch/arm/dts/qrb4210-rb2.dtsi | 120
Currently this pinctrl driver only supports debug UART
specific pin configuration.
Signed-off-by: Bhupesh Sharma
---
arch/arm/mach-snapdragon/Makefile | 1 +
.../arm/mach-snapdragon/pinctrl-qrb4210-rb2.c | 59 +++
arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 1
Signed-off-by: Bhupesh Sharma
---
drivers/reset/reset-qcom.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
index 94315e76d5..046d2c083b 100644
--- a/drivers/reset/reset-qcom.c
+++ b/drivers/reset/reset-qcom.c
Currently the SM6115 clock driver initializes clocks for debug UART only.
Along with this import "qcom,gcc-sm6115.h" header from Linux mainline to
support DT bindings.
Signed-off-by: Bhupesh Sharma
---
arch/arm/mach-snapdragon/Makefile| 1 +
arch/arm/mach-snapdragon/clo
Import qcom,gcc-sm6115.h from Linux to allow standard macros to be
used as clock ids.
Signed-off-by: Bhupesh Sharma
---
include/dt-bindings/clock/qcom,gcc-sm6115.h | 201
1 file changed, 201 insertions(+)
create mode 100644 include/dt-bindings/clock/qcom,gcc-sm6115.h
diff
-of-things/industrial/industrial-automation/qualcomm-robotics-rb2-platform#Overview
Bhupesh Sharma (5):
dt-bindings: clock: Import qcom,gcc-sm6115.h
clocks: qcom: Add clock driver for SM6115 SoC
reset: qcom: Add support for SM6115 SoC reset table
pinctrl: qcom: Add pinctrl driver for SM6115
Hi Konrad,
On Fri, 24 Mar 2023 at 06:10, Konrad Dybcio wrote:
>
> "clocks" is the standard property used in Linux, "clock" seems to be
> an U-Boot invention. Use the one that's more standardized.
>
> Signed-off-by: Konrad Dybcio
> ---
>
> drivers/mmc/msm_sdhci.c | 2 +-
> 1 file changed, 1 inse
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Monday, May 16, 2016 5:51 PM
> On 16.05.16 14:04, Bhupesh Sharma wrote:
> >
> >
> >> -Original Message-
> >> From: Alexander Graf [mailto:ag...@suse.de]
> >> Sent: Monday, May 16, 20
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Monday, May 16, 2016 1:09 PM
> To: Amit Tomer
> Cc: Bhupesh Sharma ; york sun
> ; u-boot@lists.denx.de; Peter Newton
>
> Subject: Re: [U-Boot] [PATCH 5/5] ls2080ardb: Convert to dis
Note that UEFI firmware support is already available on LS2080A-RDB and allows
Booting distributions like CentOS on the same.
Regards,
Bhupesh
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York
> Sun
> Sent: Saturday, May 14, 2016 1:23 AM
> To: Ale
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Yunhui
> Cui
> Sent: Friday, April 08, 2016 3:57 PM
> To: york sun
> Cc: Yunhui Cui; u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH] armv8/ls2080a: configure PMU's PCTBENR to
> enable WDT
>
> From: Yunhui Cui
>
> The SP805-WDT mo
> From: york sun
> Sent: Tuesday, March 01, 2016 11:30 AM
>
> On 02/29/2016 09:20 PM, Bhupesh Sharma wrote:
> >> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Scott
> >> Wood
> >> Sent: Tuesday, March 01, 2016 7:13 AM
> >>
> &
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Scott
> Wood
> Sent: Tuesday, March 01, 2016 7:13 AM
>
> On Tue, 2016-03-01 at 00:08 +, york sun wrote:
> > Sorry for top posting. I am on outlook web access.
> >
> > There may be some limitation on fdt relocation. Without setti
> -Original Message-
> From: Scott Wood [mailto:o...@buserror.net]
> Sent: Saturday, January 23, 2016 1:39 AM
> To: york sun; Zhiqiang Hou; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; mingkai...@freescale.com; Stuart Yoder;
> le...@freescale.com; prabha...@freescale.com;
> bhupesh.
> From: Scott Wood [mailto:o...@buserror.net]
> Sent: Saturday, January 23, 2016 1:48 AM
> On Fri, 2016-01-22 at 20:14 +, Bhupesh Sharma wrote:
> >
> > > -Original Message-
> > > From: Scott Wood [mailto:o...@buserror.net]
> > > Sent: Saturda
> -Original Message-
> From: Scott Wood [mailto:o...@buserror.net]
> Sent: Saturday, January 23, 2016 1:52 AM
> To: york sun; Bhupesh Sharma; Zhiqiang Hou; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; mingkai...@freescale.com; Stuart Yoder;
> le...@fre
.
Signed-off-by: Bhupesh Sharma
---
arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S | 72 +++---
arch/arm/include/asm/arch-fsl-lsch3/config.h | 11
arch/arm/lib/Makefile|1 +
arch/arm/lib/ccn504.S| 61
.
Signed-off-by: Bhupesh Sharma
---
arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S | 72 +++---
arch/arm/include/asm/arch-fsl-lsch3/config.h | 11
arch/arm/lib/Makefile|1 +
arch/arm/lib/ccn504.S| 61
: Bhupesh Sharma
---
Changes from v3:
- Addressed comments from Scott regarding backward branching &
correct masking from A53's MIDR_EL1.
Changes from v2:
- Addressed comments regarding incorrect handling of bl and ret
sequences.
- Reorganized th
This patch adds support for handling 828024 and 826974 erratas
for Cortex-A57 cores present on LS2085A SoC.
Signed-off-by: Bhupesh Sharma
---
include/configs/ls2085a_common.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/ls2085a_common.h b/include/configs
This patch adds support for handling 828024 and 826974 erratas
for Cortex-A57 cores present on LS2085A SoC.
Signed-off-by: Bhupesh Sharma
---
include/configs/ls2085a_common.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/ls2085a_common.h b/include/configs
: Bhupesh Sharma
---
Changes from v2:
- Addressed comments regarding incorrect handling of bl and ret
sequences.
- Reorganized the code to be more readable.
Changes from v1:
- Addressed Yorks' comments about x29 corruption.
arch/arm/cpu/armv8/start.S |
This patch adds support for handling 828024 and 826974 erratas
for Cortex-A57 cores present on LS2085A SoC.
Signed-off-by: Bhupesh Sharma
---
include/configs/ls2085a_common.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/ls2085a_common.h b/include/configs
: Bhupesh Sharma
---
Changes from v1:
- Addressed York's comment about x29 usage and calling the
core errata fxup function before the lowlevel_init function
is called.
arch/arm/cpu/armv8/start.S | 51 ++
arch/arm/includ
This patch adds support for handling 828024 and 826974 erratas
for Cortex-A57 cores present on LS2085A SoC.
Signed-off-by: Bhupesh Sharma
---
include/configs/ls2085a_common.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/ls2085a_common.h b/include/configs
This patch adds basic constructs in the ARMv8 u-boot code
to handle and apply Cortex-A57 specific erratas.
As and example, the framework showcases how erratas 826974 and
828024 can be handled and applied.
Later on this framework can be extended to include other
erratas.
Signed-off-by: Bhupesh
been tested on both ARMv8 foundation model v1 and v2.
Signed-off-by: Bhupesh Sharma
---
drivers/net/smc9.h | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/net/smc9.h b/drivers/net/smc9.h
index 9deee9b..d9135cb 100644
--- a/drivers/net/smc
foundation model.
Tested on ARMv8 foundation model v1 and v2 by running ping/tftp
between the foundation model and the host PC via a bridged network.
Signed-off-by: Bhupesh Sharma
---
To test the ethernet functionality on a ARMv8 foundation model:
- Launch the model with BRIDGED networking option
> -Original Message-
> From: FengHua [mailto:feng...@phytium.com.cn]
> Sent: Sunday, December 01, 2013 7:48 PM
> To: Sharma Bhupesh-B45370
> Cc: 'Bhupesh SHARMA'; 'u-boot@lists.denx.de'; 'tr...@ti.com'; Wood Scott-
> B07421
> Subject:
> -Original Message-
> From: FengHua [mailto:feng...@phytium.com.cn]
> Sent: Friday, November 29, 2013 7:05 PM
> To: Bhupesh SHARMA
> Cc: u-boot@lists.denx.de; Sharma Bhupesh-B45370; tr...@ti.com; Wood
> Scott-B07421
> Subject: Re: Re: [U-Boot] [PATCH v15 07/10
> I do not see your patch in upstream, and I was not aware of your patch
> also.
I don't know why Joe has not pushed this to upstream.
Joe can you please have a look the original patch and let us
know if something is amiss.
Regards,
Bhupesh
> -Original Message-
> From: Xie Shaohui-B2198
There is a patch for VSC8514 support already circulated by Arpit and me :
http://lists.denx.de/pipermail/u-boot/2013-August/161393.html
regards,
Bhupesh
> -Original Message-
> From: u-boot-release-boun...@linux.freescale.net [mailto:u-boot-release-
> boun...@linux.freescale.net] On Behalf
host PC via a bridged network.
Signed-off-by: Bhupesh Sharma
---
This patch is based on the ARMv8 support related patches sent out
by David Feng. The V5 of this patchset from David can be found here:
http://u-boot.10912.n7.nabble.com/PATCH-v5-0-4-arm64-patch-td161939.html
To test the ethernet
915 and drv->mask is 0xff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.
This patch fixes this issue.
Signed-off-by: Bhupesh Sharma
-
From: Arpit Goel
This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.
Signed-off-by: Arpit Goel
Signed-off-by: Bhupesh Sharma
---
drivers/net/phy/vitesse.c | 69 ++-
1 file changed, 68 insertions(
names.
Signed-off-by: Bhupesh Sharma
---
drivers/net/phy/realtek.c | 77 +++
1 file changed, 51 insertions(+), 26 deletions(-)
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index b7e2753..b971456 100644
--- a/drivers/net/phy/real
Hi Wolfgang,
Thanks for your timely inputs.
On Thu, May 2, 2013 at 12:31 PM, Wolfgang Grandegger wrote:
> Hi Bhupesh,
>
> On 05/01/2013 06:17 AM, Bhupesh SHARMA wrote:
> > Hi Wolfgang G. and list,
> >
> > I was looking to do some basic tests on a C_CAN module i
Hi Wolfgang G. and list,
I was looking to do some basic tests on a C_CAN module inside our SOC at
u-boot
level, till the Linux OS is up and working to test basic CAN features.
I couldn't figure out if CAN framework is supported in u-boot and would
really appreciate if
someone can help me out rega
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