: Michal Simek
Cc: Stefan Roese
Cc: Neil Armstrong
Cc: Gregory CLEMENT
Cc: Lars Povlsen
Cc: Horatiu Vultur
Cc: Ryder Lee
Cc: Weijie Gao
Cc: Chunfeng Yun
Cc: GSS_MTK_Uboot_upstream
Cc: Nobuhiro Iwamatsu
Cc: Marek Vasut
Cc: Simon Glass
Cc: Chin-Ting Kuo
Cc: "Cédric Le Goater"
On 10/27/22 08:39, Joel Stanley wrote:
On Wed, 26 Oct 2022 at 13:11, Cédric Le Goater wrote:
This saves ~50K in the resulting u-boot.bin file which is important to
fit in the U-Boot partition defined in the flash layout of upstream Linux.
The downside is we stop testing it builds for
We now have a SPI flash driver. Let's use it.
Signed-off-by: Cédric Le Goater
---
configs/evb-ast2500_defconfig | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 5364b6ac3703..65a7056ebdbf 100644
Loading a kernel image is enough.
Signed-off-by: Cédric Le Goater
---
configs/evb-ast2500_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index ad0feeb71df5..8646e6944803 100644
--- a/configs/evb
Signed-off-by: Cédric Le Goater
---
configs/evb-ast2500_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 8646e6944803..5364b6ac3703 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
This saves ~50K in the resulting u-boot.bin file which is important to
fit in the U-Boot partition defined in the flash layout of upstream Linux.
Signed-off-by: Cédric Le Goater
---
configs/evb-ast2500_defconfig | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/configs
.
Thanks,
C.
Cédric Le Goater (4):
configs: evb-ast2500: Remove MMC support from default settings
configs: evb-ast2500: Adjust boot command
configs: evb-ast2500: Add support for FIT format
configs: evb-ast2500: Set environment in SPI flash
configs/evb-ast2500_defconfig | 13
: Cédric Le Goater
---
v4: split out cmd addition into a separate patch
v3:
- Fix compilation. There were no configs that enabled the NCSI phy code
so it had bitrotted
- Use NCSI_PHY instead of CMD_NCSI so NCSI can work without the command
- Add phy_interface_is_ncsi() helper, thanks Cédric
On 8/8/22 14:16, Joel Stanley wrote:
From: Samuel Mendoza-Jonas
Adds an "ncsi" command to manually start NC-SI configuration.
Signed-off-by: Samuel Mendoza-Jonas
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
---
v4: New patch, split from patch 1
cmd/ne
On 7/8/22 21:03, Jae Hyun Yoo wrote:
Add Winbond w25q512nwq/n and w25q512nwm support.
datasheet:
https://www.winbond.com/resource-files/W25Q512NW%20RevB%2007192021.pdf
Signed-off-by: Jae Hyun Yoo
Reviewed-by: Cédric Le Goater
---
Changes in v2:
* Changed name from w25q512nwiq and
On 7/8/22 07:42, Chin-Ting Kuo wrote:
Hi Joel,
-Original Message-
From: Joel Stanley
Sent: Thursday, July 7, 2022 1:37 PM
Subject: Re: [v4 03/12] spi: aspeed: Add ASPEED SPI controller driver
Hi Chin-Ting,
On Tue, 24 May 2022 at 05:58, Chin-Ting Kuo
wrote:
Add ASPEED BMC FMC/SPI m
Hello Chin-Ting,
On 7/3/22 10:47, Chin-Ting Kuo wrote:
Hi Cédric,
Thanks for the review.
-Original Message-
From: Cédric Le Goater
Sent: Friday, July 1, 2022 5:28 PM
To: Chin-Ting Kuo ; ChiaWei Wang
; lu...@denx.de; sean...@gmail.com;
Ryan Chen ; BMC-SW
; ja...@amarulasolutions.com
: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
configs/evb-ast2500_defconfig | 2 ++
configs/evb-ast2600_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 9d2c4f81c5ad..866732117aa7 100644
--- a
Signed-off-by: Samuel Mendoza-Jonas
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
v3:
- Fix compilation. There were no configs that enabled the NCSI phy code
so it had bitrotted
- Use NCSI_PHY instead of CMD_NCSI so NCSI can work without the comma
property exists. If set then normal mdio setup is
skipped in favour of the NC-SI phy.
Signed-off-by: Samuel Mendoza-Jonas
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
v3:
- Simplify ncsi enable by re-using pdata->phy_interface parsing.
use-ncsi st
[ Adding Joel ]
On 7/3/22 11:00, Chin-Ting Kuo wrote:
Hi Cédric,
-Original Message-
From: Cédric Le Goater
Sent: Friday, July 1, 2022 7:51 PM
Subject: Re: [v4 04/12] configs: aspeed: Enable SPI flash features
On 7/1/22 11:28, Cédric Le Goater wrote:
On 5/24/22 07:56, Chin-Ting Kuo
On 7/1/22 11:28, Cédric Le Goater wrote:
On 5/24/22 07:56, Chin-Ting Kuo wrote:
- Enable ASPEED SPI controller driver.
- Enable SPI flash memory configurations.
- Enable configurations for SPI flash manufacturers
supported on both ASPEED AST2500 and AST2600 AVL.
Signed-off-by: Chin-Ting Kuo
On 5/24/22 07:56, Chin-Ting Kuo wrote:
When SPI_NOR_4B_OPCODES flag is set for a specific flash
in spi_nor_ids[] table, EN4B command will not be issued and
4-byte dedicated commands will be used to access SPI flash.
Thus, instead of EN4B command, address length is more suitable
for deciding wheth
On 5/24/22 07:56, Chin-Ting Kuo wrote:
Add ID for Winbond W25Q512JV device which is supported
on AST2600 EVB by default.
Signed-off-by: Chin-Ting Kuo
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
drivers/mtd/spi/spi-nor-ids.c | 5 +
1 file changed, 5 insertions(+)
diff --git a
On 5/24/22 07:56, Chin-Ting Kuo wrote:
For both AST2500 and AST2600, there are three
SPI controllers, FMC(Firmware Memory Controller),
SPI1 and SPI2. The clock source is HCLK. Following
is the basic information for ASPEED SPI controller.
AST2500:
- FMC:
CS number: 3
controller r
On 5/24/22 07:56, Chin-Ting Kuo wrote:
This adds the dirmap API originally introduced in Linux commit aa167f3
("spi: spi-mem: Add a new API to support direct mapping"). This also
includes several follow-up patches and fixes.
Changes from Linux include:
* Added Kconfig option
* Changed struct dev
On 5/24/22 07:56, Chin-Ting Kuo wrote:
- Enable ASPEED SPI controller driver.
- Enable SPI flash memory configurations.
- Enable configurations for SPI flash manufacturers
supported on both ASPEED AST2500 and AST2600 AVL.
Signed-off-by: Chin-Ting Kuo
---
configs/evb-ast2500_defconfig | 13
Hello Chin-Ting,
On 5/24/22 07:56, Chin-Ting Kuo wrote:
Add ASPEED BMC FMC/SPI memory controller driver with
spi-mem interface for AST2500 and AST2600 platform.
There are three SPI memory controllers embedded in an ASPEED SoC.
- FMC: Named as Firmware Memory Controller. After AC on, MCU ROM
Hello Neal
On 6/27/22 10:55, Neal Liu wrote:
Reviewed-by: Chia-Wei Wang
The QEMU emulation issue is under investigation by Steven.
The CRC32 and MD5 SW support will be added before we re-enabling HW
crypto drivers.
Chiawei
From: joel.s...@gmail.com On Behalf Of Joel
Stanley
Sent: Monday, J
On 6/27/22 09:58, Joel Stanley wrote:
The AST2600 has a Qemu model that allows testing. Create a SPI NOR image
containing the combined SPL and u-boot FIT image.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
.azure-pipelines.yml | 3 +++
.gitlab-ci.yml
can be used to build and boot a
system:
make u-boot-with-spl.bin
truncate -s 64M u-boot-with-spl.bin
qemu-system-arm -nographic -M ast2600-evb \
-drive file=u-boot-with-spl.bin,if=mtd,format=raw
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include
On 6/27/22 10:15, ChiaWei Wang wrote:
Reviewed-by: Chia-Wei Wang
The QEMU emulation issue is under investigation by Steven.
Great ! I was going to open a gitlab issue under :
https://gitlab.com/qemu-project/qemu/-/issues/
But we still have a couple of weeks before QEMU 7.1 soft freeze :
default while the above issues are worked out to enable
boot testing in Qemu.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
configs/evb-ast2600_defconfig | 3 ---
1 file changed, 3 deletions(-)
diff --git a/configs/evb-ast2600_defconfig b/configs/evb
On 6/27/22 09:58, Joel Stanley wrote:
Allows loading one u-boot from another. Useful for testing on hardware.
Signed-off-by: Joel Stanley
---
Reviewed-by: Cédric Le Goater
Thanks,
C.
configs/evb-ast2600_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/evb
On 6/27/22 09:58, Joel Stanley wrote:
Useful for testing images with the default hash type.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
configs/evb-ast2600_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/evb-ast2600_defconfig b
Hello Chiawei,
On 6/27/22 02:39, ChiaWei Wang wrote:
Reply again to leave record on mailing list.
From: joel.s...@gmail.com On Behalf Of Joel Stanley
Sent: Friday, June 24, 2022 10:50 AM
The Qemu model or the u-boot driver is unable to correctly compute the
SHA256 hash used in a FIT. Disable
On 6/26/22 06:56, Chin-Ting Kuo wrote:
Hi All,
Are there any comments about this patch series?*
Sorry, I haven't had time to take a look at the driver. I will try this week.
Thanks,
C.
Thanks.
Best Wishes,
Chin-Ting
-Original Message-
From: Chin-Ting Kuo
Sent: Tuesday, May 24
On 6/24/22 04:34, Joel Stanley wrote:
Similar to the AST2500 this machine is emulated by Qemu. It boots from
a 64MB SPI NOR flash device by default.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
bin/travis-ci/conf.evb-ast2600_qemu | 13
On 6/24/22 04:34, Joel Stanley wrote:
The Aspeed machine in Qemu has appropriate defaults so we don't need to
specify these options.
Signed-off-by: Joel Stanley
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
bin/travis-ci/conf.evb-ast2500_qemu | 2 +-
1 file changed, 1 insertion(
On 5/9/22 09:23, Chin-Ting Kuo wrote:
Add FWSPICS1 and SPI1CS1 in AST2500 pinctrl group.
On AST2500 EVB, FWSPICS1 can be supported by default.
An extra jumper, J45, should be configured before
enabling SPI1CS1.
Signed-off-by: Chin-Ting Kuo
Reviewed-by: Cédric Le Goater
Thanks,
C
message
issued if the mdio access fails. We can instead use bus->name, which
is already available at that point.
Signed-off-by: Zev Weiss
Fixes: 538e75d3fc54 ("net: ftgmac100: add MDIO bus and phylib support")
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
drivers/net/ftgmac10
st2500_get_hpll_rate() and ast2500_get_mpll_rate()
It's minor.
Reviewed-by: Cédric Le Goater
Thanks,
C.
+ u32 hpll_reg = readl(&scu->h_pll_param);
+ ulong axi_div = 2;
+ u32 rate;
+ ulong ahb_div = 1 + ((readl(&scu->hwstrap)
+
On 5/18/21 9:09 AM, Joel Stanley wrote:
> The HACE supports MD5, SHA1 and SHA2 family hash functions. This driver
> uses it in a polling mode to perform hash calculations over buffers
> placed in DRAM.
>
> It registers a driver to allow the hardware's clocking to be enabled
> using the clock frame
On 8/31/20 8:03 AM, Ryan Chen wrote:
> Modify SPDX-License for furture patch warning
>
> Signed-off-by: Ryan Chen
> ---
> arch/arm/dts/ast2500-u-boot.dtsi | 1 +
> include/dt-bindings/clock/aspeed-clock.h | 2 +-
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/ar
On 8/31/20 8:03 AM, Ryan Chen wrote:
> v2: modify title description aspeed:clock -> clock:aspeed
>
> Use kernel include/dt-bindings/clock/aspeed-clock.h define
> for clock driver.
>
> Signed-off-by: Ryan Chen
> ---
> arch/arm/dts/ast2500-u-boot.dtsi | 20 +++
> drivers/clk/aspeed/cl
On 8/31/20 8:03 AM, Ryan Chen wrote:
> Rename the ast2500-scu.h to aspeed-clock.h.
>
> Signed-off-by: Ryan Chen
Reviewed-by: Cédric Le Goater
> ---
> arch/arm/dts/ast2500-u-boot.dtsi| 2 +-
> arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
Hello Ryan,
On 8/28/20 9:32 AM, Ryan Chen wrote:
> This patch series refactor the exiting ASPEED clock name define sync
> with Linux kernel. And also add SPDX-License
All the patchset seems correct but the patch numbering is a bit
confusing. I have received :
[1/3] cosmetic: aspeed: ast2500:
FIG_PHY_ADDR.
>
> Signed-off-by: Thirupathaiah Annapureddy
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> drivers/net/ftgmac100.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
> index 5676a5b3ba..0
g/ast_wdt.c
>
> Fix this by making devfdt_get_addr_ptr return NULL on failure, as
> described in the function comments. Also, update the drivers
> currently checking (void *)FDT_ADDR_T_NONE to check for NULL.
>
> Signed-off-by: Ovidiu Panait ---
Reviewed-by: Cédric Le Goater
part of
> ofdata setup, and everything is OK.
>
> Note: This problem did not matter until now since DM always probed all
> parents before reading a child's ofdata. The fact that pinctrl is a child
> of clock seems to trigger this strange bug.
Did you find it with
Fixes: e766849713ff ("net: ftgmac100: convert the RX/TX descriptor arrays")
Signed-off-by: Cédric Le Goater
---
drivers/net/ftgmac100.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 92
On 15/08/2019 21:29, Eddie James wrote:
> Enable the MMC subsystem and the Aspeed SD controller. Also enable the
> use of the device tree for probing the controller.
>
> Signed-off-by: Eddie James
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> configs/evb-ast
On 15/08/2019 21:29, Eddie James wrote:
> Add support for the Aspeed SD host controller engine.
>
> Signed-off-by: Eddie James
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> arch/arm/include/asm/gpio.h | 3 +-
> drivers/mmc/Kconfig | 11 ++
>
On 13/08/2019 21:31, Eddie James wrote:
> Add nodes for the Aspeed SD controllers with their necessary properties.
>
> Signed-off-by: Eddie James
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> arch/arm/dts/ast2500-evb.dts | 14 ++
> arch/arm/dts/ast250
On 13/08/2019 21:31, Eddie James wrote:
> Initialize the MMC subsystem on the ast2500 board. Compile MMC and the
> Aspeed SD controller on the ast2500 EVB.
>
> Signed-off-by: Eddie James
> ---
> arch/arm/include/asm/gpio.h | 3 ++-
> arch/arm/mach-aspeed/ast2500-board.c | 3 +++
> confi
On 13/08/2019 21:31, Eddie James wrote:
> Add support for the Aspeed SD host controller engine.
It looks correct and simple enough. Some comments below.
>
> Signed-off-by: Eddie James
> ---
> drivers/mmc/Kconfig| 11 +++
> drivers/mmc/Makefile | 1 +
> drivers/mmc/aspeed_sdh
On 13/08/2019 21:31, Eddie James wrote:
> Add code to enable the SD clock on the ast2500 SoC.
>
> Signed-off-by: Eddie James
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 3 +++
> drivers/clk/aspeed/clk_ast2500.c
On 13/08/2019 08:41, Peng Fan wrote:
>> Subject: [U-Boot][PATCH] ARM: aspeed: Add SD host controller driver
>>
>> Add support for the Aspeed SD host controller engine. This involves adding an
>> MMC SDHCI driver and various additions to the clock and reset drivers for
>> Aspeed chips.
>>
>> Signed-
On 18/06/2019 03:37, Samuel Mendoza-Jonas wrote:
> This series introduces support for the NC-SI protocol to u-boot,
> functionality which so far has only been available in vendor trees.
Would it be complex to add a romulus DT and config file ?
Thanks,
C.
>
> NC-SI (Network Controller Sideban
e-ncsi property exists. If set then normal mdio setup is
> skipped in favour of the NC-SI phy.
>
> Signed-off-by: Samuel Mendoza-Jonas
LGTM. Some very minor remarks below in case you resend.
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
>
Hello
On 10/10/18 2:02 PM, Cédric Le Goater wrote:
> Hello Boris,
>
> On 10/10/18 9:32 AM, Boris Brezillon wrote:
>> Hi Cédric,
>>
>> On Wed, 10 Oct 2018 11:46:56 +0530
>> Jagan Teki wrote:
>>
>>> On Mon, Oct 8, 2018 at 11:32 AM Cédric Le Goater
is 250MHz but a 251MHz is assigned.
The easiest way to fix this problem is to introduce an array of clock
settings defining the N, M, P parameters for well known frequencies
used by the Aspeed SoC.
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
arch/arm/dts/ast2500-evb.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index
Signed-off-by: Cédric Le Goater
---
Changes since v4 :
- defined a custom wait_for_bit_*() macro
drivers/net/ftgmac100.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index bf8600814690..ec46add1d35c 100644
,
reset and clock drivers are also different.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Simon Glass
Acked-by: Joe Hershberger
---
arch/arm/dts/ast2500.dtsi | 1949 ++---
1 file changed, 1153 insertions(+), 796 deletions(-)
diff --git a
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index ec46add1d35c..798977616756 100644
--- a
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Simon Glass
Acked-by: Joe Hershberger
---
drivers/clk/aspeed/clk_ast2500.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 526470051c5d
Implement the MDIO bus read/write functions using the readl_poll_timeout()
routine, initialize the bus and scan for the PHY. RGMII and RMII mode
are supported.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 380
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 31
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 67a7c73503c5..78cd9df62986 100644
--- a/drivers/net
Use simple arrays under the device priv structure to hold the RX and
TX descriptors and handle memory coherency by invalidating or flushing
the d-cache when required.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 141
is not yet functional.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
include/netdev.h| 1 -
drivers/net/ftgmac100.c | 223 +++-
drivers/net/Kconfig | 26 +
3 files changed, 157 insertions(+), 93
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h
index 439b14d71e4b..9a789e4d5bee 100644
--- a/drivers/net
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.h | 154
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h
index ffbe1f3e3fa7
- introduced a fix for the D2-PLL clock setting
Cédric Le Goater (13):
net: ftgmac100: use the BIT() macro
net: ftgmac100: use the aligned() macro
net: ftgmac100: convert to driver model
net: ftgmac100: use setbits_le32() in the reset method
net: ftgmac100: add MDIO bus and phylib support
Hello Joe,
On 10/22/18 9:55 PM, Joe Hershberger wrote:
> Hi Cedric,
>
> On Tue, Oct 16, 2018 at 4:32 AM Cédric Le Goater wrote:
>>
>> Signed-off-by: Cédric Le Goater
>> Reviewed-by: Joel Stanley
>> ---
>>
>> Changes since v3 :
>>
>
This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.
Signed-off-by: Cédric Le Goater
---
arch/arm/include/asm/arch-aspeed/wdt.h | 9 +
drivers/watchdog/ast_wdt.c | 1 +
2 files changed, 10 insertions(+)
diff --git a/arch/arm
is 250MHz but a 251MHz is assigned.
The easiest way to fix this problem is to introduce an array of clock
settings defining the N, M, P parameters for well known frequencies
used by the Aspeed SoC.
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Simon Glass
Acked-by: Joe Hershberger
---
drivers/clk/aspeed/clk_ast2500.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 526470051c5d
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
arch/arm/dts/ast2500-evb.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 9adfe109ebc2..e1104a544748 100644
--- a
,
reset and clock drivers are also different.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Simon Glass
---
arch/arm/dts/ast2500.dtsi | 1949 ++---
1 file changed, 1153 insertions(+), 796 deletions(-)
diff --git a/arch/arm/dts/ast2500.dtsi
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 31
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
---
Changes since v3 :
- introduced a ftgmac100_wait_for_txdone() function similar to the
wait_for_bit_*() macros.
drivers/net/ftgmac100.c | 44 +
1 file changed, 44 insertions(+)
diff
Use simple arrays under the device priv structure to hold the RX and
TX descriptors and handle memory coherency by invalidating or flushing
the d-cache when required.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 141
is not yet functional.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
---
It didn't seem necessary to remove the 'dev' argument from the
ftgmac100_phy_init() and ftgmac100_phy_reset() function prototypes as
the code is completely reworked in patch 5.
include/netdev
Implement the MDIO bus read/write functions using the readl_poll_timeout()
routine, initialize the bus and scan for the PHY. RGMII and RMII mode
are supported.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
Changes since v3 :
- improved
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 67a7c73503c5..78cd9df62986 100644
--- a/drivers/net
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h
index 439b14d71e4b..9a789e4d5bee 100644
--- a/drivers/net
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Acked-by: Joe Hershberger
---
drivers/net/ftgmac100.h | 154
1 file changed, 77 insertions(+), 77 deletions(-)
diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h
index ffbe1f3e3fa7
id .data model
- dropped is_aspeed bool
- dropped MDIO interface setting for Aspeed SoC. The default is
correct.
- removed the clcoks which are now handled automatically in the
ftgmac100 driver
- introduced a fix for the D2-PLL clock setting
Cédric Le Goater (13):
net: ftgmac100: use the BI
On 10/15/18 10:58 PM, Joe Hershberger wrote:
> On Wed, Oct 10, 2018 at 6:48 AM Cédric Le Goater wrote:
>>
>> Signed-off-by: Cédric Le Goater
>> ---
>> drivers/net/ftgmac100.c | 18 ++
>> 1 file changed, 18 insertions(+)
>>
>> diff
On 10/15/18 10:39 PM, Joe Hershberger wrote:
> On Wed, Oct 10, 2018 at 6:45 AM Cédric Le Goater wrote:
>>
>> The driver is based on the previous one and the code is only adapted
>> to fit the driver model. The support for the Faraday ftgmac100
>> controller is the
On 10/12/18 1:15 AM, Joel Stanley wrote:
> On Wed, 10 Oct 2018 at 22:12, Cédric Le Goater wrote:
>>
>> The driver is based on the previous one and the code is only adapted
>> to fit the driver model. The support for the Faraday ftgmac100
>> controller is the same with M
Hello Boris,
On 10/10/18 9:32 AM, Boris Brezillon wrote:
> Hi Cédric,
>
> On Wed, 10 Oct 2018 11:46:56 +0530
> Jagan Teki wrote:
>
>> On Mon, Oct 8, 2018 at 11:32 AM Cédric Le Goater wrote:
>>>
>>> On 10/4/18 5:57 PM, Jagan Teki wrote:
>>>&g
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
---
arch/arm/dts/ast2500-evb.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index 723941ac0bee..ebf44fd707f9 100644
--- a/arch/arm/dts/ast2500
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
---
drivers/net/ftgmac100.c | 31 +++
configs/evb
,
reset and clock drivers are also different.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Simon Glass
---
Changes since v2 :
- removed a couple more unused clock properties
arch/arm/dts/ast2500.dtsi | 1949 ++---
1 file changed, 1153
Signed-off-by: Cédric Le Goater
---
drivers/net/ftgmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 67a7c73503c5..78cd9df62986 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -331,7 +331,7
Signed-off-by: Cédric Le Goater
---
drivers/net/ftgmac100.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index edf34c601c68..a5f2f01b7179 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
Signed-off-by: Cédric Le Goater
---
drivers/net/ftgmac100.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index b46187b567c6..edf34c601c68 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -28,6 +28,9
Use simple arrays under the device priv structure to hold the RX and
TX descriptors and handle memory coherency by invalidating or flushing
the d-cache when required.
Signed-off-by: Cédric Le Goater
---
At this stage, the drive is functional.
drivers/net/ftgmac100.c | 141
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Reviewed-by: Simon Glass
---
drivers/clk/aspeed/clk_ast2500.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index 526470051c5d..2182320f607f 100644
--- a/drivers
is 250MHz but a 251MHz is assigned.
The easiest way to fix this problem is to introduce an array of clock
settings defining the N, M, P parameters for well known frequencies
used by the Aspeed SoC.
Signed-off-by: Cédric Le Goater
Reviewed-by: Simon Glass
---
drivers/clk/aspeed/clk_ast2500.c | 38
is not yet functional.
Signed-off-by: Cédric Le Goater
---
include/netdev.h| 1 -
drivers/net/ftgmac100.c | 223 +++-
drivers/net/Kconfig | 26 +
3 files changed, 157 insertions(+), 93 deletions(-)
diff --git a/include/netdev.h b/include
1 - 100 of 149 matches
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