spl.bin of=/dev/sdb seek=17
> $ dd if=u-boot.bin of=/dev/sdb seek=49
dd if=u-boot-dtb.bin of=/dev/sdb seek=49
>
> However while the Linaro based build works fine, I don't get any serial
> output on the upstream build.
>
> Can someone give any hints?
>
> Thanks,
> And
Ping
On 19 November 2013 11:09, Chander Kashyap wrote:
> Ping..
>
> On 19 October 2013 12:19, Inderpal Singh wrote:
>> From: Chander Kashyap
>>
>> Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
>> controller, connected to HSIC P
Ping..
On 19 October 2013 12:19, Inderpal Singh wrote:
> From: Chander Kashyap
>
> Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
> controller, connected to HSIC Phy of USB host controller via USB3503 hub.
>
> This patchset add support for this u
/* select serial console configuration */
>> > +#define CONFIG_S5P_SERIAL
>> > #define CONFIG_SERIAL2 1 /* use
>> > SERIAL 2 */ #define CONFIG_BAUDRATE 115200
>> > #define EXYNOS4_DEFAULT_UART_OFFSET0x02
>> > diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
>> > index d0fafd7..812b7f3 100644
>> > --- a/include/configs/s5p_goni.h
>> > +++ b/include/configs/s5p_goni.h
>> > @@ -42,6 +42,7 @@
>> > /*
>> > * select serial console configuration
>> > */
>> > +#define CONFIG_S5P_SERIAL
>> > #define CONFIG_SERIAL2 1 /* use
>> > SERIAL2 */ #define CONFIG_BAUDRATE 115200
>> >
>> > diff --git a/include/configs/s5pc210_universal.h
>> > b/include/configs/s5pc210_universal.h index 97a4008..2270449 100644
>> > --- a/include/configs/s5pc210_universal.h
>> > +++ b/include/configs/s5pc210_universal.h
>> > @@ -48,6 +48,7 @@
>> > #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1
>> > << 20))
>> > /* select serial console configuration */
>> > +#define CONFIG_S5P_SERIAL
>> > #define CONFIG_SERIAL2 1 /* use SERIAL 2 */
>> > #define CONFIG_BAUDRATE115200
>> >
>> > diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
>> > index a572e62..4631dac 100644
>> > --- a/include/configs/smdkc100.h
>> > +++ b/include/configs/smdkc100.h
>> > @@ -47,6 +47,7 @@
>> > /*
>> > * select serial console configuration
>> > */
>> > +#define CONFIG_S5P_SERIAL
>> > #define CONFIG_SERIAL0 1 /* use
>> > SERIAL 0 on SMDKC100 */
>> > /* PWM */
>> > diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
>> > index 0496661..9e10bf1 100644
>> > --- a/include/configs/smdkv310.h
>> > +++ b/include/configs/smdkv310.h
>> > @@ -48,6 +48,7 @@
>> > #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1
>> > << 20))
>> > /* select serial console configuration */
>> > +#define CONFIG_S5P_SERIAL
>> > #define CONFIG_SERIAL1 1 /* use
>> > SERIAL 1 */ #define CONFIG_BAUDRATE 115200
>> > #define EXYNOS4_DEFAULT_UART_OFFSET0x01
>> > diff --git a/include/configs/trats.h b/include/configs/trats.h
>> > index 9b6aac9..6b301c8 100644
>> > --- a/include/configs/trats.h
>> > +++ b/include/configs/trats.h
>> > @@ -53,6 +53,7 @@
>> > #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE +
>> > (16 << 20))
>> > /* select serial console configuration */
>> > +#define CONFIG_S5P_SERIAL
>> > #define CONFIG_SERIAL2 /* use SERIAL 2 */
>> > #define CONFIG_BAUDRATE115200
>> >
>> >
>>
>> Thanks,
>> Minkyu Kang.
>
> Regards,
>
> Lukasz Majewski
>
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As per new convention ARCH_CPU_DTS is not defined in "dtc/Makefile".
Hence Arndale comilation is failing. Fix this by adding proper include
file in "board/samsung/dts/exynos5250-arndale.dts".
Signed-off-by: Chander Kashyap
---
board/samsung/dts/exynos5250-arndale.dts |
Hi Minkyu,
On 9 September 2013 13:55, Minkyu Kang wrote:
> Dear Chander Kashyap,
>
> On 06/09/13 13:32, Chander Kashyap wrote:
>> Hi Albert,
>>
>> On 5 September 2013 18:58, Albert ARIBAUD wrote:
>>> Hi Chander,
>>>
>>> On Thu, 5 Sep 2013 1
Hi Albert,
On 5 September 2013 18:58, Albert ARIBAUD wrote:
> Hi Chander,
>
> On Thu, 5 Sep 2013 17:36:34 +0530, Chander Kashyap
> wrote:
>
>> Hi Albert,
>>
>> On 5 September 2013 17:08, Albert ARIBAUD wrote:
>> > Hi Chander,
>> >
>
From: Inderpal Singh
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/sam
rning for parenthesis alignment.
Changes in v7:
- Fixed DT compilation error with DTC 1.4.0
[5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and
update Makefiles
Chander Kashyap (1):
exynos5250: Add arndale board support
Inderpal Singh (1):
exynos5250: ar
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh
Signed-off-by: Chander Kashyap
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
Hi Albert,
On 5 September 2013 17:08, Albert ARIBAUD wrote:
> Hi Chander,
>
> On Thu, 5 Sep 2013 16:47:27 +0530, Chander Kashyap
> wrote:
>
>> Hi Lukasz,
>>
>> On 5 September 2013 16:27, Lukasz Majewski wrote:
>> > Hi Chander,
>> >
>&g
ror 1
> make: *** [checkdtc] Error 1
> make: *** Waiting for unfinished jobs....
>
>
> --
> Best regards,
>
> Lukasz Majewski
>
> Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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On 5 September 2013 15:12, Chander Kashyap wrote:
> Hi Albert,
>
> On 5 September 2013 14:43, Albert ARIBAUD wrote:
>> Hi Minkyu,
>>
>> On Fri, 30 Aug 2013 14:10:19 +0900, Minkyu Kang
>> wrote:
>>
>>> Dear Al
dbecc12d7eec7b53d3a4a06234b:
>>
>> drivers:power:max77686: add function to set voltage and mode (2013-08-30
>> 12:24:54 +0900)
>>
>>
>> Chander Kashyap (2):
>> CONFIG: EXYNOS5: Repl
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh
Signed-off-by: Chander Kashyap
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
From: Inderpal Singh
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/sam
rning for parenthesis alignment.
[5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and
update Makefiles
Chander Kashyap (1):
exynos5250: Add arndale board support
Inderpal Singh (1):
exynos5250: arndale: Add mmc support
MAINTAINERS |
On 21 August 2013 08:56, Chander Kashyap wrote:
> Dear Kim,
>
>
> On 21 August 2013 00:54, Kim Phillips wrote:
>> On Tue, 6 Aug 2013 20:05:46 +0530
>> Chander Kashyap wrote:
>>
>>> Arndale board is based on samsung's exynos5250 soc.
>>>
Dear Kim,
On 21 August 2013 00:54, Kim Phillips wrote:
> On Tue, 6 Aug 2013 20:05:46 +0530
> Chander Kashyap wrote:
>
>> Arndale board is based on samsung's exynos5250 soc.
>>
>> Signed-off-by: Inderpal Singh
>> Signed-off-by: Chander Kashyap
>> -
From: Inderpal Singh
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/sam
ments suggested by Minkyu
- Added SPDX-License-Identifier to new files
Changes in v6:
- Fixed missed out sorting of Maintainers entry
[5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and
update Makefiles
Chander Kashyap (1):
exynos5250: Add arndale
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh
Signed-off-by: Chander Kashyap
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
On 6 August 2013 17:16, Minkyu Kang wrote:
> On 25/07/13 21:46, Chander Kashyap wrote:
>> Arndale board is based on samsung's exynos5250 soc.
>>
>> Signed-off-by: Inderpal Singh
>> Signed-off-by: Chander Kashyap
>> ---
>> MAINTAINERS
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh
Signed-off-by: Chander Kashyap
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 34
board/samsung/arndale/arndale.c | 87 ++
From: Inderpal Singh
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/sam
ments suggested by Minkyu
- Added SPDX-License-Identifier to new files
[5] [PATCH v2] CONFIG: EXYNOS5: Replace misnomer SMDK5250 with EXYNOS5250 and
update Makefiles
Chander Kashyap (1):
exynos5250: Add arndale board support
Inderpal Singh (1):
exynos5250: arndale: Add mmc su
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh
Signed-off-by: Chander Kashyap
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 50 ++
board/samsung/arndale/arndale.c | 102 +++
ed to latest u-boot-samsung master branch
[5] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/164824
Chander Kashyap (1):
exynos5250: Add arndale board support
Inderpal Singh (1):
exynos5250: arndale: Add mmc support
MAINTAINERS |4 +
board/sa
From: Inderpal Singh
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/sam
+#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
> +#define CONFIG_CROS_EC_KEYB/* CROS_EC keyboard input */
> +#define CONFIG_CMD_CROS_EC
> +#define CONFIG_KEYBOARD
> +
> /* Console configuration */
> #define CONFIG_CONSOLE_MUX
> #define
e/lowlevel_init.S
> create mode 100644 board/samsung/arndale/mmc_boot.c
> create mode 100644 board/samsung/arndale/setup.h
> create mode 100644 board/samsung/dts/exynos5250-arndale.dts
> create mode 100644 include/configs/arndale.h
>
> --
> 1.7.9.5
>
Looks good.
Acked-by: Chander Kashyap
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t;>>> +#define CONFIG_SMDK5250/* which is in a
>>>> SMDK5250 */
>>>> +#define CONFIG_SERIAL3 /* use SERIAL 3 */
>>>> +
>>>> +/* specific .lds file */
>>>> +#define CONFIG_SPL_LDSCRIPT
>>>> "board/samsung/smdk5250/smdk5250-uboot-spl.lds"
>>>> +#define CONFIG_IDENT_STRING" for SMDK5250"
>>>> +#define CONFIG_SPI_FLASH
>>>> +#define CONFIG_ENV_IS_IN_SPI_FLASH
>>>> +
>>>> +/* Display */
>>>> +#define CONFIG_LCD
>>>> +
>>>> +#include
>>>> +
>>>> #endif /* __CONFIG_SNOW_H */
>>>>
>>>
>>> The intent with the exynos5250-dt file is that it supports any board with
>>> that chip, so it should enable any feature used by Exynos5250 boards.
>>> Granted that might not suit all boards, which only need a subset of the
>>> features. Perhaps we should create an exynos5250-dt-base.h, with just the
>>> core options defined. Then other boards can include the base file, and
>>> exynos5250-dt can stay as the 'enable everything/ config?
>>>
>>>
>> So as per you suggestion, there would be 3 files. One
>> exynos5250-dt-base.h, second exynos5250-dt.h and third the board specific
>> config file.
>>
>> How about having core options unconditionally enabled in exynos5250-dt.h
>> and other options with #ifdef. The board specific config files can define
>> the other options. This way only 2 files will do.
>>
>> For example, let exynos5250-dt.h has SPI related configs under #ifdef
>> CONFIG_SPI_FLASH and let smdk5250.h or arndale.h define CONFIG_SPI_FLASH
>> based on the spi flash presence in respective boards.
>>
>
>> Let me know your opinion.SPI
>>
>
> Well the problem is who sets CONFIG_SPI_FLASH
IIUC the CONFIG_SPI_FLASH will be set in respective board config file.
Hence only boards want to have SPI boot support will define it.
>
> For us at least, exynos5250-dt is a good upstream target, since we can add
> all features into it and it will should boot on all the different boards.
> It helps to make sure that other boards don't get non-device-tree config
> that breaks this approach.
>
> So I think you do need a base config file. But I think a better name might
> be exynos5250-dt-common.h instead of exynos5250-dt-base.h.
>
> Regards,
> Simon
>
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>
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Seems good to me.
Acked-by: Chander Kashyap
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mode 100644 board/samsung/dts/exynos5250-arndale.dts
> create mode 100644 include/configs/arndale.h
>
> --
> 1.7.9.5
>
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fo
Thanks for applying.
On 26 December 2012 15:37, Minkyu Kang wrote:
> On 26/12/12 15:13, Minkyu Kang wrote:
>> From: Chander Kashyap
>>
>> This patch populates base addresses of Exynos4x12 registers.
>>
>> Signed-off-by: Chander Kashyap
>> Signed-off-by:
Dear Kim,
On 13 December 2012 13:51, 김정현 wrote:
> Dear Chander,
>
> 2012년 12월 13일 15:19, Chander Kashyap 쓴 글:
>
> On 13 December 2012 11:49, Chander Kashyap
> wrote:
>
> Dear Kim,
>
> On 12 December 2012 13:24, Jeong Hyeon Kim wrote:
>
> From: Jeong-Hyeon
On 13 December 2012 11:49, Chander Kashyap wrote:
> Dear Kim,
>
> On 12 December 2012 13:24, Jeong Hyeon Kim wrote:
>> From: Jeong-Hyeon Kim
>>
>> This patch adds the support for Exynos4212/4412.
>>
>> Samsung's ARM Cortex-A9 based Exynos4x12 SoCs and
ned intclkout_cmu_isp;
> + unsigned intclkout_cmu_isp_stat;
> + unsigned char res76[0xf8];
> + unsigned intclkout_cmu_spare0;
> + unsigned intclkout_cmu_spare1;
> + unsigned intclkout_cmu_spare2;
> + unsigned intclkout_cmu_spare3;
> +};
> +
> struct exynos5_clock {
> unsigned intapll_lock;
> unsigned char res1[0xfc];
> diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
> b/arch/arm/include/asm/arch-exynos/cpu.h
> index d1b2ea8..7ee5366 100644
> --- a/arch/arm/include/asm/arch-exynos/cpu.h
> +++ b/arch/arm/include/asm/arch-exynos/cpu.h
> @@ -152,6 +152,7 @@ static inline int proid_is_##type(void)
> \
> }
>
> IS_EXYNOS_TYPE(exynos4210, 0x4210)
> +IS_EXYNOS_TYPE(exynos4412, 0x4412)
> IS_EXYNOS_TYPE(exynos5250, 0x5250)
>
> #define SAMSUNG_BASE(device, base) \
> --
> 1.7.9.5
>
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This patch adds gpio structure for Exynos4x12.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/gpio.h | 85 +++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
This patch adds clock structure for Exynos4x12.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/clock.h | 276 ++
1 file changed, 276 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
This patch populates base addresses of Exynos4x12 registers.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/cpu.h | 48 +++-
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm
This patch series popultes Register addresses, clock structure and
gpio structure for Exynos4x12.
Rebase to latest u-boot-samsung tree.
Chander Kashyap (3):
EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
EXYNOS: EXYNOS4X12
Dear Minkyu,
On 7 December 2012 13:19, Minkyu Kang wrote:
> Dear Chander,
>
> On 02/11/12 19:51, Chander Kashyap wrote:
>> ping
>>
>> On 2 October 2012 15:16, Chander Kashyap wrote:
>>> This patch series popultes Register addresses, clock structure a
ping
On 2 October 2012 15:16, Chander Kashyap wrote:
> This patch series popultes Register addresses, clock structure and
> gpio structure for Exynos4x12.
>
> Changes in v2:
> - Fixed the GPIO base address macro for exynos4x12_gpio_part3_get_nr
> in arch/ar
OCKED_SHIFT 29 /* EPLL Locked bit position*/
> +#define TIMEOUT_EPLL_LOCK 1000
> +
> +#define AUDIO_0_RATIO_MASK 0x0f
> +#define AUDIO_1_RATIO_MASK 0x0f
> +
> +#define AUDIO1_SEL_MASK0xf
> +#define CLK_SRC_SCLK_EPLL 0x7
> +
> +/* CON0 bit-fields */
> +#define EPLL_CON0_MDIV_MASK0x1ff
> +#define EPLL_CON0_PDIV_MASK0x3f
> +#define EPLL_CON0_SDIV_MASK0x7
> +#define EPLL_CON0_MDIV_SHIFT 16
> +#define EPLL_CON0_PDIV_SHIFT 8
> +#define EPLL_CON0_SDIV_SHIFT 0
> +#define EPLL_CON0_LOCK_DET_EN_SHIFT28
> +#define EPLL_CON0_LOCK_DET_EN_MASK 1
> +
> #define MPLL_FOUT_SEL_MASK 0x1
> #define BPLL_FOUT_SEL_SHIFT0
> #define BPLL_FOUT_SEL_MASK 0x1
> --
> 1.7.4.4
>
--
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On 22 August 2012 12:14, Rajeshwari Shinde wrote:
> This patch enables sound support for EXYNOS5
>
> Signed-off-by: Rajeshwari Shinde
> ---
Acked-by: Chander Kashyap
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Hi,
On 22 August 2012 12:14, Rajeshwari Shinde wrote:
> This patch adds base address for I2S
>
> Signed-off-by: Rajeshwari Shinde
>
Acked-by: Chander Kashyap
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From: Minkyu Kang
Based upon single SoC there can be multiple variants.
This patch add support to match the complete product ID.
Signed-off-by: Chander Kashyap
---
Changes from v1:
- Author name changed
Changes from v2:
- Fixed typo
arch/arm/include/asm/arch-exynos/cpu.h
Hi Albert,
Thanks.
On 15 October 2012 17:58, Albert ARIBAUD wrote:
> Hi Chander,
>
> On Mon, 15 Oct 2012 17:28:23 +0530, Chander Kashyap
> wrote:
>
>> From: Minkyu Kang
>>
>> Based upon single SoC there can be multiple varients.
>
> Typo here (varients =&g
From: Minkyu Kang
Based upon single SoC there can be multiple varients.
This patch add support to match the complete product ID.
Signed-off-by: Chander Kashyap
---
Changes from v1:
- Author name changed
arch/arm/include/asm/arch-exynos/cpu.h |9 +
1 file changed, 9
From: Minkyu Kang
Moved the common code to calculate pll clock rate to new function
exynos_get_pll_clk().
Signed-off-by: Chander Kashyap
---
Changes from v1:
- Author name changed
arch/arm/cpu/armv7/exynos/clock.c | 102 ++---
1 file changed, 38
ut from this issue.
>
> Thanks
> Balaji
>
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Adds functions to extract clock frequency of Exynos4x12 IPs.
Signed-off-by: Chander Kashyap
---
arch/arm/cpu/armv7/exynos/clock.c | 163 +++--
1 file changed, 158 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7
Dear Marek,
thanks.
On 3 October 2012 05:46, Marek Vasut wrote:
> Dear Chander Kashyap,
>
>> This patch series popultes Register addresses, clock structure and
>> gpio structure for Exynos4x12.
>>
>> Changes in v2:
>> - Fixed the GPIO base address ma
This patch adds gpio structure for Exynos4x12.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/gpio.h | 85 +++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
This patch adds clock structure for Exynos4x12.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/clock.h | 276 ++
1 file changed, 276 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
This patch populates base addresses of Exynos4x12 registers.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/cpu.h | 48 +++-
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm
This patch series popultes Register addresses, clock structure and
gpio structure for Exynos4x12.
Changes in v2:
- Fixed the GPIO base address macro for exynos4x12_gpio_part3_get_nr
in arch/arm/include/asm/arch-exynos/gpio.h
Chander Kashyap (3):
EXYNOS: EXYNOS4X12: Populate
This patch populates base addresses of Exynos4x12 registers.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/cpu.h | 48 +++-
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm
This patch adds clock structure for Exynos4x12.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/clock.h | 276 ++
1 file changed, 276 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
This patch series popultes Register addresses, clock structure and
gpio structure for Exynos4x12.
Chander Kashyap (3):
EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12
This patch adds gpio structure for Exynos4x12.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/gpio.h | 85 +++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
Moved the common code to calculate pll clock rate to new funtion
exynos_get_pll_clk().
Signed-off-by: Chander Kashyap
---
arch/arm/cpu/armv7/exynos/clock.c | 102 ++---
1 file changed, 38 insertions(+), 64 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos
From: Chander Kashyap
Based upon single SoC there can be multiple varients.
This patch add support to match the complete product ID.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/cpu.h |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm
On 12 September 2012 21:57, Tom Rini wrote:
> On Fri, Sep 07, 2012 at 11:06:31AM +0530, Chander Kashyap wrote:
>
>> Now DT support is becoming common for all new SoC's. Hence it is better
>> to have option for getting specific FDT from the remote server.
>>
>&
ping
On 5 September 2012 16:08, Chander Kashyap wrote:
> Add PXE support for the Exynos5250.
>
> Signed-off-by: Chander Kashyap
> ---
> include/configs/smdk5250.h |6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/configs/smdk5250.h b/include/co
and 'fdt blob' is not retrieve from tftp pass
NULL to boot command. In this case 'fdt blob' is not required and absent.
Signed-off-by: Chander Kashyap
---
Changes in v2:
- Removed the duplicate code.
changes in v3:
- Added documentation for "fdt" lable in do
Hi Jason
On 6 September 2012 21:07, Jason Hobbs wrote:
> Chander,
>
> Comments inline.
>
> On Thu, Sep 06, 2012 at 01:40:04AM -0400, Chander Kashyap wrote:
>> Now DT support is becomming common for all new SoC's. Hence it is better to
>> have option for gett
Now DT support is becomming common for all new SoC's. Hence it is better to
have option for getting specific FDT from the remote server.
This patch adds support for new lable i.e. fdt. If fdt_addr is specified
then load fdt blob from the remote server to fdt_address.
Signed-off-by: Ch
Hi Jason,
On 5 September 2012 19:33, Jason Hobbs wrote:
> Chander,
>
> You should add a description of the new label to doc/README.pxe.
>
> Otherwise, it looks good.
>
> Jason
I will do the same.
--
with warm regards,
Chander Kashyap
_
Add PXE support for the Exynos5250.
Signed-off-by: Chander Kashyap
---
include/configs/smdk5250.h |6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 27dab76..2029ad3 100644
--- a/include/configs/smdk5250.h
+++ b/include
Now DT support is becomming common for all new SoC's. Hence it is better to
have option for getting specific FDT from the remote server.
This patch adds support for new lable i.e. fdt. If fdt_addr is specified
then load fdt blob from the remote server to fdt_address.
Signed-off-by: Ch
Now DT support is becomming common for all new SoC's. Hence it is better to
have option for getting specific FDT from the remote server.
This patch adds support for new lable i.e. fdt. If fdt_addr is specified
then load fdt blob from the remote server to fdt_address.
Signed-off-by: Ch
uthy
> Signed-off-by: Inderpal Singh
> Signed-off-by: Tushar Behera
> ---
--
Acked-By: Chander Kashyap
with warm regards,
Chander Kashyap
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arch/arm/include/asm/arch-exynos/periph.h
> @@ -38,6 +38,7 @@ enum periph_id {
> PERIPH_ID_I2C5,
> PERIPH_ID_I2C6,
> PERIPH_ID_I2C7,
> + PERIPH_ID_I2S1,
> PERIPH_ID_SDMMC0,
> PERIPH_ID_SDMMC1,
> PERIPH_ID_SDMMC2,
> --
> 1.7.4.4
>
--
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0
> #endif
>
> +/* Sound */
> +#define CONFIG_CMD_SOUND
> +#ifdef CONFIG_CMD_SOUND
> +#define CONFIG_SOUND
> +#define CONFIG_I2S
> +#define CONFIG_SOUND_WM8994
> +#endif
> +
> /* Enable devicetree support */
> #define CONFIG_OF_LIBFDT
>
> --
> 1.7.4.4
>
-
e assume that you are using that SoC. I am trying to
>>>> cleanup some code for these old boards now. Unfortunately my inside-
>>>> contacts in company do not have any u-boot for this SoC. Although we
>>>> work on the SMDK boards internally, I will try to fix up u-boot which
>>>> you may be using for the same. Can you help me to get u-boot, the one
>>>> you use if publicly available?
>>>>
>>>> Regards,
>>>> Subash
>>>
>>>
>>
>
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Chander Kashyap
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you are working on?
> The macro EXT_eMMC43_BL2_ByCPU_ADDRESS is mapped to the IRAM physical
> adress
>
> Please anybody can help me.
>
>
> Thanks
>
> Balaji
>
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gt; drivers/i2c/s3c24x0_i2c.c | 266
> +++
> drivers/i2c/s3c24x0_i2c.h | 39
> include/configs/smdk5250.h | 8 +
> 9 files changed, 336 insertions(+), 84 deletion
val |= (SELCLK_SAMPLE_1PHASE_Shift | SELCLK_DRV_2PHASE_SHIFT
>> |
>> + SELCLK_DIV_RATIO);
>> + if (host->peripheral == PERIPH_ID_SDMMC4)
>> + val |= (SELCLK_SAMPLE_1PHASE_Shift |
>> SELCLK_DRV_2PHASE_SHIFT);
>> +
>> + dw_mci_writel(host, val, DWMCI_CLKSEL);
>> +}
>> +
>> +/*
>> + * Fifo init for host controller
>> + */
>> +static void dw_mci_fifo_init(struct dw_mci_host *host)
>> +{
>> + int fifo_val, fifo_depth, fifo_threshold;
>> +
>> + fifo_val = dw_mci_readl(host, DWMCI_FIFOTH);
>> +
>> + /* Power-on value of RX_WMark is FIFO_DEPTH-1 */
>> + fifo_depth = 1 + ((fifo_val >> 16) & 0x7ff);
>> + fifo_threshold = fifo_depth / 2;
>> +
>> + fifo_val &= ~(RX_WMARK | TX_WMARK | MSIZE_MASK);
>> + fifo_val |= (fifo_threshold | (fifo_threshold << 16) | MSIZE_8);
>> + dw_mci_writel(host, fifo_val, DWMCI_FIFOTH);
>> +}
>> +
>> +
>> +static int dw_mci_reset(struct dw_mci_host *host)
>> +{
>> + int err;
>> +
>> + /* power on the card */
>> + dw_mci_writel(host, POWER_ENABLE, DWMCI_PWREN);
>> +
>> + err = dw_mci_reset_all(host);
>> + if (err)
>> + return err;
>> +
>> + dw_mci_fifo_init(host);
>> +
>> + /* clear all pending interrupts */
>> + dw_mci_writel(host, INTMSK_ALL, DWMCI_RINTSTS);
>> +
>> + /* interrupts are not used, disable all */
>> + dw_mci_writel(host, 0, DWMCI_INTMASK);
>> +
>> + return 0;
>> +}
>> +
>> +static int dw_mci_initialize(struct mmc *mmc)
>> +{
>> + struct dw_mci_host *host = (struct dw_mci_host *)mmc->priv;
>> + unsigned int ier;
>> + int err;
>> +
>> + err = dw_mci_reset(host);
>> + if (err)
>> + return err;
>> +
>> + /* enumerate at 400KHz */
>> + dw_mci_change_clock(host, MIN_DWMMC_CLOCK);
>> +
>> + /* set auto stop command */
>> + ier = dw_mci_readl(host, DWMCI_CONTROL);
>> + ier |= SEND_AS_CCSD;
>> + dw_mci_writel(host, ier, DWMCI_CONTROL);
>> +
>> + /* set 1bit card mode */
>> + dw_mci_writel(host, PORT0_CARD_WIDTH1, DWMCI_CTYPE);
>> +
>> + dw_mci_writel(host, 0xf, DWMCI_DEBENCE);
>> +
>> + /* set bus mode register for IDMAC */
>> + dw_mci_writel(host, BMOD_IDMAC_RESET, DWMCI_BMOD);
>> +
>> + dw_mci_writel(host, 0x0, DWMCI_IDINTEN);
>> +
>> + /* set the max timeout for data and response */
>> + dw_mci_writel(host, TMOUT_MAX, DWMCI_TMOUT);
>> +
>> + return 0;
>> +}
>> +
>> +int dw_mci_init(enum periph_id periph_id, int bus_width)
>> +{
>> + struct dw_mci_host *mmc_host;
>> + struct mmc *mmc;
>> +
>> + if (num_devs == MAX_MMC_HOSTS) {
>> + debug("%s: Too many hosts\n", __func__);
>> + return -1;
>> + }
>> +
>> + /* set the clock for dwmmc controller */
>> + if (set_dw_mci_clk_div(periph_id)) {
>> + debug("clock_set_dw_mci failed\n");
>> + return -EINVAL;
>> + }
>> +
>> + mmc = &dw_mci_dev[num_devs];
>> + mmc_host = &dw_mci_host[num_devs];
>> +
>> + sprintf(mmc->name, "DWMMC%d", num_devs);
>> + num_devs++;
>> +
>> + mmc->priv = mmc_host;
>> + mmc->send_cmd = dw_mci_send_command;
>> + mmc->set_ios = dw_mci_set_ios;
>> + mmc->init = dw_mci_initialize;
>> +
>> + /*
>> + * In 2.40a spec, Data offset is changed.
>> + * Need to check the version-id and set data-offset for DATA register.
>> + */
>> + mmc_host->verid = GET_VERID(dw_mci_readl(mmc_host, DWMCI_VERID));
>> + debug("Version ID is %04x\n", mmc_host->verid);
>> +
>> + if (mmc_host->verid < DW_MMC_240A)
>> + mmc_host->data_offset = DATA_OFFSET;
>> + else
>> + mmc_host->data_offset = DATA_240A_OFFSET;
>> +
>> + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
>> + mmc->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
>> +
>> + if (bus_width == 8)
>> + mmc->host_caps |= MMC_MODE_8BIT;
>> + else
>> + mmc->host_caps |= MMC_MODE_4BIT;
>> +
>> + mmc->f_min = MIN_DWMMC_CLOCK;
>> + mmc->f_max = MAX_DWMMC_CLOCK;
>> +
>> + exynos_pinmux_config(periph_id,
>> + bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : 0);
>> +
>> + mmc_host->clock = 0;
>> + mmc_host->peripheral = periph_id;
>> + mmc_host->ioaddr = (void *)samsung_get_base_dwmmc();
>> + mmc->b_max = 1;
>> + mmc_register(mmc);
>> + mmc->block_dev.removable = 1;
>> + debug("dwmmc: periph_id=%d, width=%d, ioaddr=%p\n",
>> + periph_id, bus_width, mmc_host->ioaddr);
>> +
>> + return 0;
>> +}
>> --
>> 1.7.4.4
>>
>> ___
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ble as initialised in
>pinmux.c
> board/samsung/smdk5250/smdk5250.c | 163
> ++---
> 1 files changed, 25 insertions(+), 138 deletions(-)
>
Acked-by: Chander Kashyap
--
with warm regards,
Chander Kashyap
__
+
> arch/arm/include/asm/arch-exynos/pinmux.h | 77
> 3 files changed, 267 insertions(+), 1 deletions(-)
> create mode 100644 arch/arm/cpu/armv7/exynos/pinmux.c
> create mode 100644 arch/arm/include/asm/arch-exynos/pinmux.h
>
Acked-b
gt; + * Flags for setting specific configarations of peripherals.
> + * List will grow with support for more devices getting added.
> + */
> +enum {
> + PINMUX_FLAG_NONE = 0x,
> +
> + /* Flags for eMMC */
> + PINMUX_FLAG_8BIT
= 1; i++) {
> - s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE);
> - s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC(0x2));
> - }
> -
> - /*
> - * UART3 GPIOs : GPA1CON[5:4] 0x22
> - * Must set CFG16 switches to
*/
> + PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */
> +
> + /* Flags for SROM controller */
> + PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */
> + PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */
> +
On 9 May 2012 15:17, Chander Kashyap wrote:
> Dear Marek,
>
>
> On 9 May 2012 14:19, Marek Vasut wrote:
>> Dear Rajeshwari Shinde,
>>
>>> This patch corrects the SYSREG structure.
>>> We have removed the sysreg.h added in the previous patchset
>
_dphy;
>> unsigned int dptx_dphy;
>> unsigned int phyclk_sel;
>
> Best regards,
> Marek Vasut
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get_base_usb_phy();
> + setup_usb_phy(usb);
> +
> + hccr = (struct ehci_hccr *)samsung_get_base_usb_ehci();
> + hcor = (struct ehci_hcor *)((uint32_t) hccr
> + + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
> +
> + debug("Exynos5-ehci: init hccr %x and hcor %x hc_length %d\n",
> + (uint32_t)hccr, (uint32_t)hcor,
> + (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
> +
> + return 0;
> +}
> +
> +/*
> + * Destroy the appropriate control structures corresponding
> + * the EHCI host controller.
> + */
> +int ehci_hcd_stop()
> +{
> + struct exynos_usb_phy *usb;
> +
> + usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
> + reset_usb_phy(usb);
> +
> + return 0;
> +}
> --
> 1.7.4.4
>
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ns(+), 0 deletions(-)
>
Acked-by: Chander kashyap
with warm regards,
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d, 2 insertions(+), 2 deletions(-)
>
Acked-by: Chander kashyap
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Dear Rajeshwari,
On 3 May 2012 11:43, Chander Kashyap wrote:
> On 2 May 2012 19:22, Rajeshwari Shinde wrote:
>> This patch adds power mananagement register structure for exynos5 SoC.
s/mananagement/management
>> Signed-off-by: Rajeshwari Shinde
>> ---
>> arch/
622 insertions(+), 0 deletions(-)
>
Acked-by: Chander kashyap
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unsigned int gsclblk_cfg1;
>> + unsigned int ispblk_cfg;
>> + unsigned int usb20_phy_cfg;
>> + unsigned char res2[0x29c];
>> + unsigned int mipi_dphy;
>> + unsigned int dptx_phy;
>> + unsigned int phyclk_sel;
>> +};
TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc.
Signed-off-by: Chander Kashyap
---
Changes in V2:
- Ren
Dear Minkyu,
On 15 March 2012 06:53, Minkyu Kang wrote:
> Dear Chander Kashyap,
>
> On 14 March 2012 22:38, Chander Kashyap wrote:
>> Hi Kyungmin Park,
>>
>> On 14 March 2012 19:02, Kyungmin Park wrote:
>>> Hi Chander,
>>>
>>> On Wed
Hi Kyungmin Park,
On 14 March 2012 19:02, Kyungmin Park wrote:
> Hi Chander,
>
> On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
> wrote:
>> TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
>> in arch/arm/include/asm/arch-exynos/tzpc.h t
TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use s5p_tzpc.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm
Exynos based SoC's have two different naming conventions.
One is S5PC_ and other is EXXX_. This patch adds
generic code to handle EXXX_ connvention.
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/cpu.h |5 -
1 files changed, 4 insertions(+), 1 dele
Add exynos4_dmc structure in dmc.h for exynos4 dram controllor(DMC).
Signed-off-by: Chander Kashyap
---
arch/arm/include/asm/arch-exynos/dmc.h | 109
1 files changed, 109 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/dmc.h
b/arch
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