From: Jerry Huang chang-ming.hu...@freescale.com
In order to calculate the capability, we use the below expression to check:
((dev_desc-lba * dev_desc-blksz)0L)
If the capability is greater than 4GB (e.g. 8GB = 8 * 1024 * 104 * 1024),
the result will overflow, the low 32bit may be zero.
Name: MMC
Tran Speed: 5200
Rd Block Len: 512
MMC version 4.0
High Capacity: No
Capacity: 1.9 GiB
Bus Width: 12-bit
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescalecom
CC: Andy Fleming aflem...@gmail.com
CC: Marek Vasut ma...@denx.de
---
drivers/mmc/fsl_esdhc.c |2 +-
1 file changed, 1
From: Jerry Huang chang-ming.hu...@freescale.com
Use the function 'mmc_send_status' to check the card status.
only when the card is ready, driver can send the next erase command
to the card, otherwise, the erase will failed:
= mmc erase 0 1
MMC erase: dev # 0, block # 0, count 1 ... 1 blocks
From: Jerry Huang chang-ming.hu...@freescale.com
For FSL low-end processors (VVN2.2), in order to detect the SD card,
we should enable PEREN, HCKEN and IPGEN to enable the clock.
Otherwise, after booting the u-boot, and then inserting the SD card,
the SD card can't be detected.
For SDHC VVN2.3
From: Jerry Huang chang-ming.hu...@freescale.com
When first inserting the SD card to slot, the command mmcinfo can
display the card information correctly.
But, then removing the SD card or inserting another SD card to slot,
the command mmcinfo can't display the information correctly.
when we use
From: Jerry Huang chang-ming.hu...@freescale.com
According to the card detection of p1/p2 platform RM,
we should set SYSCTL[PEREN] to enable the clock.
Otherwise, after booting the u-boot, and then inserting the SD card,
the SD card can't be detected.
Signed-off-by: Jerry Huang
From: Jerry Huang chang-ming.hu...@freescale.com
According to the card detection of p1/p2 paltform RM,
we should set SYSCTL[PEREN] to enable the clock.
Otherwise, after booting the u-boot, and then inserting the SD card,
the SD card can't be detected.
Signed-off-by: Jerry Huang
From: Jerry Huang chang-ming.hu...@freescale.com
When first inserting the SD card to slot, the command mmcinfo can
display the card information correctly.
But, then removing the SD card or inserting another SD card to slot,
the command mmcinfo can't display the information correctly.
Therefore
From: Jerry Huang chang-ming.hu...@freescale.com
For p1/p2 rdb-pc platform, use the PCIe-SATA Silicon Image SATA controller.
Therefore, the SATA driver will use sata_sil, instead sata_sil3114.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
CC: Andy Fleming aflem...@gmail.com
---
From: Jerry Huang chang-ming.hu...@freescale.com
For p1/p2 rdb-pc platform, use the PCIe-SATA Silicon Image SATA controller.
Therefore, the SATA driver will use sata_sil, instead sata_sil3114.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
CC: Andy Fleming aflem...@gmail.com
---
From: Jerry Huang chang-ming.hu...@freescale.com
In the current u-boot code, the value of these fields are the reserved
value (0b100), through the signal integrity measurement on freescale's
board with these reserved setting, the signal eye is out of the recommended
spec for non-transition
From: Jerry Huang chang-ming.hu...@freescale.com
In the current u-boot code, the value of these fields are the reserved
value (0b100), through the signal integrity measurement on freescale's
board with these reserved setting, the signal eye is out of the recommended
spec for non-transition
From: Jerry Huang chang-ming.hu...@freescale.com
The new MPC8360EMDS board changes the oscillator to 33.33MHz
in order to support QE 500MHz since 2008.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
CC: Kim Phillips kim.phill...@freescale.com
---
cahnges for v2:
- fix
From: Jerry Huang chang-ming.hu...@freescale.com
The new MPC8360EMDS board changes the oscillator to 33.33MHz
in order to support QE 500MHz since 2008.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
CC: Kim Phillips kim.phill...@freescale.com
---
cahnges for v2:
- fix
From: Jerry Huang chang-ming.hu...@freescale.com
The new MPC8360EMDS board supports 512MB DDR since 2008.
For 512MB DDR:
BAT0 is used for the first 256MB memory, BAT4 is used for the second
256MB memory and the address space of SDRAM follows the DDR, so if the
size of DDR is 256MB, the BAT4 will
From: Jerry Huang chang-ming.hu...@freescale.com
For ICS307-02, there is one general expression to generate SYSCLK:
CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD)
If we want the required frequency for SYSCLK, we must find one solution
to generate this frequency, this solution
From: Jerry Huang chang-ming.hu...@freescale.com
Add the 1920x1080 and 1280x720 resolution support.
Acked-by: Timur Tabi ti...@freescale.com
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
CC: Anatolij Gustschin ag...@denx.de
---
drivers/video/fsl_diu_fb.c | 38
From: Jerry Huang chang-ming.hu...@freescale.com
In order to support 1920x01080 resolution, we must increase the alloc length.
Acked-by: Timur Tabi ti...@freescale.com
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
CC: Anatolij Gustschin ag...@denx.de
---
include/configs/P1022DS.h |
From: Jerry Huang chang-ming.hu...@freescale.com
When the resolution is set to 800x600 and 1024x768,
but, the driver will use 1280x1024 resolution to set the DIU register
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
---
drivers/video/fsl_diu_fb.c |2 ++
1 files changed, 2
From: Jerry Huang chang-ming.hu...@freescale.com
This patch:
1. Support 512MB DDR.
2. Support 33.33MHz oscillator.
3. QE clock is changed to 500MHz as the default value.
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to
support QE 500MHZ and this new board supports 512MB
From: Jerry Huang chang-ming.hu...@freescale.com
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to
support QE 500MHZ and this new board supports 512MB DDR since 2008,
but the u-boot only supports 256MB DDR and 66.6MHz oscillator on top tree,
For 512MB DDR:
BAT0 is used for
From: Jerry Huang chang-ming.hu...@freescale.com
It is sometimes necessary to force the I2C module to become the I2C bus master
out of reset and drive SCL(even though SDA may already be driven,
which indicates that the bus is busy). This can occur when a system reset
does not cause all I2C
From: Jerry Huang chang-ming.hu...@freescale.com
It is sometimes necessary to force the I2C module to become the I2C bus master
out of reset and drive SCL(even though SDA may already be driven,
which indicates that the bus is busy). This can occur when a system reset
does not cause all I2C
From: Jerry Huang chang-ming.hu...@freescale.com
This patch:
1. Support 512MB DDR.
2. Support 33.33MHz oscillator.
3. QE clock is changed to 500MHz as the default value.
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to
support QE 500MHZ and this new board supports 512MB
From: Jerry Huang chang-ming.hu...@freescale.com
Make the I2C2 and I2C1 use the same initialize codes.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
---
drivers/i2c/fsl_i2c.c | 47 +--
1 files changed, 25 insertions(+), 22 deletions(-)
From: Jerry Huang chang-ming.hu...@freescale.com
This patch:
1. Support 512MB DDR.
2. Support 33.33MHz oscillator.
3. QE clock is changed to 500MHz as the default value.
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to
support QE 500MHZ and this new board supports 512MB
From: Jerry Huang chang-ming.hu...@freescale.com
This patch:
1. Support 512MB DDR.
2. Support 33.33MHz oscillator.
3. QE clock is changed to 500MHz as the default value.
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to
support QE 500MHZ and this new board supports 512MB
From: Jerry Huang chang-ming.hu...@freescale.com
For ICS307-02, there is one general expression to generate SYSCLK:
CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD)
If we want the required frequency for SYSCLK, we must find one solution
to generate this frequency, this solution
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