This fixes the header offset calculation.
This issue was found on uniphier v7 SoCs with SPL.
Fixes: 06377c5a1f ("spl: spl_legacy: Fix NAND boot on OMAP3 BeagleBoard")
Signed-off-by: Dai Okamura
---
common/spl/spl_legacy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
di
- ENODATA for no answer error
Signed-off-by: Dai Okamura
---
drivers/i2c/i2c-uniphier-f.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c
index 9d6f1688cb..3dcd382469 100644
--- a/drivers/i2c/i2c-uniphier-f.c
+++ b
;clocks' property in devicetree.
Signed-off-by: Dai Okamura
---
arch/arm/dts/uniphier-v7-u-boot.dtsi | 4 +++
arch/arm/mach-uniphier/Kconfig| 1 +
arch/arm/mach-uniphier/arm32/Makefile | 2 --
arch/arm/mach-uniphier/arm32/timer.c | 39 ---
configs/uniphier_
' data is valid,
and if empty, avoids the abort with the warning as follows:
WARNING at
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c:36/uniphier_pinctrl_get_pins_count()!
pinctrl_select_state_full: pinctrl_config_one: err=-38
Signed-off-by: Dai Okamura
---
drivers/pinctrl/uniphie
This is a series of corrections for uniphier SoCs.
- Fix boot failure on PXs3 Ref board
- Migrate to DM_TIMER of arm a9 global timer, and remove
CONFIG_SYS_TIMER_RATE (to meet the deadline 2023.01 just in time!)
Dai Okamura (3):
pinctrl: uniphier: add check if pins are valid
pinctrl
PXs3 Ref boards need to change the strength of ethernet ports
for stability, like LD20's one.
This adds the table data and fixes the boot issue on PXs3 Ref board.
Fixes: 0852033309 ("ARM: uniphier: sync with Linux 5.8-rc4")
Signed-off-by: Dai Okamura
---
.../pinctrl/uniphier/p
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